FDD86102 [ONSEMI]
N 沟道，屏蔽门极，PowerTrench® MOSFET，100 V，36 A，24 mΩ;
| 型号： | FDD86102 |
| 厂家： | 
ONSEMI |
| 描述： | N 沟道，屏蔽门极，PowerTrench® MOSFET，100 V，36 A，24 mΩ 开关 脉冲 晶体管 |
| 文件： | 总8页 (文件大小：581K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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March 2015
FDD86102
N-Channel Shielded Gate PowerTrench® MOSFET
100 V, 36 A, 24 mΩ
Features
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor‘s advanced PowerTrench® process that
incorporates Shielded Gate technology. This process has been
optimized for rDS(on), switching performance and ruggedness.
Shielded Gate MOSFET Technology
Max rDS(on) = 24 mΩ at VGS = 10 V, ID = 8 A
Max rDS(on) = 38 mΩ at VGS = 6 V, ID = 6 A
High performance trench technology for extremely low rDS(on)
High power and current handling capability in a widely used
surface mount package
Application
DC - DC Conversion
Very low Qg and Qgd compared to competing trench
technologies
Fast switching speed
100% UIL tested
RoHS Compliant
D
D
G
G
S
D-PAK
(TO-252)
S
MOSFET Maximum Ratings TC = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
100
V
V
±20
TC = 25 °C
TA = 25 °C
36
ID
(Note 1a)
(Note 4)
(Note 3)
8
75
A
-Pulsed
EAS
Single Pulse Avalanche Energy
Power Dissipation
121
mJ
W
TC = 25 °C
TA = 25 °C
62
PD
Power Dissipation
(Note 1a)
3.1
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
2.0
40
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ’’
Tape Width
16 mm
Quantity
FDD86102
FDD86102
D-PAK(TO-252)
2500 units
1
©2012 Fairchild Semiconductor Corporation
FDD86102 Rev.1.9
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
100
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
I
D = 250 μA, referenced to 25 °C
67
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
VDS = 80 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
1
μA
±100
nA
On Characteristics (Note 2)
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
2
3.1
4
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
I
D = 250 μA, referenced to 25 °C
-8.5
mV/°C
V
GS = 10 V, ID = 8 A
19
26
33
21
24
38
44
rDS(on)
gFS
Static Drain to Source On Resistance
Forward Transconductance
VGS = 6 V, ID = 6 A
mΩ
VGS = 10 V, ID = 8 A, TJ = 125 °C
VDS = 10 V, ID = 8 A
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
780
180
15
1035
240
25
pF
pF
pF
Ω
VDS = 50 V, VGS = 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
0.4
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
7.6
3
15
10
24
10
19
11
ns
ns
VDD = 50 V, ID = 8 A,
VGS = 10 V, RGEN = 6 Ω
Turn-Off Delay Time
Fall Time
13.4
2.9
13.4
7.6
4.0
3.7
ns
ns
Qg
Total Gate Charge
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
VGS = 0 V to 10 V
nC
nC
nC
nC
Qg
VGS = 0 V to 5 V
VDD = 50 V,
ID = 8 A
Qgs
Qgd
Drain-Source Diode Characteristics
V
GS = 0 V, IS = 8 A
(Note 2)
(Note 2)
0.8
0.7
43
1.3
1.2
68
VSD
Source to Drain Diode Forward Voltage
V
VGS = 0 V, IS = 2.6 A
trr
Reverse Recovery Time
ns
IF = 8 A, di/dt = 100 A/μs
Qrr
Reverse Recovery Charge
43
68
nC
Notes:
1. R
R
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
θJA
θJC
is guaranteed by design while R
is determined by the user’s board design.
θJA
a. 40 °C/W when mounted on a
b. 96 °C/W when mounted on a
minimum pad of 2 oz copper.
2
1 in pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. E 121 mJ is based on starting T = 25 °C, L = 3 mH, I = 9 A, V = 100 V, V = 10 V. 100% test at L = 0.1 mH, I = 30 A.
AS
J
AS
DD
GS
AS
4. Pulsed Drain current is tested at 300 μs with 2% duty cycle. For repetitive pulses, the pulse width is limited by the maximum junction temperature.
2
www.fairchildsemi.com
©2012 Fairchild Semiconductor Corporation
FDD86102 Rev.1.9
Typical Characteristics TJ = 25 °C unless otherwise noted
75
4
3
2
1
0
VGS = 8 V
VGS = 10 V
VGS = 7 V
VGS = 5 V
60
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
45
VGS = 6 V
VGS = 6 V
VGS = 7 V
VGS = 8 V
45
30
15
VGS = 10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 5 V
0
0
1
2
3
4
5
0
15
30
60
75
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s ta n c e
vs Drain Current and Gate Voltage
2.0
80
ID = 8 A
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
ID = 8 A
VGS = 10 V
1.8
1.6
1.4
1.2
1.0
0.8
0.6
70
60
50
40
30
20
10
TJ = 125 o
C
TJ = 25 o
C
-75 -50 -25
0
25 50 75 100 125 150
4
6
8
10
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
F i gu re 3 . N orma li zed On - Res is ta nc e
vs Junction Temperature
Figure4. On-Resistance vs Gate to
Source Voltage
75
100
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
60
VGS = 0 V
10
1
VDS = 5 V
45
TJ = 150 o
C
TJ = 25 oC
30
0.1
TJ = -55 o
C
TJ = 150 o
C
15
0
0.01
0.001
TJ = 25 o
C
TJ = -55 o
C
2
4
6
8
10
0.2
0.4
0.6
0.8
1.0
1.2
1.4
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
3
www.fairchildsemi.com
©2012 Fairchild Semiconductor Corporation
FDD86102 Rev.1.9
Typical Characteristics TJ = 25 °C unless otherwise noted
10
1000
100
10
ID = 8 A
Ciss
VDD = 25 V
8
VDD = 50 V
Coss
6
VDD = 75 V
4
2
0
f = 1 MHz
= 0 V
Crss
V
GS
0
3
6
9
12
15
0.1
1
10
100
150
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
40
30
20
10
0
50
TJ = 25 oC
VGS = 10 V
10
TJ = 100 o
C
VGS = 6 V
TJ = 125 o
C
RθJC = 2 oC/W
1
0.001
0.01
0.1
1
10 30
25
50
75
100
125
Tc, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure9. U n c l a m p e d I n d u c t i v e
Switching Capability
Figure10. Maximum Continuous Drain
Current vs Case Temperature
100
10
1
10000
SINGLE PULSE
RθJC = 2 oC/W
TC = 25 oC
100 µs
1000
THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MAX RATED
1 ms
RθJC = 2 oC/W
TC = 25 oC
100
50
10 ms
DC
0.1
10-5
10-4
10-3
t, PULSE WIDTH (sec)
10-2
10-1
1
1
10
100 200
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
Figure12. Single Pulse Maximum
Power Dissipation
4
www.fairchildsemi.com
©2012 Fairchild Semiconductor Corporation
FDD86102 Rev.1.9
Typical Characteristics TJ = 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
0.05
0.02
P
DM
0.1
0.01
t
1
t
2
NOTES:
DUTY FACTOR: D = t /t
SINGLE PULSE
θJC = 2 oC/W
1
2
PEAK T = P
x Z
x R
+ T
J
DM
θJC
θJC C
R
0.01
10-5
10-4
10-3
t, RECTANGULAR PULSE DURATION (sec)
10-2
10-1
1
Figure 13. Junction-to-Case Transient Thermal Response Curve
5
www.fairchildsemi.com
©2012 Fairchild Semiconductor Corporation
FDD86102 Rev.1.9
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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