FDD18N20LZ [ONSEMI]
功率 MOSFET,N 沟道,逻辑电平,UniFETTM,200 V,16 A,125 mΩ,DPAK;型号: | FDD18N20LZ |
厂家: | ONSEMI |
描述: | 功率 MOSFET,N 沟道,逻辑电平,UniFETTM,200 V,16 A,125 mΩ,DPAK 开关 脉冲 晶体管 |
文件: | 总8页 (文件大小:456K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MOSFET – N-Channel,
UniFETt
200 V, 16 A, 125 mW
FDD18N20LZ
Description
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UniFET MOSFET is ON Semiconductor’s high voltage MOSFET
family based on planar stripe and DMOS technology. This MOSFET
is tailored to reduce on−state resistance, and to provide better
switching performance and higher avalanche energy strength. This
device family is suitable for switching power converter applications
such as power factor correction (PFC), flat panel display (FPD) TV
power, ATX and electronic lamp ballasts.
D
G
S
DPAK3 (TO−252 3 LD)
CASE 369AS
Features
MARKING DIAGRAM
• RDS(on) = 125 mW (Typ.) @ VGS = 10 V, ID = 8 A
• Low Gate Charge (Typ. 30 nC)
• Low C
(Typ. 25 pF)
RSS
$Y&Z&3&K
FDD
18N20LZ
• 100% Avalanche Tested
• Improved dv/dt Capability
• ESD Improved Capability
• These Device is Pb−Free and is RoHS Compliant
Applications
• LED TV
• Consumer Appliances
• Uninterruptible Power Supply
FDD18N20LZ = Specific Device Code
$Y
&Z
&3
&K
= ON Semiconductor Logo
= Assembly Plant Code
= 3−Digit Date Code
= 2−Digits Lot run Traceability Code
D
G
S
N−Channel MOSFET
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of
this data sheet.
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
September, 2020 − Rev. 3
FDD18N20LZ/D
FDD18N20LZ
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
C
Symbol
Parameter
FDD18N20LZ
Unit
V
V
Drain to Source Voltage
Gate to Source Voltage
Drain Current
200
DSS
GSS
V
20
V
I
D
Continuous (T = 25°C)
16
A
C
Continuous (T = 100°C)
9.6
C
I
Drain Current (Note 1)
Pulsed
64
A
mJ
A
DM
E
Single Pulsed Avalanche Energy (Note 2)
Avalanche Current (Note 1)
320
AS
AR
I
16
E
Repetitive Avalanche Energy (Note 1)
Peak Diode Recovery dv/dt (Note 3)
Power Dissipation
8.9
mJ
V/ns
W
AR
dv/dt
10
89
P
(T = 25°C)
C
D
Derate above 25°C
0.7
W/°C
°C
T , T
Operating and Storage Temperature Range
−55 to +150
300
J
STG
T
L
Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive rating: pulse−width limited by maximum junction temperature.
2. L = 2.5 mH, I = 16 A, V = 50 V, R = 25 W, starting T = 25°C.
AS
DD
G
DSS
J
3. I ≤ 16 A, di/dt ≤ 200 A/ms, V ≤ BV
, starting T = 25°C.
SD
DD
J
THERMAL CHARACTERISTICS
Symbol
Parameter
FDD18N20LZ
Unit
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
1.4
83
°C/W
R
q
JC
JA
R
q
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2
FDD18N20LZ
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= 250 mA, V = 0 V, T = 25°C
200
−
−
0.2
−
−
−
V
DSS
D
GS
J
DBV
/ D Breakdown Voltage Temperature Coefficient
= 250 mA, Referenced to 25°C
V/°C
mA
DSS
D
T
DSS
Zero Gate Voltage Drain Current
V
V
V
= 200 V, V = 0 V
−
1
J
DS
DS
GS
GS
I
= 160 V, T = 125°C
−
−
10
10
C
I
Gate to Body Leakage Current
=
16 V, V = 0 V
−
−
mA
GSS
DS
ON CHARACTERISTICS
V
Gate Threshold Voltage
V
GS
V
GS
V
GS
V
DS
= V , I = 250 mA
1.0
−
−
2.5
0.125
0.13
−
V
GS(th)
DS(on)
DS
D
R
Static Drain to Source On Resistance
= 10 V, I = 8 A
0.10
0.11
11
W
D
= 5 V, I = 8 A
−
D
g
FS
Forward Transconductance
= 20 V, I = 2 A
−
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 25 V, V = 0 V
−
−
−
−
−
−
1185
190
25
1575
255
40
40
−
pF
pF
pF
nC
nC
nC
iss
DS
GS
f = 1 MHz
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
Total Gate Charge at 10V
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
rss
Q
V
DS
= 200 V, I = 16 A, V = 10 V
30
g(tot)
D
GS
(Note 4)
Q
3.5
8.5
gs
Q
−
gd
SWITCHING CHARACTERISTICS
t
Turn−On Delay Time
Turn−On Rise Time
Turn−Off Delay Time
Turn−Off Fall Time
V
= 100 V, I = 16 A, V = 10 V,
−
−
−
−
15
20
40
50
ns
ns
ns
ns
d(on)
DD
G
D
GS
R
= 25 W (Note 4)
t
r
t
135
50
280
110
d(off)
t
f
DAIN−SOURCE DIODE CHARACTERISTICS
I
Maximum Continuous Drain to Source Diode Forward Current
Maximum Pulsed Drain to Source Diode Forward Current
−
−
−
−
−
−
−
16
64
1.4
−
A
A
S
I
SM
V
SD
Drain to Source Diode Forward Voltage
Reverse Recovery Time
V
V
= 0 V, I = 4 A
−
V
GS
SD
t
rr
= 0 V, I = 4 A
105
0.4
ns
mC
GS
SD
dI /dt = 100 A/ms
F
Q
Reverse Recovery Charge
−
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature typical characteristics.
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3
FDD18N20LZ
TYPICAL PERFORMANCE CHARACTERISTICS
100
10
1
100
V
GS
= 10 V
7 V
5 V
4.5 V
4 V
3.5 V
3 V
10
150°C
25°C
*Notes:
1
*Notes:
1. V = 20 V
1. 250 ms Pulse Test
DS
2. 250 ms Pulse Test
2. TC = 25°C
−55°C
0.1
0.1
0
2
4
6
8
0.01
0.1
1
10
60
30
V
, Drain−Source Voltage [V]
V
, Gate−Source Voltage [V]
DS
GS
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.36
100
10
1
0.30
0.24
0.18
0.12
0.06
150°C
V
= 10 V
GS
25°C
V
GS
= 20 V
*Notes:
1. V = 0 V
GS
2. 250 ms Pulse Test
*Note: TJ = 25°C
40 50
I , Drain Current [A]
0
10
20
30
0.4
0.6 0.8 1.0
, Body Diode Forward Voltage [V]
SD
1.2 1.4 1.6 1.8
V
D
Figure 3. On−Resistance Variation vs.
Figure 4. Body Diode Forward Voltage
Drain Current and Gate Voltage
Variation vs. Source Current and Temperature
5000
10
V
DS
= 50 V
8
6
4
2
0
V
V
= 100 V
= 160 V
DS
DS
1000
100
10
C
iss
Coss
*Note:
1. V = 0 V
2. f = 1 MHz
GS
C
C
C
= C + C (C = shorted)
gs gd ds
= C + C
iss
C
rss
oss
rss
ds
gd
= C
*Note: I = 16 A
gd
D
0.1
1
10
0
7
14
21
28
35
V
DS
, Drain−Source Voltage [V]
Qg, Total Voltage Charge [nC]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
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4
FDD18N20LZ
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
2.4
2.0
1.6
1.2
1.15
1.10
1.05
1.00
0.95
0.90
0.85
*Notes:
1. V = 0 V
*Notes:
1. V = 10 V
0.8
0.4
GS
GS
2. I = 250 ms
2. I = 8 A
D
D
−80
−40
0
40
80
120
160
−80
−40
0
40
80
120
160
T , Junction Temperature [°C]
J
T , Junction Temperature [°C]
J
Figure 7. Breakdown Voltage Variation vs.
Temperature
Figure 8. On−Resistance Variation vs.
Temperature
100
16
12
8
30 ms
10
100 ms
Operation in this
Area is Limited
by R
DS(ON)
1 ms
1
*Notes:
1. T = 25°C
10 ms
DC
4
C
2. T = 150°C
J
3. Single Pulse
0.1
0
0.1
1
10
100
1000
25
50
75
100
125
150
V
DS
, Drain−Source Voltage [V]
T , Case Temperature [°C]
C
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current vs.
Case Temperature
2
1
0.5
0.2
0.1
PDM
t1
t2
0.1
0.05
0.02
0.01
Single pulse
*Notes:
1. Z (t) = 1.4°C/W Max.
q
JC
2. Duty Factor, D = t / t
1
2
3. T − T = P
x Z (t)
q
JC
JM
C
DM
0.01
10−5
10−4
10−3
10−2
10−1
1
t , Rectangular Pulse Duration [s]
1
Figure 11. Transient Thermal Response Curve
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5
FDD18N20LZ
PACKAGE MARKING ANDORDERING INFORMATION
†
Part Number
Top Mark
Package
Reel Size
Tape Width
Shipping
FDD18N20LZ
FDD18N20LZ
DPAK3 (TO−252 3 LD)
(Pb−Free)
330 mm
16 mm
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
UniFET is trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DPAK3 (TO−252 3 LD)
CASE 369AS
ISSUE A
DATE 28 SEP 2022
GENERIC
MARKING DIAGRAM*
XXXXXX
XXXXXX
AYWWZZ
XXXX = Specific Device Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
A
Y
= Assembly Location
= Year
WW = Work Week
ZZ
= Assembly Lot Code
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
98AON13810G
DPAK3 (TO−252 3 LD)
PAGE 1 OF 1
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© Semiconductor Components Industries, LLC, 2019
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