FAN6862RTY [ONSEMI]
用于反激转换器的 6 引脚绿色模式 PWM 控制器,65KHz;![FAN6862RTY](http://pdffile.icpdf.com/pdf2/p00364/img/icpdf/FAN6862RTY_2225574_icpdf.jpg)
型号: | FAN6862RTY |
厂家: | ![]() |
描述: | 用于反激转换器的 6 引脚绿色模式 PWM 控制器,65KHz 控制器 开关 光电二极管 转换器 |
文件: | 总18页 (文件大小:1254K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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FAN6862R / FAN6862L
Highly Integrated Green-Mode PWM Controller
Features
Description
A
highly integrated PWM controller, FAN6862R/L
.
.
.
Low Startup Current: 8µA
provides several features to enhance the performance
of flyback converters. To minimize standby power
consumption,
Low Operating Current in Green Mode: 3mA
a
proprietary green-mode function
Peak-Current-Mode Operation with Cycle-by-Cycle
Current Limiting
provides off-time modulation to continuously decrease
the switching frequency under light-load conditions.
Under zero-load conditions, the power supply enters
burst mode, which completely shuts off PWM output.
Output restarts just before the supply voltage drops
below the UVLO lower limit. This green-mode function
enables power supplies to meet international power
conservation requirements.
.
PWM Frequency Continuously Decreasing with
Burst Mode at Light Loads
.
.
.
.
VDD Over-Voltage Protection (OVP)
Constant Output Power Limit (Full AC Input Range)
Over-Temperature Protection (OTP)
The FAN6862R/L is designed for SMPS and integrates
a frequency-hopping function that helps reduce EMI
emission of a power supply with minimum line filters.
The built-in synchronized slope compensation is
proprietary sawtooth compensation for constant output
power limit over universal AC input range. The gate
output is clamped at 18V to protect the external
MOSFET from over-voltage damage.
Fixed PWM Frequency (65KHz) with Frequency
Hopping
.
.
.
Feedback Open-Loop Protection with 56ms Delay
Soft-Start Time: 5ms
400mA Driving Capability
Other protection functions include VDD over-voltage
protection, over-temperature protection, and overload
protection. For over-temperature protection, an external
NTC thermistor can be applied to sense the ambient
temperature. When OVP, OTP, or OLP is activated, an
internal protection circuit switches off the controller.
Applications
General-purpose switch-mode power supplies and
flyback power converters, including:
.
.
.
Power Adapters
Open-Frame SMPS
Part Number
OVP
OTP
OLP
SMPS with Surge-Current Output, such as for
Printers, Scanners, and Motor Drivers
FAN6862RTY Auto Restart Auto Restart Auto Restart
FAN6862LTY
Latch
Latch
Latch
Ordering Information
Part Number
FAN6862RTY
FAN6862LTY
Operating Temperature Range
-40 to +105°C
Package
Packing Method
Tape & Reel
6-Pin SSOT-6
6-Pin SSOT-6
-40 to +105°C
Tape & Reel
© 2009 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN6862R/L • Rev. 2, Feb-2020
Typical Application
Figure 1. Typical Application
Block Diagram
Figure 2. Block Diagram
© 2009 Fairchild Semiconductor Corporation
FAN6862R/L • Rev. 2, Feb-2020
www.fairchildsemi.com
2
Marking Information
ABx:
TT:
ABA: FAN6862LTY
ABC: FAN6862RTY
Wafer Lot Code
• • • •
ABxTT
- - -
: Year Code
Week Code
_ _ _:
Figure 3. Top Mark
Pin Configuration
Figure 4. Pin Assignments
Pin Definitions
Pin # Name
Function
Description
1
GND
Ground
Ground
The FB pin provides the output voltage regulation signal. It provides feedback to the
internal PWM comparator for control of the duty cycle. This pin also provide for
OLP: if VFB is larger than the trigger level and remains for a long time, the controller
stops and restarts.
2
FB
Feedback
An external NTC thermistor is connected from this pin to GND for over-temperature
protection. The impedance of the NTC decreases at high temperatures. Once the
voltage of the RT pin drops below a threshold, PWM output is disabled.
Temperature
Detection
3
4
RT
This pin senses the voltage across a resistor. When the voltage reaches the internal
threshold, PWM output is disabled. This activates over-current protection. This pin
also provides current amplitude information for current-mode control.
Current
Sense
SENSE
VDD
5
6
Power Supply Power supply
GATE Driver Output The totem-pole output driver for driving the power MOSFET.
© 2009 Fairchild Semiconductor Corporation
FAN6862R/L • Rev. 2, Feb-2020
www.fairchildsemi.com
3
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. All voltage values, except differential voltages, are given with
respect to GND pin.
Symbol
VDD
VL
Parameter
Min.
Max.
30
Unit
V
Supply Voltage
Input Voltage to FB, SENSE, RT Pin
Power Dissipation at TA<50°C
-0.3
7.0
V
PD
300
mW
°C/W
°C
ΘJC
TJ
Thermal Resistance (Junction-to-Case)
Operating Junction Temperature
115
-40
-55
+150
+150
+260
3.00
1.25
TSTG
TL
Storage Temperature Range
°C
Lead Temperature, Wave Soldering, 10 Seconds
Human Body Model, JESD22-A114
Charge Device Model, JESD22-C101
°C
ESD
kV
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
Min.
Max.
Unit
TA
Operating Ambient Temperature
-40
+105
°C
© 2009 Fairchild Semiconductor Corporation
FAN6862R/L • Rev. 2, Feb-2020
www.fairchildsemi.com
4
Electrical Characteristics
VDD = 15V and TA = 25°C unless otherwise noted.
Symbol
Parameter
Test Condition
Min.
Typ. Max. Unit
VDD Section
VDD-OP
Continuously Operating Voltage
Turn-On Threshold Voltage
Turn-Off Voltage
24
17
9.5
26
5
V
V
VDD-ON
VDD-OFF
VDD-OVP
VDD-LH
15
7.5
24
3
16
8.5
25
4
V
VDD Over-Voltage Protection (Latch-Off)
Threshold Voltage for Latch-Off Release
Startup Current
V
V
IDD-ST
VDD-ON–0.16V
CL=1nF
8
30
4
μA
mA
IDD-OP
Normal Operating Supply Current
3
GATE Open,
VFB=VFB-G
IDD-BM
Green-Mode Operating Supply Current
2.5
mA
VDD-OVP
tD-VDDOVP
IDD-LH
VDD Over-Voltage Protection
VDD OVP Debounce Time
Latch-Off Holding Current
24
25
30
40
26
50
65
V
μs
μA
VDD=5V
Feedback Input Section
AV
ZFB
Input-Voltage to Current-Sense Attenuation
1/4.0
1/3.5
5.5
5.2
4.6
56
1/3.0
V/V
kΩ
V
Input Impedance
VFB-OPEN
VFB-OLP
tD-OLP
FB Pin Open Voltage
5.0
4.3
53
5.4
4.9
60
Threshold Voltage for Open-Loop Protection
Open-Loop Protection Delay Time
V
ms
Current Sense Section
tPD
Delay to Output
100
360
250
ns
ns
V
tLEB
Leading-Edge Blanking Time
270
0.47
0.41
VSTHFL
VSTHVA
VSLOPE
Flat Threshold Voltage for Current Limit
Valley Threshold Voltage for Current Limit
Slope Compensation
Duty>51%
Duty=0%
0.50
0.44
0.273
4.00
0.53
0.47
V
Duty=DCYMAX
V
tSOFT-START Period During Startup Time
2.50
5.25
ms
Oscillator Section
Center Frequency
Hopping Range
Hopping Range*1
VFB>VFB-N
62
65
68
±3.7
±4.2
±4.7
VFB≥VFB-N
fOSC
Normal PWM Frequency
kHz
±2.9
4.4
VFB=VFB-G
VFB≥VFB-N
VFB=VFB-G
thop-1
thop-3
Hopping Period 1*1
Hopping Period 3*1
ms
ms
11.5
22.5
fOSC-G
Green Mode Minimum Frequency
18.0
2.3
25.0
2.7
kHz
FB Threshold Voltage For Frequency
Reduction
VFB-N
2.5
V
VFB-G
VFB-ZDC
fDV
FB Voltage at fOSC-G
1.9
2.1
1.7
2.3
V
V
FB Threshold Voltage for Zero Duty
Frequency Variation vs. VDD Deviation
VDD=11.5V to 20V
TA= -40 to +105°C
0
0.02
2.00
2
%
Frequency Variation vs. Temperature
Deviation
fDT
%
Continued on the following page…
© 2009 Fairchild Semiconductor Corporation
FAN6862R/L • Rev. 2, Feb-2020
www.fairchildsemi.com
5
Electrical Characteristics (Continued)
VDD = 15V and TA = 25°C unless otherwise noted.
Symbol
Parameter
Test Condition
Min.
Typ. Max.
Unit
PWM Output Section
DCYMAX
VOL
Maximum Duty Cycle
Output Voltage Low
65
6
70
75
%
V
VDD=15V, IO=50mA
VDD=8V, IO=50mA
CL=1nF
1.5
VOH
Output Voltage High
Rising Time
V
tR
150
35
200
80
ns
ns
V
tF
Falling Time
CL=1nF
VCLAMP
Gate Output Clamping Voltage
VDD=20V
15.0
16.5
18.0
Over-Temperature Protection (OTP) Section
IRT
Output Current of RT Pin
92
0.97
15
100
108
1.07
19
μA
Threshold Voltage for Over-Temperature
Protection
VOTP
TA=25°C
1.02
V
VFB=VFB-N
17
51
tDOTP
Over-Temperature Debounce Time
ms
(1)
VFB=VFB-G
2nd Threshold Voltage for Over-
Temperature Protection
2nd Over-Temperature Debounce Time
VOTP2
TA=25°C
0.60
80
0.70
100
0.75
190
V
tDOTP2
Note:
μs
1. Guarantee by design.
© 2009 Fairchild Semiconductor Corporation
FAN6862R/L • Rev. 2, Feb-2020
www.fairchildsemi.com
6
Typical Performance Characteristics
17
16.6
16.2
15.8
15.4
15
9.5
9.1
8.7
8.3
7.9
7.5
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
0
25
50
75
85
100
125
Temperature (ºC)
Temperature (ºC)
Figure 5. Turn-On Threshold Voltage (VDD-ON
)
Figure 6. Turn-Off Threshold Voltage (VDD-OFF
)
vs. Temperature
vs. Temperature
4.5
4.1
3.7
3.3
2.9
2.5
26
25.6
25.2
24.8
24.4
24
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
0
25
50
75
85
100
125
Temperature (ºC)
Temperature (ºC)
Figure 7. Operating Current (IDD-OP) vs. Temperature
Figure 8. VDD Over-Voltage Protection (VDD-OVP
vs. Temperature
)
68
67
66
65
64
63
62
2.7
2.6
2.5
2.4
2.3
2.2
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
0
25
50
75
85
100
125
Temperature (ºC)
Temperature (ºC)
Figure 9. Center Frequency (fOSC) vs. Temperature
Figure 10. FB Threshold Voltage for Frequency
Reduction (VFB-N) vs. Temperature
© 2009 Fairchild Semiconductor Corporation
FAN6862R/L • Rev. 2, Feb-2020
www.fairchildsemi.com
7
Typical Performance Characteristics (Continued)
2.3
2.2
2.1
2
4.9
4.8
4.7
4.6
4.5
4.4
4.3
1.9
1.8
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
0
25
50
75
85
100
125
Temperature (ºC)
Temperature (ºC)
Figure 11. FB Voltage at fOSC-G (VFB-G) vs. Temperature
Figure 12. Threshold Voltage for Open-Loop
Protection (VFB-OLP) vs. Temperature
0.6
0.56
0.52
0.48
0.44
0.4
59
58
57
56
55
54
53
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
0
25
50
75
85
100
125
Temperature (ºC)
Temperature (ºC)
Figure 13. Open-Loop Protection Delay Time (tD-OLP
vs. Temperature
)
Figure 14. Flat Threshold Voltage for Current Limit
(VSTHFL) vs. Temperature
0.55
0.51
0.47
0.43
0.39
0.35
7
6
5
4
3
2
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
0
25
50
75
85
100
125
Temperature (ºC)
Temperature (ºC)
Figure 15. Valley Threshold Voltage for Current Limit
(VSTHVA) vs. Temperature
Figure 16. Period during Startup (tSOFT-START
)
vs. Temperature
© 2009 Fairchild Semiconductor Corporation
FAN6862R/L • Rev. 2, Feb-2020
www.fairchildsemi.com
8
Typical Performance Characteristics (Continued)
72
71
70
69
68
67
180
160
140
120
100
80
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
0
25
50
75
85
100
125
Temperature (ºC)
Temperature (ºC)
Figure 17. Maximum Duty Cycle (DCYMAX
vs. Temperature
)
Figure 18. Rising Time (tR) vs. Temperature
70
60
50
40
30
20
120
112
104
96
88
80
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
0
25
50
75
85
100
125
Temperature (ºC)
Temperature (ºC)
Figure 19. Falling Time (tF) vs. Temperature
Figure 20. Output Current of RT Pin (IRT
)
vs. Temperature
© 2009 Fairchild Semiconductor Corporation
FAN6862R/L • Rev. 2, Feb-2020
www.fairchildsemi.com
9
Operation Description
Frequency
Startup Operation
Figure 21 shows a typical startup circuit and transformer
PWM
Frequency
auxiliary winding for
a typical application. Before
+4.2kHz
65kHz
-4.2kHz
FAN6862R/L begins switching operation, it consumes
only startup current (typically 8μA) and the current
supplied through the startup resistor charges the VDD
capacitor (CDD). When VDD reaches the turn-on voltage
of 16V (VDD-ON), FAN6862R/L begins switching and the
current consumed increases to 3mA. Then the power
required is supplied from the transformer auxiliary
winding. The large hysteresis of VDD (8.5V) provides
more holdup time, which allows using a small capacitor
for VDD. The startup resistor is typically connected to AC
line for a fast reset of latch protection.
+2.9kHz
22.5kHz
-2.9kHz
VFB-ZDC VFB-G
VFB-N
VFB
Figure 22. PWM Frequency
Figure 21. Startup Circuit
Figure 23. Burst-Mode Operation
Frequency Hopping
Green-Mode Operation
EMI reduction is accomplished by frequency hopping,
which spreads the energy over a wider frequency range
than the bandwidth measured by the EMI test
equipment. An internal frequency hopping circuit
changes the switching frequency between 60.8kHz and
69.2kHz with a period of 4.4ms, as shown in Figure 24.
The FAN6862R/L uses feedback voltage (VFB) as an
indicator of the output load and modulates the PWM
frequency, as shown in Figure 22, such that the
switching frequency decreases as load decreases. In
heavy-load conditions, the switching frequency is
65KHz. Once VFB decreases below VFB-N (2.5V), the
PWM frequency starts to linearly decrease from 65KHz
to 22.5kHz to reduce the switching losses. As VFB
decreases below VFB-G (2.1V), the switching frequency is
fixed at 22.5kHz and FAN6862R/L enters “deep” green
mode, where the operating current decreases to 2.5mA
(maximum), further reducing the standby power
consumption. As VFB decreases below VFB-ZDC (1.7V),
FAN6862R/L enters burst-mode operation. When VFB
drops below VFB-ZDC, switching stops and the output
voltage starts to drop, which causes the feedback
voltage to rise. Once VFB rises above VFB-ZDC, switching
resumes. Burst mode alternately enables and disables
switching, thereby reducing switching loss in standby
mode, as shown in Figure 23.
Figure 24. Frequency Hopping
© 2009 Fairchild Semiconductor Corporation
FAN6862R/L • Rev. 2, Feb-2020
www.fairchildsemi.com
10
Protections
Open-Loop / Overload Protection (OLP)
Self-protective functions include VDD Over-Voltage
Protection (OVP), Open-Loop / Overload Protection
(OLP), Over-Current Protection (OCP), Short-Circuit
Protection, and Over-Temperature Protection (OTP).
FAN6862R uses auto-restart mode protections and
FAN6862L uses latch-mode protections.
When the upper branch of the voltage divider for the
shunt regulator (KA431 shown) is broken, as shown in
Figure 26, no current flows through the opto-coupler
transistor, which pulls up the feedback voltage to 5.2V.
When the feedback voltage is above 4.6V longer than
56ms, OLP is triggered. This protection is also triggered
when the SMPS output drops below the nominal value
longer than 56ms due to the overload condition.
Auto-Restart Mode Protection: Once a fault condition
is detected, switching is terminated and the MOSFET
remains off. This causes VDD to fall because no more
power is delivered from auxiliary winding. When VDD falls
to VDD-OFF (8.5V), the protection is reset and the
operating current reduces to startup current, which
causes VDD to rise. FAN6862R resumes normal
operation when VDD reaches VDD-ON (16V). In this
manner, the auto-restart can alternately enable and
disable the switching of the MOSFET until the fault
condition is eliminated (see Figure 25).
Latch-Mode Protection: Once this protection is
triggered, switching is terminated and the MOSFET
remains off. The latch is reset only when VDD is
discharged below 4V by unplugging AC power line.
Figure 26. OLP Operation
VDD Over-Voltage Protection (OVP)
VDD over-voltage protection prevents IC damage caused
by over voltage on the VDD pin. The OVP is triggered
when VDD reaches 25V. A debounce time (typically
30µs) prevents false triggering by switching noise.
Over-Temperature Protection (OTP)
The OTP circuit is composed of current source and
voltage comparators. Typically, an NTC thermistor is
connected between the RT and GND pins. Once the
voltage of this pin drops below a threshold of 1.02V,
PWM output is disabled after tDOTP debounce time. If this
pin drops below 0.7V, it triggers the latch-off protection
immediately after tDOTP2 debounce time.
Figure 25. Auto-Restart Operation
Over-Current Protection (OCP)
FAN6862R/L has over-current protection thresholds. It is
for pulse-by-pulse current limit, which turns off the
MOSFET for the remainder of the switching cycle when
the sensing voltage of MOSFET drain current reaches
the threshold. The other threshold is for the over-current
protection, which shuts down the MOSFET gate when
the sensing voltage of MOSFET drain current is above
the threshold longer than the shutdown delay (56ms).
© 2009 Fairchild Semiconductor Corporation
FAN6862R/L • Rev. 2, Feb-2020
www.fairchildsemi.com
11
Constant Output Power Limit
Leading-Edge Blanking (tLEB)
FAN6862R/L has saw-limiter for pulse-by-pulse current
limit, which guarantees almost constant power limit over
different line voltages of universal input range.
Each time the power MOSFET is switched on, a turn-on
spike occurs across the sense-resistor caused by
primary-side capacitance and secondary-side rectifier
reverse recovery. To avoid premature termination of the
switching pulse, a leading-edge blanking time is built in.
During this blanking period (360ns), the PWM
comparator is disabled and cannot switch off the gate
driver. Thus, RC filter with a small RC time constant is
enough for current sensing.
The conventional pulse-by-pulse current limiting scheme
has a constant threshold for current limit comparator,
which results in a higher power limit for high line voltage.
FAN6862R/L has a sawtooth current limit threshold that
increases progressively within a switching cycle, which
provides lower current limit for high line and makes the
actual power limit level almost constant over different
line voltages of universal input range, as shown in
Figure 27.
Sawtooth current limit threshold
Higher current limit for low line
Lower current limit for high line
MOSFET
Drain current
Figure 28. Current Sense R-C Filter
Soft-Start
Figure 27. Sawtooth Current Limiter
The FAN6862R/L has an internal soft-start circuit that
increases pulse-by-pulse current-limit comparator
inverting input voltage slowly after it starts. The typical
soft-start time is 5ms. The pulsewidth to the power
MOSFET is progressively increased to establish the
correct working conditions for transformers, rectifier
diodes, and capacitors. The voltage on the output
capacitors is progressively increased with the intention
of smoothly establishing the required output voltage. It
also helps prevent transformer saturation and reduces
the stress on the secondary diode during startup.
© 2009 Fairchild Semiconductor Corporation
FAN6862R/L • Rev. 2, Feb-2020
www.fairchildsemi.com
12
Typical Application Circuit (Netbook Adapter by Flyback)
Application
Fairchild Devices
Input Voltage Range
Output
Netbook Adapter
FAN6862R/L
90~265VAC
19V/2.1A (40W)
Features
.
.
.
High efficiency (>85.3% at full load) meeting EPS regulation with enough margin
Low standby (Pin<0.15W at no-load condition)
Soft-start time: 5ms
5
4.5
4
91
115VAC 60Hz (89.15% avg)
Over Current Protection
90
89
230VAC 50Hz (89.47% avg)
88
3.5
3
87
86
85
2.5
2
85.29% (Energy star V2.0)
84
1.5
1
83
82
90V
115V
230V
264V
25%
50%
75%
100%
Load (%)
Vac(V)
Figure 29. Measured Efficiency and Over-Current Protection
Figure 30. Schematic of Typical Application Circuit
© 2009 Fairchild Semiconductor Corporation
FAN6862R/L • Rev. 2, Feb-2020
www.fairchildsemi.com
13
Typical Application Circuit (Continued)
Transformer Specification
.
.
Core: RM 8
Bobbin: RM 8
Figure 31. Transformer Diagram
Terminal
INSULATION
BARRIER
NO
WIRE
Ts
S
11
3
F
10
2
Ts
3
Primary Secondary
N1
N2
0.25*1
0.25* 1
9
33
1.2
12
1.2
33
1
11
Fly-
11
2
COPPER SHIELD
0.5* 2
3
N3
N4
Fly+
1
1
COPPER SHIELD
0.25 * 1
3
4
CORE ROUNDING TAPE
3
Pin
Specification
920µH ±5%
Remark
3-1
Primary-Side Inductance
Primary-Side Effective Leakage
100kHz, 1V
3-1
15µH Maximum
Short One of the Secondary Windings
© 2009 Fairchild Semiconductor Corporation
FAN6862R/L • Rev. 2, Feb-2020
www.fairchildsemi.com
14
Physical Dimensions
Figure 32. 6-Pin, SUPERSOT6 “SSOT-6”, JEDEC MO-193, 1.6mm Wide Package
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
© 2009 Fairchild Semiconductor Corporation
FAN6862R/L • Rev. 2, Feb-2020
www.fairchildsemi.com
15
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