FAN3989MLP8X [ONSEMI]
USB/充电器检测器件，带负载开关;
| 型号： | FAN3989MLP8X |
| 厂家： | 
ONSEMI |
| 描述： | USB/充电器检测器件，带负载开关 开关 光电二极管 |
| 文件： | 总14页 (文件大小：925K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended
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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
February 2011
FAN3989
USB/Charger Detection Device with Load Switch
Features
Description
The FAN3989 is a USB connection monitoring device
used to determine if a standard USB device is
connected or a battery-charging device is connected.
.
.
.
.
.
.
.
Charger/USB Detection Device with Load Switch
Charger/USB Device Detection Flag
Over/Under-Voltage Detection Flag
Load Switch Output, Up to 1.5A Charge Current
VBUS Supply: 2.7V to 20V
The FAN3989 sets the FLAG1 pin to logic HIGH or LOW
as an indicator to the system controller that a standard
USB device or a charger is connected to the USB port.
The FAN3989 also monitors the VBUS for over- or under-
voltage conditions. The FLAG2 pin is set LOW if VBUS is
less than 3.3V or greater than 6.0V. The internal load
switch control pin is set HIGH if VBUS is less than 3.3V or
greater than 6.0V, turning off the PMOS switch.
CON: 1.5pF
Package: 8-Lead MLP
Applications
The FAN3989 is available in a very small 8-lead MLP
package suitable for small board space applications, like
mobile phones.
.
.
Mobile Phones
Handheld Devices
Related Resources
.
AN-5067 — PCB Land Pattern Design and Surface
Mount Guidelines for MLP Packages
Ordering Information
Operating
Temperature Range
Packing
Method
Part Number
Package
Quantity
FAN3989MLP8X
-40°C to +85°C
8-Lead Molded Leadless Package (MLP)
Reel
3000
VOUT
LS CTRL
VBUS
Comparator
OVP
UVP
FLAG 2
Logic
Std USB/
Charger
Detect
D-
D+
FLAG 1
Logic
GND
Figure 1.
Block Diagram
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN3989
Rev. 1.0.8
Pin Configuration
Figure 2.
Pin Configuration (Top View)
Figure 3.
Pin Configuration (Bottom View)
Pin Definitions
Pin#
Name
D+
Type
Input
Description
USB Data Input
Device Ground
1
2
3
4
GND
Input
Flag2
LSCTRL
Output
Output
Over-/Under-Voltage Flag Output
PMOS Switch Control – Pull-Up Connection to VBUS
Voltage Out – Connection also on Package DAP (see PCB Layout Guideline
section)
5
VOUT
Output
6
7
8
VBUS
Flag1
D-
Input
Output
Input
Power Input from Charger, USB Device, or Handheld Battery
Charger / Standard USB Device Detect Flag
USB Data Input
Truth Table
Connection
State
LS
VBUS
D-
D+
FLAG1 FLAG2
Description
CTRL
HIGH
LOW
STD USB Device
STD USB Device
0V
5V
R to GND
R to GND
R to VDD
R to VDD
LOW
LOW
LOW
HIGH
Load switch open
Load switch closed
Normal state,
load switch closed
USB Charger
5V
Short to D+ Short to D-
HIGH
HIGH
LOW
VBUS GT 6V
VBUS LT 3.3V
PC Charger
GT 6V
Short to D+ Short to D-
HIGH
HIGH
LOW
LOW
LOW
HIGH
HIGH
HIGH
LOW
Load switch open
Load switch open
Load switch closed
LT 3.3V Short to D+ Short to D-
5V Open Open
© 2007 Fairchild Semiconductor Corporation
FAN3989 • Rev. 1.0.8
www.fairchildsemi.com
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
VS
Parameter
Min.
-0.3
-0.3
Max.
20.0
Unit
V
DC Supply Voltage
Analog and Digital I/O
VIO
VCC+0.3
V
Reliability Information
Symbol
Parameter
Min.
Typ.
Max.
+150
+150
Unit
TJ
Junction Temperature
°C
°C
TSTG
Storage Temperature Range
-65
Thermal Resistance, JEDEC Standard,
Multilayer Test Boards, Still Air
41
°C/W
JA
Electrostatic Discharge Information
Symbol
Parameter
Max.
Unit
Human Body Model, JESD22-A114
Charged Device Model, JESD22-C101
3
1
ESD
kV
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
TA
Parameter
Operating Temperature Range
Supply Voltage Range
Min.
-40
Typ.
Max.
+85
Unit
°C
VCC
2.7
5.0
20.0
V
© 2007 Fairchild Semiconductor Corporation
FAN3989 • Rev. 1.0.8
www.fairchildsemi.com
3
DC Electrical Characteristics
TA = 25°C, VCC = 5.0V, unless otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ. Max. Units
Supply
VS
ICC
Supply Voltage Range
VS Range
VS = +5.0V, D+ D- Shorted
2.7
5.0
1.2
10
20.0
2.0
V
Quiescent Supply Current
mA
ms
tSUPPLY
Power-Up Stabilization Time VS = +5.0V, D+ D- Shorted
Input Characteristics
CD+
CD-
Input Capacitance
1.5
1.5
1
2.0
2.0
pF
pF
µA
µA
Input Capacitance
Off Leakage Current
Off Leakage Current
Ioff D+
Ioff D-
VBUS = 0V or 5V VIN on D+ = 5V
VBUS = 0V or 5V VIN on D- = 5V
1
Output Characteristics
Over-Voltage Threshold
Detect
OVDETECT
OVHYST
VS = +5.0V, Flag2 = LOW
5.8
3.0
2.4
6.2
100
3.3
6.5
3.6
V
mV
V
Voltage Sweep through Upper
and Lower Trip Points
Over-Voltage Hysteresis
Under-Voltage Threshold
Detect
UVDETECT
UVHYST
VS = +5.0V, Flag2 = LOW
Voltage Sweep through Upper
and Lower Trip Points
Under-Voltage Hysteresis
100
mV
V
VOH FLAG1/ Minimum HIGH Output
FLAG2 Voltage
VS = +5.0V, IOH = -20µA
VS = +5.0V, IOL = 20µA
VS = +5.0V, IOL = 100µA
VGS = 0V, ID = -250µA
VGS = -5.0V, IP = 1A
VOL FLAG1/ Maximum LOW Output
0.3
0.3
V
FLAG2
Voltage
VOL
Maximum LOW Output
LS_CTRL Voltage
V
Drain Source Breakdown
Voltage
VBDSS
RDSON
-20
V
Static Drain-Source On
Resistance
186
mΩ
Ciss
Coss
td(on)
td(off)
Input Capacitance
330
80
5
pF
pF
µs
µs
VDS = -10V, VGS = 0V, f = 1.0MHz
VDD = -5V, IP = -0.5A,
Output Capacitance
PMOS Turn-On Delay Time
PMOS Turn-Off Delay Time
VGS = -4.5V, RGEN = 6Ω
14
© 2007 Fairchild Semiconductor Corporation
FAN3989 • Rev. 1.0.8
www.fairchildsemi.com
4
Typical Performance Characteristics
V
= 8.0V- 21V
V
= 2.7V-7.0V
CC
CC
1.8
1.6
1.4
1.2
1
1.00
0.90
0.80
0.70
0.60
0.50
0.40
Icc
I
CC
0.8
0.6
0.4
VCC
V
CC
Figure 4. ICC vs. VCC (2.7V-7.0V) No Load
Figure 5. ICC vs. VCC (8.0V-21V) No Load
R
vs V
CC
ON
192.0
190.0
188.0
186.0
184.0
182.0
180.0
R
ON
V
CC
Figure 6. RON vs. VCC (10 Load)
Figure 7. Turn-On Time
© 2007 Fairchild Semiconductor Corporation
FAN3989 • Rev. 1.0.8
www.fairchildsemi.com
5
Typical Performance Characteristics (Continued)
Figure 8.
Turn-Off Time
Figure 9.
No Fault on Flag 1, Skew=65ns
© 2007 Fairchild Semiconductor Corporation
FAN3989 • Rev. 1.0.8
www.fairchildsemi.com
6
Typical Performance Characteristics (Continued)
Figure 10. PC Data Running D+/D- (Flag 1 and Flag 2 at Correct Levels)
Figure 11. Standard USB Charger Plug-In
© 2007 Fairchild Semiconductor Corporation
FAN3989 • Rev. 1.0.8
www.fairchildsemi.com
7
Applications Information
VDD
Control
Battery
1.5K
USB Transceive r
Std 15K pull-dow n
on D- input by US B
device and 1.5K pull-u p
on D+ by USB transceiver .
R sense
V
LSctrl
OUT
V
BUS
15K
V
BUS
Flag 2
Comparato r
D -
D +
Gnd
OVP
UVP
Logic
U SB
USB
Device
D-
Std USB/
Charge r
Detect
Logic
D+
Flag 1
GND
Figure 12. Mobile Phone Battery Charging System with USB Interface
The FAN3989 sets the FLAG1 pin to logic HIGH or
LOW as an indicator to the system controller that a
standard USB device or a charger is connected to the
USB port. The FAN3989 also monitors the VBUS for
over- or under-voltage conditions. If VBUS is less than
3.3V or greater than 6.0V, the FLAG2 pin is set LOW
and the internal load switch control pin is set HIGH,
turning off the PMOS switch.
complete. If D+ and D- are shorted when a charger is
plugged into the USB port, the USB switch is on and
pulled to VDD, which is about 3V, making both D+ and
D- HIGH. Flag1 is also set HIGH, indicating that a
charging device is connected to the port. If D+ and D-
are connected to a standard USB device, the D+ is
pulled to VDD and D- is set low (due to the 15Kꢀ pull-
down resistor on the USB device) and flag1 is LOW. If
D+ and D- are open (floating), D+ is pulled to VDD and
D- floats LOW, which makes flag1 LOW.
In a standard USB configuration, there is a switch in
the USB transceiver that is always on in full-speed
mode. It is on during the transition from full-speed to
high-speed mode and turned off after enumeration is
© 2007 Fairchild Semiconductor Corporation
FAN3989 • Rev. 1.0.8
www.fairchildsemi.com
8
Applications Information (Continued)
Contro l
Batter y
R s en s e
VOUT
LSctrl
VBUS
V
BUS
Flag 2
D -
D +
G nd
Comparato r
OVP
UVP
Logi c
U SB
D-
Std USB /
Charge r
Detec t
Logi c
D+
Flag 1
GND
5M
1M
V
DD
Figure 13. Mobile Phone Battery Charging System without USB Interface
The FAN3989 sets the FLAG1 pin to logic HIGH or
LOW as an indicator to the system controller that a
standard USB device or a charger is connected to the
USB port. The FAN3989 also monitors the VBUS for
over- or under-voltage conditions. If VBUS is less than
3.3V or greater than 6.0V, the FLAG2 pin is set LOW
and the internal load switch control pin is set HIGH,
turning off the PMOS switch.
the USB port (D+ and D- shorted), the voltage divider
of 1M and 5M put a voltage of 2.3V on the D+D-
inputs and flag1 is HIGH, indicating a charger is
connected to port.
If the USB port is connected to a standard USB
device, the D+ input is pulled up to VDD and is in
parallel with the 1.5Kꢀ on a USB transceiver with a
parallel R value of 1.497Kꢀ. The D- input is
connected to a 15Kꢀ pull-down by the USB device
and in parallel with 5Mꢀ with a parallel R value of
14.955Kꢀ. This condition forces flag1 LOW. If D+ and
D- are open (floating), D+ is pulled to VDD and D-
floats LOW, which forces flag1 LOW.
Where a USB transceiver is not incorporated or there
is a switch between the USB port and the FAN3989,
external resistors are used to set the correct input
logic states on the D+ and D- inputs. A 5Mꢀ pull-
down on the D- line and a 1Mꢀ pull-up to VDD on the
D+ line are recommended. If a charger is plugged into
© 2007 Fairchild Semiconductor Corporation
FAN3989 • Rev. 1.0.8
www.fairchildsemi.com
9
PCB Layout Guidelines
Please also see Fairchild Semiconductor applications
note AN-5067 — PCB Land Pattern Design and Surface
Mount Guidelines for MLP Packages
should never be connected to the ground, power plane,
or Pad2.
Pad2
Pad1
This exposed DAP is connected to an internal die
substrate that is at a ground potential. The pad should
be left floating or can be connected to ground plane.
This pad should never be connected to Pad1 or the
power plane.
This exposed DAP is connected to the internal FET
drain and labeled VOUT on the device. The pad should
be connected to VOUT pin of the device or left floating. It
Figure 14. PCD / Pad Layout
© 2007 Fairchild Semiconductor Corporation
FAN3989 • Rev. 1.0.8
www.fairchildsemi.com
10
Physical Dimensions
Figure 15. 8-Lead Molded Leadless Package (MLP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2007 Fairchild Semiconductor Corporation
FAN3989 • Rev. 1.0.8
www.fairchildsemi.com
11
© 2007 Fairchild Semiconductor Corporation
FAN3989 • Rev. 1.0.8
www.fairchildsemi.com
12
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coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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