EFC3J018NUZTDG [ONSEMI]

Power MOSFET, Dual N-Channel, 20 V, 23 A, 4.7 mΩ;
EFC3J018NUZTDG
型号: EFC3J018NUZTDG
厂家: ONSEMI    ONSEMI
描述:

Power MOSFET, Dual N-Channel, 20 V, 23 A, 4.7 mΩ

文件: 总8页 (文件大小:224K)
中文:  中文翻译
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DATA SHEET  
www.onsemi.com  
MOSFET – Power, Dual,  
N-Channel, for 1-2 Cells  
Lithium-ion Battery  
Protection  
V
R
MAX  
I MAX  
S
SSS  
SS(ON)  
20 V  
4.7 mW @ 4.5 V  
4.75 mW @ 4.0 V  
4.9 mW @ 3.8 V  
5.4 mW @ 3.1 V  
9.0 mW @ 2.5 V  
23 A  
20 V, 4.7 mW, 23 A  
ELECTRICAL CONNECTION  
EFC3J018NUZ  
4, 6  
Introduction  
Rg  
This Power MOSFET features a low onstate resistance. This  
device is suitable for applications such as power switches of portable  
machines. Best suited for 12 cells lithiumion battery applications.  
5
2
1: Source1  
2: Gate1  
Rg  
Features  
2.5 V Drive  
2 kV ESD HBM  
3: Source1  
4: Source2  
5: Gate2  
Common-Drain Type  
ESD Diode-Protected Gate  
This Device is Pb-Free and Halide Free  
6: Source2  
1, 3  
Rg = 200 W  
N-Channel  
Applications  
1-2 Cells Lithium-ion Battery Charging and Discharging Switch  
Specifications  
WLCSP6, 1.77 y 3.05  
CASE 567KS  
ABSOLUTE MAXIMUM RATINGS (T = 25°C)  
A
Parameter  
Source to Source Voltage  
Gate to Source Voltage  
Symbol  
Value  
20  
Unit  
V
MARKING DIAGRAM  
V
SSS  
GSS  
V
12  
V
MT  
Maximum Operating Gate to Source  
Voltage (Note 1)  
V
8
V
YMZZ  
GSS(OP)  
Source Current (DC)  
I
23  
A
A
S
MT  
Y
= Specific Device Code  
= Year  
Source Current (Pulse)  
PW 100 ms, duty cycle 1%  
I
SP  
100  
M
= Month  
Total Dissipation (Note 2)  
Junction Temperature  
P
2.5  
W
ZZ  
= Assembly Lot Number  
T
T
150  
°C  
j
ORDERING INFORMATION  
See detailed ordering and shipping information on page 6 of  
this data sheet.  
Storage Temperature  
T
55 to +150  
°C  
stg  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
1. Functional operation above the stresses listed in the recommended operating  
ranges is not implied. Extended exposure to stresses beyond the  
recommended operating ranges limits may affect device reliability.  
THERMAL RESISTANCE RATINGS  
Parameter  
Symbol  
Value  
Unit  
Junction to Ambient (Note 2)  
R
50  
°C/W  
θ
JA  
2
2. Surface mounted on ceramic substrate (5000 mm × 0.8 mm).  
© Semiconductor Components Industries, LLC, 2016  
1
Publication Order Number:  
September, 2022 Rev. 2  
EFC3J018NUZ/D  
 
EFC3J018NUZ  
ELECTRICAL CHARACTERISTICS (T = 25°C) (Note 3)  
A
Parameter  
Symbol  
Conditions  
I = 1 mA, V = 0 V (Figure 1)  
Min  
20  
Typ  
Max  
Unit  
V
Source to Source Breakdown Voltage  
Zero-Gate Voltage Source Current  
Gate to Source Leakage Current  
Gate Threshold Voltage  
V
(BR)SSS  
S
GS  
I
V
= 20 V, V = 0 V (Figure 1)  
1
mA  
mA  
V
SSS  
GSS  
SS  
GS  
SS  
GS  
I
V
V
=
8 V, V = 0 V (Figure 2)  
1
SS  
V
R
(th)  
= 10 V, I = 1 mA (Figure 3)  
0.5  
2.5  
2.56  
2.6  
2.9  
3.3  
1.3  
4.7  
4.75  
4.9  
5.4  
9.0  
GS  
S
Static Source to Source On-State  
Resistance  
(on) I = 5 A, V = 4.5 V (Figure 4)  
3.6  
3.65  
3.75  
4.15  
4.75  
280  
890  
4100  
2800  
75  
mW  
mW  
mW  
mW  
mW  
ns  
SS  
S
GS  
I = 5 A, V = 4.0 V (Figure 4)  
S
GS  
I = 5 A, V = 3.8 V (Figure 4)  
S
GS  
I = 5 A, V = 3.1 V (Figure 4)  
S
GS  
I = 5 A, V = 2.5 V (Figure 4)  
S
GS  
Turn-ON Delay Time  
Rise Time  
t (on)  
d
V = 10 V, V = 4.5 V, I = 3 A  
SS GS S  
(Figure 5)  
t
r
ns  
Turn-OFF Delay Time  
Fall Time  
t (off)  
d
ns  
t
f
ns  
Total Gate Charge  
Qg  
V
SS  
= 10 V, V = 4.5 V, I = 23 A  
nC  
GS  
S
(Figure 6)  
Forward Source to Source Voltage  
V
F(S-S)  
I = 3 A, V = 0 V  
(Figure 7)  
0.74  
1.2  
V
S
GS  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
3. Refer to the JIS 7030 measuring methods for transistors for measuring.  
www.onsemi.com  
2
 
EFC3J018NUZ  
Test Circuits are Example of Measuring FET1 Side  
/ I  
V
I
(BR)SSS SSS  
GSS  
S2  
S2  
S1  
G2  
G1  
G2  
A
G1  
A
V
SS  
When FET1 is measured,  
Gate and Source of FET2  
are shortcircuited.  
V
GS  
S1  
Figure 1. Test Circuit 1  
Figure 2. Test Circuit 2  
V
GS  
(th)  
G2  
G1  
R
(on)  
SS  
S2  
S1  
S2  
S1  
IS  
G2  
A
When FET1 is measured,  
Gate and Source of FET2  
are shortcircuited.  
V
G1  
V
SS  
V
GS  
V
GS  
Figure 3. Test Circuit 3  
Figure 4. Test Circuit 4  
Qg  
t (on), t , t (off), t  
d
r
d
f
S2  
S2  
RL  
A
G2  
G2  
When FET1 is measured,  
Gate and Source of FET2  
are shortcircuited.  
V
I
G
= 1 mA  
PG  
G1  
G1  
RL  
V
SS  
S1  
S1  
V
SS  
PG  
When FET1 is measured,  
Gate and Source of FET2  
are shortcircuited.  
Figure 5. Test Circuit 5  
Figure 6. Test Circuit 6  
V
F(SS)  
S2  
IS  
G2  
G1  
VGS = 0 V  
V
When FET1 is measured,  
S1  
+4.5 V is added to V  
of FET2.  
GS  
Figure 7. Test Circuit 7  
NOTE: When FET2 is measured, the position of FET1 and FET2 is switched.  
www.onsemi.com  
3
EFC3J018NUZ  
6.0  
5.5  
5.0  
4.5  
4.0  
3.5  
3.0  
10  
9
T = 25°C  
4.5 V  
3.8 V  
3.1 V  
A
V
SS  
= 10 V  
8
1.8 V  
25°C  
2.5 V  
7
6
5
4
3
T = 75°C  
A
2.5  
2.0  
1.5  
1.0  
25°C  
2
1
0
1.3 V  
0.5  
0
V
= 1.0 V  
GS  
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0  
0
0.5  
1.0  
1.5  
2.5  
2.0  
V
SS  
, Source to Source Voltage (V)  
V
GS  
, Gate to Source Voltage (V)  
Figure 9. IS VGS  
Figure 8. IS VSS  
10  
9
30  
25  
20  
15  
10  
5
I
S
= 5 A  
T = 25°C  
S
A
I
= 5 A  
8
V
GS  
= 2.5 V  
7
V
GS  
= 3.1 V  
6
5
V
GS  
= 3.8 V  
4
V
GS  
= 4.0 V  
3
2
1
0
V
GS  
= 4.5 V  
0
0
2
4
8
10  
0
40  
6
60 40 20  
20  
60 80 100 120 140 160  
V
GS  
, Gate to Source Voltage (V)  
T , Ambient Temperature(5C)  
A
Figure 10. RSS(on) VGS  
Figure 11. RSS(on) Ta  
10000  
10  
7
V
GS  
= 0 V  
7
5
td(off)  
tf  
5
3
2
3
2
T = 75°C  
A
25°C  
1.0  
7
5
3
2
1000  
25°C  
7
5
tr  
0.1  
7
td(on)  
3
2
5
3
2
V
= 10 V  
= 4.5 V  
SS  
V
GS  
100  
0.01  
0.01  
2 3 5 7  
100  
2 3 5 7  
0.1  
2 3 5 7 2 3 5 7  
1.0 10  
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0  
I , Source Current (A)  
S
V , Forward Source to Source Voltage (V)  
F(S-S)  
Figure 12. IS VF(SS)  
Figure 13. SW Time IS  
www.onsemi.com  
4
EFC3J018NUZ  
1000  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
7
5
3
2
V
= 10 V  
= 23 A  
SS  
I
S
I
= 100 A (PW 100 ms)  
SP  
100  
7
5
3
2
I
S
= 23 A  
1 ms  
10  
7
5
3
10 ms  
2
Operation in  
1.0  
this area is limited  
7
100 ms  
DC Operation  
5
by R (on).  
SS  
3
2
T
A
= 25°C  
Single Pulse  
0.1  
7
5
When mounted on ceramic substrate  
3
2
2
(5000 mm x 0.8 mm)  
0.01  
2 3 5 7  
100  
2 3 5 7  
2 3 5 7  
2 3 5 7  
1.0 10  
0
10  
20  
30  
40  
50  
60  
70  
80  
0.01  
0.1  
V
SS  
, Source to Source Voltage (V)  
Figure 15. SOA  
Qg, Total Gate Charge (nC)  
Figure 14. VGS Qg  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
Surface mounted on ceramic substrate  
(5000 mm x 0.8 mm)  
2
0
20  
40  
60  
80  
100 120 140 160  
T , Ambient Temperature (5C)  
A
Figure 16. PT Ta  
100  
7
5
Duty Cycle = 0.5  
0.2  
3
2
10  
0.1  
0.05  
7
5
3
2
0.02  
0.01  
1.0  
7
5
3
2
0.1  
7
5
3
2
0.01  
Single Pulse  
7
5
3
2
Surface mounted on ceramic substrate  
2
(5000 mm x 0.8 mm)  
0.001  
3
7
3
7
3
7
2
5
3
7
5
2
5
2
5
3
7
2
3
7
3
7
5
2
5
2
5
2
0.00001  
0.001  
P , Pulse Time (s)  
0.01  
0.1  
1.0  
10  
0.000001  
0.0001  
T
Figure 17. RqJA Pulse Time  
www.onsemi.com  
5
EFC3J018NUZ  
ORDERING INFORMATION  
Device  
Marking  
Package  
Shipping (Qty / Packing)  
EFC3J018NUZTDG  
MT  
WLCSP6, 1.77 × 3.05  
(Pb-Free / Halide Free)  
5000 / Tape & Reel  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
Note on usage: Since the EFC3J018NUZ is a MOSFET product, please avoid using this device in the vicinity of highly charged objects. Please contact sales  
for use except the designated application.  
www.onsemi.com  
6
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
WLCSP6, 1.77x3.05  
CASE 567KS  
ISSUE O  
DATE 29 OCT 2014  
SCALE 4:1  
NOTES:  
E
A
B
D
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
MILLIMETERS  
DIM  
A
b
b1  
D
MIN  
−−−  
0.22  
0.32  
MAX  
0.145  
0.28  
PIN A1  
REFERENCE  
0.38  
1.77 BSC  
2X  
E
e
e2  
L
3.05 BSC  
0.80 BSC  
0.8775 BSC  
0.05  
0.05  
C
2X  
C
0.975  
1.035  
TOP VIEW  
SIDE VIEW  
A
RECOMMENDED  
SOLDERING FOOTPRINT*  
0.03  
0.03  
C
C
2X  
4X  
8X  
R0.18  
SEATING  
0.25  
C
1.005  
PLANE  
PACKAGE  
OUTLINE  
e2  
e2  
2X  
b
e/2  
1
2
3
0.80  
PITCH  
0.05  
0.03  
C
C
A B  
e
1
1.76  
PITCH  
DIMENSIONS: MILLIMETERS  
4X b1  
6
5
4
*For additional information on our PbFree strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
L
BOTTOM VIEW  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON92329F  
WLCSP6, 1.77X3.05  
PAGE 1 OF 1  
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