CAT1232LP [ONSEMI]
5 V and 3.3 V Supply Monitor, Watchdog Timer, Manual Reset, with Active High & Low Resets; 5 V和3.3 V电源监视器，看门狗定时器，手动复位，与Active高，低复位
| 型号： | CAT1232LP |
| 厂家： | 
ONSEMI |
| 描述： | 5 V and 3.3 V Supply Monitor, Watchdog Timer, Manual Reset, with Active High & Low Resets |
| 文件： | 总12页 (文件大小：185K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CAT1232LP, CAT1832
5 V and 3.3 V Supply Monitor, Watchdog Timer,
Manual Reset, with Active High & Low Resets
FEATURES
DESCRIPTION
Selectable reset voltage tolerance
— CAT1232LP for 5 V supply
— CAT1832 for 3.3 V supply
The CAT1232LP and CAT1832 microprocessor
supervisors can halt and restart a “hung-up” or
“stalled” microprocessor, restart a microprocessor
after a power failure, and debounce a manual/push-
button microprocessor reset switch. The devices are
drop in replacements for the Maxim/Dallas
Semiconductor DS1232LP and DS1832 supervisors
Selectable watchdog period:
150 ms, 600 ms or 1.2 s
Two reset outputs
— Active high, push-pull reset output
Precision reference and comparator circuits monitor
the 5 V or 3.3 V system power supply voltage, VCC.
During power-up or when the power supply falls
outside selectable tolerance limits, both the RESET
— Active low, open-drain reset output
(CAT1232LP)
— Active low, push-pull reset output (CAT1832)
Debounced manual push-button reset
Compact SOIC and MSOP packages
¯¯¯¯¯¯
and RESET become active. After the power supply
voltage rises above the RESET threshold voltage, the
reset signals remain active for a minimum of 250ms,
allowing the power supply and system processor to
stabilize. The trip-point tolerance input, TOL, selects
the trip level tolerance to be either 5% or 10% for the
CAT1232LP 5 V supply and 10% or 20% for the
CAT1832 3.3 V supply.
For Ordering Information details, see page 11.
APPLICATIONS
Microprocessor Systems
Portable Equipment
Controllers
Each device has a push-pull, active HIGH reset
output. The CAT1232LP also has an open drain,
active LOW reset output while the CAT1832 also has
a push-pull, active LOW reset output.
Single Board Computers
Instrumentations
A debounced manual reset input activates the reset
outputs and holds them active for a minimum period of
250 ms after being released.
Telecommunications
Also included is a watchdog timer to reset a
microprocessor that has stopped due to a software or
hardware failure. Three watchdog time-out periods are
¯¯
selectable: 150 ms, 600 ms and 1.2 s. If the ST input
is not strobed low before the watchdog time out period
expires, the reset signals become active for a
minimum of 250 ms.
FUNCTIONAL DIAGRAM
V
CC
RESET
(CAT1232LP)
TOL
Tolerance Selection
Reference
+
–
V
CC
40kΩ
RESET
RESET
PBRST
TD
Push Button Debounce
Watchdog Timebase Selection
Watchdog Transition Detector
Reset &
Watchdog Timer
(CAT1832)
ST
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
1
Doc. No. MD-3018 Rev. F
CAT1232LP, CAT1832
PIN CONFIGURATION
SOIC 8 Lead
SOIC 16 Lead
MSOP 8 Lead
PDIP 8 Lead
NC
1
2
3
16 NC
15 VCC
14 NC
¯¯¯¯¯¯
PBRST
¯¯¯¯¯¯
PBRST
1
8
VCC
NC
TD
¯¯
2 CAT 7
TD
TOL
GND
ST
¯¯
ST
4 CAT 13
¯¯¯¯¯¯
RESET
3
6
NC
5
6
7
8
12 NC
4
5
RESET
¯¯¯¯¯¯
TOL
NC
11
RESET
10 NC
RESET
GND
9
PIN DESCRIPTION
Pin Number Pin Number
8-Lead
Package
16-Lead
Package
Name Function
¯¯¯¯¯¯
PBRST
1
2
Debounced manual pushbutton reset input
Watchdog typical time delay selection:
a) tTD = 150 ms for TD = GND
b) tTD = 600 ms for TD = Open
c) tTD = 1200 ms for TD = VCC
2
4
TD
CAT1232LP TOL selects 5% (TOL = GND) or 10% (TOL = VCC) trip
point tolerance. CAT1832 TOL selects 10% (TOL = GND) or 20%
TOL = VCC) trip point tolerance.
3
4
6
8
TOL
GND
Ground
Active HIGH reset output. RESET is active
1. If VCC falls below the reset voltage trip point
¯¯¯¯¯¯
RESET 2. If PBRST is low
5
9
¯¯
3. If ST is not strobed low before the timeout period set by TD expires.
4. During power-up.
6
7
8
11
13
15
RESET Active LOW reset output. (See RESET)
¯¯
ST
Strobe Input
VCC
NC
Power Supply
1, 3. 5, 7, 10,
12, 14, 16
No internal connection
ABSOLUTE MAXIMUM RATINGS (*)
Parameters
Ratings
-0.5 to 7.0
Units
Parameters
Ratings Units
125 ºC
-65 to +150 ºC
Voltage on VCC
V
V
Maximum Junction Temperature
Storage Temperature Range
Lead Soldering Temperature (10s)
Operating Temperature Range
¯¯
-0.5 to VCC + 0.5
Voltage on ST and TD
¯¯¯¯¯¯
Voltage on PBRST,
¯¯¯¯¯¯
RESETand RESET
300
ºC
ºC
-0.5 to VCC + 0.5
V
-40 to +85
Note:
*
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
Doc. No. MD-3018 Rev. F
2
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT1232LP, CAT1832
ELECTRICAL CHARACTERISTICS
Unless otherwise stated, 1.0 V - VCC - 5.5 V and over the operating temperature range of -40ºC to +85ºC.
All voltages are referenced to ground.
Symbol Parameter
VCC Supply Voltage
Conditions
Min
Typ
Max
5.5
50
Units
1.0
V
VCC = 5.5 V, CAT1232LP
35
20
ICC1
Supply Current
µA
V
VCC = 3.6 V, CAT1832
35
(5)
2
¯¯¯¯¯¯
ST and PBRST Input High
Level
VIH
VIL
VCC + 0.3 V
(6)
VCC - 0.4 V
-0.3
VCC = 5.5 V, CAT1232LP
VCC = 3.6 V, CAT1832
CAT1232LP
CAT1232LP
CAT1832
0.8
0.5
¯¯¯¯¯¯
ST and PBRST Input Low
V
Level
VCCTP VCC Trip Point (TOL = GND)
VCCTP VCC Trip Point (TOL = VCC)
VCCTP VCC Trip Point (TOL = GND)
VCCTP VCC Trip Point (TOL = VCC)
4.50
4.25
2.80
2.47
62.5
500
4.62
4.37
2.88
2.55
150
4.74
4.49
2.97
2.64
250
V
V
V
CAT1832
V
tTD
tTD
Watchdog Time-Out Period
Watchdog Time-Out Period
Watchdog Time-Out Period
Output Voltage
TD = GND
TD = VCC
ms
ms
ms
V
1200
600
2000
1000
tTD
TD floating
I = -500 µA (3)
Output = 2.4 V (2)
Output = 0.4 V
(1)
250
VOH
IOH
VCC -0.5 V VCC -0.1 V
Output Current
-350
µA
mA
µA
kꢀ
pF
pF
IOL
Output Current
10
IIL
Input Leakage
-1.0
1.0
55
5
RPU
CIN
COUT
Internal Pull-Up Resistor
Input Capacitance
(1)
32
40
Output Capacitance
7
¯¯¯¯¯¯
Minimum Low Time
PBRST Manual Reset
¯¯¯¯¯¯
PBRST = VIL
tPB
20
ms
tRST
tST
tRPD
tF
Reset Active Time
250
20
600
5
1000
8
ms
ns
¯¯
(4)
ST Pulse Width
VCC Fail Detect to RESET or
µs
µs
¯¯¯¯¯¯
RESET
VCC Slew Rate
20
¯¯¯¯¯¯
PBRST Stable LOW to RESET
¯¯¯¯¯¯
and RESET Active
tPDLY
20
ms
V
CC Detect to RESET or
tRPU
tR
t
RISE = 5 µs
250
0
600
1000
ms
ns
¯¯¯¯¯¯
RESET Inactive
VCC Slew Rate
4.25 V to 4.75 V
Notes:
¯¯¯¯¯¯
(1) PBRST is internally pulled HIGH to VCC through a nominal 40 kꢀ resistor (RPU).
¯¯¯¯¯¯
(2) RESET is an open drain output on the CAT1232LP.
(3) RESET remains within 0.5 V of VCC on power-down until VCC falls below 2 V. RESET remains within 0.5 V of ground on power-down until
VCC falls below 2.0 V.
¯¯
(4) Must not exceed the minimum watchdog time-out period (tTD). The watchdog circuit cannot be disabled. To avoid a reset, ST must be
strobed.
(5) Measured with VCC ≥ 2.7 V.
(6) Measured with VCC < 2.7 V.
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
3
Doc. No. MD-3018 Rev. F
CAT1232LP, CAT1832
TYPICAL CHARACTERISTICS
For the CAT1232LP, VCC = 5 V and TAM B = 25ºC unless otherwise stated.
Threshold Voltage vs. Temperature (10% TOL)
Threshold Voltage vs. Temperature (5% TOL)
4.450
4.630
4.625
4.620
4.615
4.610
4.445
TOL = GND (5%)
TOL = Vcc (10%)
4.440
4.435
4.430
-50
0
50
100
-50
0
50
100
TEMPERATURE (°C)
TEMPERATURE (ºC)
Supply Current vs. Temperature
Reset Active Time vs. Temperature
40
800
Vcc = 5.5V
30
TD = open
700
600
500
400
300
Vcc = 5.5V
Vcc = 4.5V
20
Vcc = 4.5V
10
0
-50
0
50
100
-50
0
50
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Reset Active Time Waveform
Transient Response
Doc. No. MD-3018 Rev. F
4
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT1232LP, CAT1832
APPLICATION INFORMATION
SUPPLY VOLTAGE MONITOR
Reset Signal Polarity and Output Stage Structure
Tolerance
Select
Voltage
¯¯¯¯¯¯
RESET is an active LOW signal. It is developed with
Trip Point Voltage (V)
Trip Point
Tolerance
an open drain driver in the CAT1232LP. A pull-up
resistor is required, typical values are 10 kꢀ to 50 kꢀ.
The CAT1832 uses a CMOS push-pull output stage
Min
Nominal
Max
CAT1232LP
TOL = VCC
10 %
5 %
4.25
4.37
4.49
¯¯¯¯¯¯
for the RESET.
CAT1232LP
TOL = GND
4.50
2.47
2.80
4.62
2.55
2.88
4.74
2.64
2.97
RESET is an active High signal developed by a
CMOS push-pull output stage and is the logical
¯¯¯¯¯¯
opposite to RESET.
CAT1832
TOL = VCC
20 %
10 %
CAT1832
TOL = GND
Trip Point Tolerance Selection
The TOL input is used to select the VCC trip point
threshold. This selection is made connecting the
TOL input to ground or VCC. Connecting TOL to
Ground makes the VCC trip threshold 4.62 V for the
CAT1232LP and 2.88 V for the CAT1832.
Manual Reset Operation
¯¯¯¯¯¯
Push-button input, PBRST, allows the user to issue
reset signals. The pushbutton input is debounced and
is pulled high through an internal 40 kꢀ resistor.
Connecting TOL to VCC makes the VCC trip threshold
4.37 V for the CAT1232LP and 2.55 V for the
CAT1832.
¯¯¯¯¯¯
When PBRST is held low for the minimum time of
20 ms, both resets become active and remain active
for a minimum time period of 250 ms after PBRST
returns high.
After VCC has risen above the trip point set by TOL,
¯¯¯¯¯¯
RESET and RESETremain active for a minimum time
period of 250 ms.
¯¯¯¯¯¯
No external pull-up resistor is required, since PBRST
is pulled high by an internal 40 kꢀ resistor.
On power-down, once VCC falls below the reset
threshold the RESET outputs will remain active and
are guaranteed valid down to a VCC level of 1.0 V.
¯¯¯¯¯¯
PBRST can be driven from a TTL or CMOS logic line
or short-ed to ground with a mechanical switch.
Figure 2. Timing Diagram: Power Down
Figure 1. Timing Diagram: Power Up
tF
VCC
tR
VCCTP(MAX)
VCCTP(MAX)
VCCTP
VCCTP
VCCTP(MIN)
VCCTP(MIN)
VCC
tRPU
tRPD
RESET
VOH
RESET
VOH
VOL
VOL
RESET
RESET
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
5
Doc. No. MD-3018 Rev. F
CAT1232LP, CAT1832
¯¯
WATCHDOG TIMER AND ST INPUT
A watchdog timer stops and restarts a microprocessor
that has stopped proper operation or become “hung”.
The watchdog performs this function by monitoring the
Watchdog Time-out Period (ms)
TD Voltage
Level
Min
62.5
250
500
Nominal
150
Max
250
GND
Floating
VCC
¯¯
¯¯
ST input. After the reset outputs go inactive the ST
input must be strobed with a high-to-low signal
transition prior to the minimum watchdog timeout
600
1000
2000
1200
¯¯
period. However if the ST input is not strobed with a
high-to-low signal transition prior to a watchdog
timeout the reset outputs will become active for TRST
reseting and restarting the microprocessor. Once the
resets return to the inactive state the watchdog timer
restarts the process.
3.3V
CAT1832
8
7
6
5
1
2
3
4
PBRST
TD
V
CC
I/O
ST
µP
The TD input allows the user to select from three
predetermined watchdog timeout periods. Always use
the minimum timeout period to determine the required
TOL
RESET
GND RESET
RESET
¯¯
frequency of ST high-to-low transitions and the
maximum to determine the time prior to the reset
¯¯
outputs becoming active. ST pulse widths must be
20 ns or greater.
Figure 4. CAT1832 Application Circuit:
Pushbutton Reset
The watchdog timer cannot be disabled. It must be
strobed with a high-to-low signal transition to avoid a
watchdog timeout and subsequent reset.
5V
CAT1232LP
1
2
3
4
8
7
6
5
MREQ
PBRST
TD
V
CC
10kꢀ
ST
µP
RESET
Decoder
TOL
RESET
Address Bus
GND RESET
Figure 5. CAT1232LP Application Circuit: Watchdog Timer
tPB
tPDLY
Valid
Strobe
Valid
Strobe
Invalid
Strobe
PBRST
ST
V
IH
V
IL
tST
tTD
tRST
tTD
(Min)
tRST
(Min)
RESET
RESET
RESET
RESET
VOH
VOL
Note: ST is ignored whenever a reset is active
Figure 7. Timing Diagram: Strobe Input
Figure 6. Timing Diagram: Pushbutton Reset
Doc. No. MD-3018 Rev. F
6
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT1232LP, CAT1832
PACKAGE OUTLINE DRAWINGS
SOIC 16-Lead 300 mils (W)(1)(2)
D
SYMBOL
MIN
NOM
MAX
2.64
0.30
0.51
0.28
10.49
10.64
7.59
A
A1
b
2.36
0.10
0.33
0.18
10.08
10.01
7.39
2.49
0.41
0.23
c
D
E
E1
e
10.31
10.31
7.49
E1 E
1.27 BSC
h
0.25
0.38
0º
0.75
1.27
8º
L
0.81
θ
PIN #1 IDENTIFICATION
TOP VIEW
h
c
A
θ
b
e
L
A1
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC MS-013.
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
7
Doc. No. MD-3018 Rev. F
CAT1232LP, CAT1832
PDIP 8-Lead 300mils (L)(1)(2)
SYMBOL
MIN
NOM
MAX
A
A1
A2
b
5.33
0.38
2.92
0.36
1.14
0.20
9.02
7.62
3.30
0.46
4.95
0.56
1.78
0.36
10.16
8.25
b2
c
1.52
E1
0.25
D
9.27
E
7.87
e
2.54 BSC
6.35
E1
eB
L
6.10
7.87
2.92
7.11
10.92
3.80
PIN # 1
IDENTIFICATION
3.30
D
TOP VIEW
E
A2
A1
A
L
c
b2
eB
e
b
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC MS-001.
Doc. No. MD-3018 Rev. F
8
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT1232LP, CAT1832
MSOP 8-Lead (Z) (1)(2)
SYMBOL
MIN
NOM
MAX
1.10
0.15
0.95
0.38
0.23
3.10
5.00
3.10
A
A1
A2
b
0.05
0.75
0.22
0.13
2.90
4.80
2.90
0.10
0.85
c
D
3.00
4.90
E
E
E1
E1
e
3.00
0.65 BSC
0.60
L
0.40
0º
0.80
6º
L1
L2
θ
0.95 REF
0.25 BSC
TOP VIEW
D
A2
A
DETAIL A
A1
e
b
c
SIDE VIEW
END VIEW
θ
L2
L
L1
DETAIL A
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-187.
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
9
Doc. No. MD-3018 Rev. F
CAT1232LP, CAT1832
SOIC 8-Lead 150mils (V) (1)(2)
SYMBOL
MIN
NOM
MAX
1.75
0.25
0.51
0.25
5.00
6.20
4.00
A
A1
b
1.35
0.10
0.33
0.19
4.80
5.80
3.80
c
E1
E
D
E
E1
e
1.27 BSC
h
0.25
0.40
0º
0.50
1.27
8º
L
PIN # 1
IDENTIFICATION
θ
TOP VIEW
D
h
A1
θ
A
c
e
b
L
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MS-012.
Doc. No. MD-3018 Rev. F
10
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT1232LP, CAT1832
EXAMPLE OF ORDERING INFORMATION(1)
Prefix
Device # Suffix
CAT
1232LP
V
– G
T3
Lead Finish
Blank: Matte-Tin
G: NiPdAu
Package
L: PDIP
V: SOIC 8-Lead
W: SOIC 16-Lead (5)
Z: MSOP
Tape & Reel
T: Tape & Reel
2: 2,000/Reel
3: 3,000/Reel
Company ID
Product Number
1232LP
1832
ORDERING PART NUMBER
Package
Parts per Tube
Parts Per Reel
Reel Size (inch)
CAT1232LPL-G
8-lead, PDIP
8-lead, SOIC
8-lead, MSOP
16-lead, SOIC
50
—
—
—
—
—
13
13
13
CAT1232LPV-GT3
CAT1232LPZ-GT3
CAT1232LPW-T2
3,000
3,000
2,000
CAT1832L-G
8-lead, PDIP
8-lead, SOIC
8-lead, MSOP
50
—
—
—
—
13
13
CAT1832V-GT3
CAT1832Z-GT3
3,000
3,000
Notes:
(1) All packages are RoHS-compliant (Lead-free, Halogen-free).
(2) The standard lead finish is NiPdAu.
(3) The device used in the above example is a CAT1232LPV-GT3 (SOIC 8-Lead, NiPdAu, Tape & Reel).
(4) For additional package and temperature options, please contact your nearest ON Semiconductor Sales office.
(5) The SOIC 16-Lead package is only available in Matte-Tin finish.
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
11
Doc. No. MD-3018 Rev. F
CAT1232LP, CAT1832
REVISION HISTORY
Date
Rev. Description
Initial Issue
13-Jun-05
00
0A
Update Electrical Characteristics
Add Typical Characteristics
26-Jul-05
37-Mar-06
27-Nov-06
Update Document Title
Update Ordering Information
0B
0C
Add Ordering Information detail to page 1
Update Sample of Ordering Information
Update Package Outline Drawings
Update Example of Ordering Information
Change document number from 25088, Rev. OC
13-Nov-07
D
Change logo and fine print to ON Semiconductor
Update Example of Ordering Information
06-Nov-08
09-Mar-09
E
F
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to
any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer
purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and
distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated
with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800-282-9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center:
Phone: 81-3-5773-3850
ON Semiconductor Website: www.onsemi.com
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada
Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
Doc. No. MD-3018 Rev. F
12
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
相关型号：
CAT1232LPJ
Power Supply Management Circuit, Fixed, 1 Channel, CMOS, PDSO16, 0.300 INCH, MS-013, SOIC-16
CATALYST
CAT1232LPJ-T13
Power Supply Management Circuit, Fixed, 1 Channel, CMOS, PDSO16, 0.300 INCH, MS-013, SOIC-16
CATALYST
©2020 ICPDF网 联系我们和版权申明