BUL45_06 [ONSEMI]

NPN Silicon Power Transistor; NPN硅功率晶体管
BUL45_06
型号: BUL45_06
厂家: ONSEMI    ONSEMI
描述:

NPN Silicon Power Transistor
NPN硅功率晶体管

晶体 晶体管
文件: 总8页 (文件大小:121K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
BUL45  
NPN Silicon Power  
Transistor  
High Voltage SWITCHMODEt Series  
Designed for use in electronic ballast (light ballast) and in  
Switchmode Power supplies up to 50 Watts.  
http://onsemi.com  
Features  
POWER TRANSISTOR  
5.0 AMPERES, 700 VOLTS,  
35 AND 75 WATTS  
Improved Efficiency Due to:  
Low Base Drive Requirements (High and Flat DC Current Gain h )  
FE  
Low Power Losses (On−State and Switching Operations)  
Fast Switching: t = 100 ns (typ) and t = 3.2 ms (typ)  
fi  
si  
@ I = 2.0 A, I = I = 0.4 A  
C
B1  
B2  
Full Characterization at 125°C  
Tight Parametric Distributions Consistent Lot−to−Lot  
Pb−Free Package is Available*  
TO−220AB  
CASE 221A−09  
MAXIMUM RATINGS  
Rating  
Symbol  
Value  
400  
Unit  
Vdc  
Vdc  
1
STYLE 1  
2
Collector−Emitter Sustaining Voltage  
Collector−Base Breakdown Voltage  
V
3
CEO  
V
700  
CES  
EBO  
Emitter−Base Voltage  
V
9.0  
Vdc  
Adc  
MARKING DIAGRAM  
Collector Current − Continuous  
− Peak (Note 1)  
I
5.0  
10  
C
I
CM  
Base Current  
I
2.0  
Adc  
B
Total Device Dissipation @ T = 25_C  
P
75  
0.6  
W
W/_C  
C
D
Derate above 25°C  
BUL45G  
AY WW  
Operating and Storage Temperature  
THERMAL CHARACTERISTICS  
T , T  
−65 to 150  
_C  
J
stg  
Characteristics  
Symbol  
Max  
1.65  
62.5  
Unit  
_C/W  
_C/W  
Thermal Resistance, Junction−to−Case  
Thermal Resistance, Junction−to−Ambient  
R
q
JC  
JA  
R
q
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits are  
exceeded, device functional operation is not implied, damage may occur and  
reliability may be affected.  
BUL45 = Device Code  
A
= Assembly Location  
Y
= Year  
1. Pulse Test: Pulse Width = 5 ms, Duty Cycle 10%.  
WW  
G
= Work Week  
= Pb−Free Package  
ORDERING INFORMATION  
Device  
BUL45  
Package  
Shipping  
TO−220  
50 Units / Rail  
50 Units / Rail  
BUL45G  
TO−220  
(Pb−Free)  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
February, 2006 − Rev. 7  
BUL45/D  
 
BUL45  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
C
Characteristic  
Symbol  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
Collector−Emitter Sustaining Voltage (I = 100 mA, L = 25 mH)  
V
400  
Vdc  
mAdc  
mAdc  
C
CEO(sus)  
Collector Cutoff Current (V = Rated V  
, I = 0)  
I
CEO  
100  
CE  
CEO  
B
Collector Cutoff Current (V = Rated V  
, V = 0)  
I
10  
100  
CE  
CES  
EB  
CES  
(T = 125°C)  
C
Emitter Cutoff Current (V = 9.0 Vdc, I = 0)  
I
100  
mAdc  
EB  
C
EBO  
ON CHARACTERISTICS  
Base−Emitter Saturation Voltage  
V
Vdc  
BE(sat)  
(I = 1.0 Adc, I = 0.2 Adc)  
0.84  
0.89  
1.2  
1.25  
C
B
(I = 2.0 Adc, I = 0.4 Adc)  
C
B
Collector−Emitter Saturation Voltage (I = 1.0 Adc, I = 0.2 Adc)  
V
V
0.175  
0.150  
0.25  
Vdc  
Vdc  
C
B
CE(sat)  
CE(sat)  
(T = 125°C)  
C
Collector−Emitter Saturation Voltage (I = 2.0 Adc, I = 0.4 Adc)  
0.25  
0.275  
0.4  
C
B
(T = 125°C)  
C
DC Current Gain (I = 0.3 Adc, V = 5.0 Vdc)  
h
FE  
14  
7.0  
5.0  
10  
34  
C
CE  
(T = 125°C)  
C
32  
14  
12  
22  
(I = 2.0 Adc, V = 1.0 Vdc)  
C
CE  
(T = 125°C)  
C
(I = 10 mAdc, V = 5.0 Vdc)  
C
CE  
DYNAMIC CHARACTERISTICS  
Current Gain Bandwidth (I = 0.5 Adc, V = 10 Vdc, f = 1.0 MHz)  
f
12  
50  
75  
MHz  
pF  
C
CE  
T
Output Capacitance (V = 10 Vdc, I = 0, f = 1.0 MHz)  
C
CB  
E
ob  
Input Capacitance (V = 8.0 Vdc)  
C
920  
1200  
pF  
EB  
ib  
1.75  
4.4  
1.0 ms  
3.0 ms  
1.0 ms  
3.0 ms  
(I = 1.0 Adc  
(T = 125°C)  
C
C
I
V
= 100 mAdc  
= 300 V)  
B1  
CC  
0.5  
1.0  
Dynamic Saturation Voltage:  
(T = 125°C)  
C
Determined 1.0 ms and 3.0 ms  
V
CE  
(Dyn sat)  
Vdc  
respectively after rising I  
B1  
1.85  
6.0  
reaches 90% of final I  
(I = 2.0 Adc  
B1  
(T = 125°C)  
C
C
B1  
(see Figure 18)  
I
= 400 mAdc  
0.5  
1.0  
V
= 300 V)  
CC  
(T = 125°C)  
C
SWITCHING CHARACTERISTICS: Resistive Load  
Turn−On Time  
(I = 2.0 Adc, I = I = 0.4 Adc  
t
t
75  
120  
110  
ns  
C
B1  
B2  
on  
Pulse Width = 20 ms,  
(T = 125°C)  
C
Turn−Off Time  
Duty Cycle < 20% V = 300 V  
2.8  
3.5  
3.5  
ms  
CC  
off  
(T = 125°C)  
C
SWITCHING CHARACTERISTICS: Inductive Load (V = 15 Vdc, L = 200 mH, V  
= 300 Vdc)  
CC  
C
clamp  
Fall Time  
(I = 2.0 Adc, I = 0.4 Adc  
t
fi  
70  
200  
170  
ns  
ms  
ns  
ns  
ms  
ns  
ns  
C
B1  
I
= 0.4 Adc)  
(T = 125°C)  
B2  
C
Storage Time  
Crossover Time  
Fall Time  
t
2.6  
4.2  
3.8  
si  
(T = 125°C)  
C
t
230  
400  
350  
c
fi  
(T = 125°C)  
C
(I = 1.0 Adc, I = 100 mAdc  
t
110  
100  
150  
C
B2  
B1  
I
= 0.5 Adc)  
(T = 125°C)  
C
Storage Time  
Crossover Time  
Fall Time  
t
1.1  
1.5  
1.7  
si  
(T = 125°C)  
C
t
170  
170  
250  
c
fi  
(T = 125°C)  
C
(I = 2.0 Adc, I = 250 mAdc  
t
80  
120  
C
B1  
I
= 2.0 Adc)  
(T = 125°C)  
C
B2  
Storage Time  
(T = 125°C)  
t
0.6  
0.9  
ms  
C
si  
Crossover Time  
(T = 125°C)  
C
t
175  
300  
ns  
c
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2
BUL45  
TYPICAL STATIC CHARACTERISTICS  
100  
100  
V
= 1 V  
V
= 5 V  
CE  
CE  
T = 25°C  
J
T = 25°C  
J
T = 125°C  
J
T = 125°C  
J
T = −ꢀ20°C  
J
T = −ꢀ20°C  
J
10  
10  
1
0.01  
1
0.01  
0.10  
1.00  
10.00  
0.10  
1.00  
10.00  
I , COLLECTOR CURRENT (AMPS)  
C
I , COLLECTOR CURRENT (AMPS)  
C
Figure 1. DC Current Gain @ 1 Volt  
Figure 2. DC Current Gain at @ 5 Volts  
2.0  
1.5  
1.0  
10  
T = 25°C  
J
1.0  
1.5  
A
1 A  
2ꢀA 3 A 4 A 5 A  
6 A  
I /I = 10  
C B  
0.1  
0.5  
0
T = 25°C  
T = 125°C  
J
J
I /I = 5  
C B  
I = 0.5 A  
C
0.01  
0.01  
0.01  
0.10  
1.00  
10.00  
0.10  
1.00  
10.00  
I , BASE CURRENT (AMPS)  
B
I , COLLECTOR CURRENT (AMPS)  
C
Figure 3. Collector−Emitter Saturation Region  
Figure 4. Collector−Emitter Saturation Voltage  
1.1  
10000  
1000  
T = 25°C  
J
f = 1 MHz  
1.0  
0.9  
0.8  
0.7  
C
ib  
C
ob  
100  
10  
1
T = 25°C  
J
0.6  
0.5  
0.4  
T = 125°C  
J
I /I = 10  
C B  
I /I = 5  
C B  
0.01  
0.10  
1.00  
10.00  
1
10  
100  
1000  
I , COLLECTOR CURRENT (AMPS)  
C
V
, COLLECTOR−EMITTER VOLTAGE (VOLTS)  
CE  
Figure 5. Base−Emitter Saturation Region  
Figure 6. Capacitance  
http://onsemi.com  
3
BUL45  
TYPICAL SWITCHING CHARACTERISTICS  
(I = I /2 for all switching)  
B2  
C
1200  
1000  
800  
3000  
2500  
2000  
1500  
1000  
I
= I /2  
B(off) C  
= 300 V  
T = 25°C  
T = 125°C  
J
I
= I /2  
C
J
B(off)  
T = 25°C  
T = 125°C  
J
V
J
CC  
V
= 300 V  
CC  
I /I = 5  
C B  
PW = 20 ms  
PW = 20 ms  
I /I = 10  
C B  
I /I = 10  
C B  
600  
400  
200  
0
500  
0
I /I = 5  
C B  
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
I , COLLECTOR CURRENT (AMPS)  
C
I , COLLECTOR CURRENT (AMPS)  
C
Figure 7. Resistive Switching, ton  
Figure 8. Resistive Switching, toff  
3500  
3000  
2500  
2000  
1500  
1000  
3500  
3000  
2500  
2000  
1500  
1000  
500  
I
= I /2  
C
B(off)  
T = 25°C  
T = 125°C  
J
V = 300 V  
Z
J
L = 200 mH  
C
V = 300 V  
V
I
= 15 V  
= I /2  
CC  
Z
I /I = 5  
C B  
B(off)  
C
V
= 15 V  
CC  
L = 200 mH  
C
I = 1 A  
C
T = 25°C  
T = 125°C  
J
J
500  
0
I = 2 A  
C
I /I = 10  
C B  
0
1
2
3
4
5
3
4
5
6
7
8
9
10 11 12 13 14 15  
h , FORCED GAIN  
FE  
I , COLLECTOR CURRENT (AMPS)  
C
Figure 9. Inductive Storage Time, tsi  
Figure 10. Inductive Storage Time, tsi(hFE  
)
300  
250  
200  
150  
100  
200  
150  
100  
50  
t
c
t
c
I
= I /2  
B(off) C  
= 15 V  
V
I
= 15 V  
= I /2  
CC  
V
CC  
t
fi  
B(off)  
C
50  
0
t
fi  
V = 300 V  
Z
T = 25°C  
T = 125°C  
J
T = 25°C  
L = 200 mH  
C
V = 300 V  
J
J
L = 200 mH  
C
T = 125°C  
J
Z
0
0
1
2
3
4
5
0
1
2
3
4
5
I , COLLECTOR CURRENT (AMPS)  
C
I , COLLECTOR CURRENT (AMPS)  
C
Figure 11. Inductive Switching, tc & tfi, IC/IB = 5  
Figure 12. Inductive Switching, tc & tfi, IC/IB = 10  
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4
BUL45  
TYPICAL SWITCHING CHARACTERISTICS  
(I = I /2 for all switching)  
B2  
C
150  
140  
130  
120  
110  
100  
90  
300  
250  
200  
150  
V
= 15 V  
V = 300 V  
CC  
I
= I /2  
B(off) C  
= 15 V  
T = 25°C  
T = 125°C  
J
J
Z
V
CC  
V = 300 V  
I
= I /2  
C
B(off)  
Z
L = 200 mH  
C
L = 200 mH  
C
I = 1 A  
C
I = 1 A  
C
100  
50  
I = 2 A  
C
T = 25°C  
T = 125°C  
J
80  
J
I = 2 A  
C
70  
3
4
5
6
7
8
9
10 11 12 13 14 15  
3
4
5
6
7
8
9
10 11 12 13 14 15  
h
, FORCED GAIN  
h , FORCED GAIN  
FE  
FE  
Figure 13. Inductive Fall Time, tfi(hFE  
)
Figure 14. Crossover Time  
GUARANTEED SAFE OPERATING AREA INFORMATION  
100  
10  
6
DC (BUL45)  
5ꢁms  
T 125°C  
C
I /I 4  
C B  
5
1ꢁms  
50ꢁms  
10ꢁms  
1ꢁms  
L = 500 mH  
C
4
3
2
EXTENDED  
SOA  
1.0  
0.1  
−5 V  
1
0
V
= 0 V  
−1.5 V  
BE(off)  
0.01  
10  
100  
, COLLECTOR−EMITTER VOLTAGE (VOLTS)  
1000  
300  
400  
V , COLLECTOR−EMITTER VOLTAGE (VOLTS)  
CE  
500  
600  
700  
800  
V
CE  
Figure 15. Forward Bias Safe Operating Area  
Figure 16. Reverse Bias Switching Safe Operating Area  
There are two limitations on the power handling ability of a  
transistor: average junction temperature and second breakdown.  
Safe operating area curves indicate IC − VCE limits of the transistor  
that must be observed for reliable operation; i.e., the transistor  
must not be subjected to greater dissipation than the curves  
indicate. The data of Figure 15 is based on TC = 25°C; TJ(pk) is  
variable depending on power level. Second breakdown pulse  
limits are valid for duty cycles to 10% but must be derated when  
TC 25°C. Second breakdown limitations do not derate the same  
as thermal limitations. Allowable current at the voltages shown in  
Figure 15 may be found at any case temperature by using the  
appropriate curve on Figure 17. TJ(pk) may be calculated from the  
data in Figures 20. At any case temperatures, thermal limitations  
will reduce the power that can be handled to values less than the  
limitations imposed by second breakdown. For inductive loads,  
high voltage and current must be sustained simultaneously during  
turn−off with the base−to−emitter junction reverse−biased. The  
safe level is specified as a reverse−biased safe operating area  
(Figure 16). This rating is verified under clamped conditions so  
that the device is never subjected to an avalanche mode.  
1.0  
SECOND BREAKDOWN  
DERATING  
0.8  
0.6  
0.4  
THERMAL DERATING  
0.2  
0
20  
40  
60  
80  
100  
120  
140  
160  
T , CASE TEMPERATURE (°C)  
C
Figure 17. Forward Bias Power Derating  
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5
 
BUL45  
10  
5
4
V
CE  
90% I  
I
C
C
9
8
7
6
5
t
fi  
3
dyn 1 ms  
t
si  
2
dyn 3 ms  
1
t
c
10% I  
C
V
10% V  
CLAMP  
0
CLAMP  
−1  
−2  
−3  
−4  
−5  
4
3
2
1
0
90% I  
B
I
B
90% I 1  
B
1 ms  
3 ms  
I
B
0
1
2
3
4
5
6
7
8
TIME  
TIME  
Figure 18. Dynamic Saturation Voltage Measurements  
Figure 19. Inductive Switching Measurements  
+15 V  
I PEAK  
C
100 mF  
1 mF  
MTP8P10  
MUR105  
MJE210  
100 W  
3 W  
150 W  
3 W  
V
PEAK  
CE  
V
CE  
MTP8P10  
MPF930  
R
R
B1  
I 1  
B
I
MPF930  
+10 V  
out  
I
B
A
I 2  
B
50 W  
B2  
V(BR)CEO(sus)  
L = 10 mH  
INDUCTIVE SWITCHING  
L = 200 mH  
RB2 = 0  
RBSOA  
COMMON  
MTP12N10  
150 W  
3 W  
L = 500 mH  
RB2 = 0  
RB2 = ∞  
500 mF  
V
= 20 VOLTS  
I (pk) = 100 mA  
V
= 15 VOLTS  
V
= 15 VOLTS  
CC  
CC  
CC  
RB1 SELECTED FOR  
DESIRED I 1  
RB1 SELECTED  
FOR DESIRED I 1  
C
1 mF  
B
B
−V  
off  
Table 1. Inductive Load Switching Drive Circuit  
TYPICAL THERMAL RESPONSE  
1.00  
D = 0.5  
0.2  
0.1  
R
R
(t) = r(t) R  
q
JC  
q
q
JC  
0.10  
P
(pk)  
= 2.5°C/W MAX  
JC  
D CURVES APPLY FOR  
POWER PULSE TRAIN  
SHOWN READ TIME AT t  
0.05  
0.02  
t
t
1
2
1
T
− T = P  
C
R
(t)  
q
JC  
SINGLE PULSE  
J(pk)  
(pk)  
DUTY CYCLE, D = t /t  
1 2  
0.01  
0.01  
0.10  
1.00  
10.00  
100.00  
1000.00  
t, TIME (ms)  
Figure 20. Typical Thermal Response (ZqJC(t)) for BUL45  
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6
BUL45  
The BUL45 Bipolar Power Transistors were specially  
designed for use in electronic lamp ballasts. A circuit  
designed by ON Semiconductor applications was built to  
demonstrate how well these devices operate. The circuit and  
detailed component list are provided below.  
C5 400 V  
Q1  
D5  
I
C
0.1 mF  
MUR150  
D3  
22 mF 385 V  
1000 V  
47  
W
C1  
15 mF  
470  
1 W  
T1A  
D10  
D9  
D7  
TUBE  
kW  
C4  
T1B  
Q2  
1N4007  
D1  
D8  
D6  
47 W  
I
C
FUSE  
C3 1000 V  
400 V  
MUR150  
D4  
C2  
C6  
10 nF  
0.1 mF  
L
CTN  
0.1 mF 100 V  
5.5 mH  
D2  
1N5761  
AC LINE  
220 V  
1 W  
Components Lists  
Q1 = Q2 = BUL45 Transistor  
D1 = 1N4007 Rectifier  
D2 = 1N5761 Rectifier  
D3 = D4 = MUR150  
D5 = D6 = MUR105  
D7 = D8 = D9 = D10 = 1N400  
All resistors are 1/4 Watt, 5%  
R1 = 470 kW  
R2 = R3 = 47 W  
R4 = R5 = 1 W (these resistors are optional, and  
might be replaced by a short circuit)  
C1 = 22 mF/385 V  
CTN = 47 W @ 25°C  
C2 = 0.1 mF  
L = RM10 core, A1 = 400, B51 (LCC) 75 turns,  
wire = 0.6 mm  
C3 = 10 nF/1000 V  
C4 = 15 nF/1000 V  
T1 = FT10 toroid, T4A (LCC)  
C5 = C6 = 0.1 mF/400 V  
Primary: 4 turns  
Secondaries: T1A: 4 turns  
Secondaries: T1B: 4 turns  
NOTES:  
1. Since this design does not include the line input filter, it cannot be used “as−is” in a practical industrial circuit.  
2. The windings are given for a 55 Watt load. For proper operation they must be re−calculated with any other loads.  
Figure 21. Application Example  
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7
BUL45  
PACKAGE DIMENSIONS  
TO−220AB  
CASE 221A−09  
ISSUE AA  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
SEATING  
PLANE  
−T−  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION Z DEFINES A ZONE WHERE ALL  
BODY AND LEAD IRREGULARITIES ARE  
ALLOWED.  
C
S
B
F
T
4
INCHES  
DIM MIN MAX  
MILLIMETERS  
MIN  
14.48  
9.66  
4.07  
0.64  
3.61  
2.42  
2.80  
0.46  
12.70  
1.15  
4.83  
2.54  
2.04  
1.15  
5.97  
0.00  
1.15  
−−−  
MAX  
15.75  
10.28  
4.82  
0.88  
3.73  
2.66  
3.93  
0.64  
14.27  
1.52  
5.33  
3.04  
2.79  
1.39  
6.47  
1.27  
−−−  
A
K
Q
Z
A
B
C
D
F
0.570  
0.380  
0.160  
0.025  
0.142  
0.095  
0.110  
0.018  
0.500  
0.045  
0.190  
0.100  
0.080  
0.045  
0.235  
0.000  
0.045  
0.620  
0.405  
0.190  
0.035  
0.147  
0.105  
0.155  
0.025  
0.562  
0.060  
0.210  
0.120  
0.110  
0.055  
0.255  
0.050  
−−−  
1
2
3
U
H
G
H
J
K
L
L
R
J
N
Q
R
S
T
V
G
D
U
V
Z
N
−−− 0.080  
2.04  
STYLE 1:  
PIN 1. BASE  
2. COLLECTOR  
3. EMITTER  
4. COLLECTOR  
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
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BUL45/D  

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