ARRAYRDM-0116A10-DFN-TR [ONSEMI]
Silicon Photomultipliers (SiPM), RDM-Series 1 x 16 Monolithic Array;
| 型号： | ARRAYRDM-0116A10-DFN-TR |
| 厂家： | 
ONSEMI |
| 描述： | Silicon Photomultipliers (SiPM), RDM-Series 1 x 16 Monolithic Array |
| 文件： | 总9页 (文件大小：1335K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Silicon Photomultipliers
(SiPM), RDM-Series 1 x 16
Monolithic Array
Product Preview
ArrayRDM-0116A10-DFN
www.onsemi.com
The ArrayRDM−0116A10−DFN is a monolithic 1 × 16 array of
Silicon Photomultiplier (SiPM) pixels based on the market−leading
RDM process. The RDM process has been specifically developed to
create products that give high PDE at the NIR wavelengths used for
LiDAR and 3D ranging applications. The ArrayRDM−0116A10−DFN
also features an anti−reflection coating on the entrance window.
In order to meet the requirements for automotive LiDAR
applications, this product is qualified to the AEC−Q102 standard and
developed in accordance with IATF 16949.
An evaluation board (ArrayRDM−0116A10−GEVB) is also
available for this product.
KEY SENSOR AND PACKAGE SPECIFICATIONS
Parameter
Silicon Process
Number of Pixels
Array Configuration
Pixel Size
Value
Comment
The ARRAYRDM−0116A10−DFN Product
RDM
16
ORDERING INFORMATION
See detailed ordering and shipping information in the ordering
information section on page 6 of this data sheet.
1 × 16
0.17 × 0.49 mm
0.55 mm
10 mm
Pixel Pitch
Microcell Size
Number of
Microcells per Pixel
368
Package Size
Output Type
3 × 12 × 1.85 mm
DFN Package (W × L × H)
Analog
Standard and Fast Output
per Pixel
PERFORMANCE SPECIFICATIONS
Typical values are measured at 21°C. Minimum and Maximum (when available) values take into account operation over the full
temperature range of −40°C to 105°C. All measurements made at Vbr + 19 V. Note that Vov and values below may change in the final
product.
Parameter
PDE @ 905 nm
Min
−
Typ
14
Max
−
Unit
%
Comment
Dark Count Rate
−
40
−
kcps
%
Per pixel
Optical Crosstalk
−
25
−
6
Gain
−
−
0.8 × 10
TBD
18
Afterpulsing Probability
Microcell Recovery Time
Microcell Rise Time
Fast Output Pulse Width
Fast Output Rise Time
Terminal Capacitance
−
−
−
−
ns
ns
ns
ns
pF
RC time constant
Per pixel
−
0.25
1
−
−
−
−
0.25
59
−
−
−
This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
ARRAYRDM−0116A10/D
April, 2020 − Rev. P1
ArrayRDM−0116A10−DFN
BIAS PARAMETERS
Parameter
Min
Typ
Max
Unit
Comment
Breakdown Voltage (Vbr)
−
21.7
−
V
See Figure 1 for plot of typical Vbr as
a function of temperature
Over Voltage (Vov)
−
19.0
−
V
Typical value recommended for
operation and used for
characterization
Operating Bias (Vop)
Vop = Vbr + Vov
See Figure 1
Temperature Coefficient of Vbr
mV/°C
ABSOLUTE MAXIMUM RATINGS
Parameter
Value
45 V
Unit
V
Comment
Maximum Bias
Maximum Current
14 mA
mA
For the whole array at 40.7 V (Vop)
and 21°C
Maximum Storage Temperature
Operating Temperature Range
125
°C
°C
−40 to +105
Ambient temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
PACKAGE SPECIFICATIONS
Parameter
Value
TBD
TBD
4
Unit
Comment
ESD−HBM
ESD−CDM
q
q
°C/W
°C/W
JC
JA
245
3
MSL
For all part numbers
Figure 1. Breakdown Voltage vs. Temperature
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2
ArrayRDM−0116A10−DFN
BIAS AND READOUT RECOMMENDATIONS
The ArrayRDM−0116A10−DFN is formed of a linear
♦ Pairs of 1 nF 100 V ceramic capacitors are
recommended for systems where dynamic switching
of bias is required
♦ Higher capacitance can be used when static bias
voltage is used eg 10 nF 100 V
array of 16 SiPM pixels and housed in a 36−pin DFN
package. Figure 2 shows the sensor array schematic. The
signals from each pixel can be accessed either via the pixel
cathode or fast output. The common anode is also available
and allows the provision of a single bias supply for all
16 pixels.
• Use the EPAD contact to reduce the inductance of the bias
supply connection to the SiPM array by using multiple
plugged vias from the EPAD to the bias plane
Cathode 1
Cathode 2
Cathode 16
• Decoupling capacitors should also be used on the back
side of the PCB from the EPAD vias to GND when
possible
Fast Output 1
Fast Output 2
Fast Output 16
SiPM 1
SiPM 2
SiPM 16
Anode
(Common)
Figure 2. Array Schematic Showing
Pixel Connections
Figure 4.
Recommendations for Series Termination (see Figure 4):
• Use series termination resistors close to the fast output
pins (pins 2 to 17) of the Array
♦ Helps to match the source impedance of the SiPM
pixels to the PCB and amplifier load
♦ Helps to reduce reflections of the high speed signals
♦ 0201 package size resistors fit neatly beside each fast
output pin
Figure 3.
• GND cathodes near to each cathode pin (pins 20 to 35)
using vias to GND plane when standard readout is not
required
• Terminate any unused fast outputs using 50 W resistor to
GND to avoid further reflections from unterminated
tracks
The following recommendations for the bias are advised
(see Figure 3):
• Supply negative bias to the anode with cathode
terminated to GND as illustrated in EVB schematic in
Figure 6
• Use an internal power plane below the GND plane for the
bias
• Place decoupling capacitors close to anode corner pins of
the DFN (pins 1, 18, 19 & 36)
Recommendations for Signal Track Impedance:
• Match impedance of signal tracks to 50 W
• E.g. Use microstrip impedance where signals on the top
layer of the PCB are above a ground plane on an internal
layer of the PCB
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3
ArrayRDM−0116A10−DFN
PIN ASSIGNMENT
Pixel 1
Pixel 16
Pin #
Pin Assignment
Pin #
Pin Assignment
1
2
Anode
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Anode
Fast output 1
Fast output 2
Fast output 3
Fast output 4
Fast output 5
Fast output 6
Fast output 7
Fast output 8
Fast output 9
Fast output 10
Fast output 11
Fast output 12
Fast output 13
Fast output 14
Fast output 15
Fast output 16
Anode
Cathode 16
Cathode 15
Cathode 14
Cathode 13
Cathode 12
Cathode 11
Cathode 10
Cathode 9
Cathode 8
Cathode 7
Cathode 6
Cathode 5
Cathode 4
Cathode 3
Cathode 2
Cathode 1
Anode
3
4
PIN 1
5
TOP VIEW
6
7
8
9
10
11
12
13
14
15
16
17
18
EPAD
EPAD
BOTTOM VIEW
Anode
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4
ArrayRDM−0116A10−DFN
EVALUATION BOARD
The ArrayRDM−0116A10−GEVB evaluation board is
shown in Figure 5 and schematically (with pin outs) in
Figure 6. It consists of:
• ArrayRDM−0116A10−DFN 16−channel SiPM array
• 32 U.FL connectors for access to each pixel cathode and
fast output for signal readout
• An SMA connector for applying the bias to the common
anode
• Bias filtering circuit
• Decoupling capacitors (14 x 10 nF and 4 x 100 nF
decoupling capacitors from anode to ground − not shown)
This product allows a user to quickly and easily set up an
evaluation of the array product.
Note that a negative bias supply should be supplied via the
SMA connector (J33), and the U.FL connectors (J1 to J32)
should be 50 W terminated.
Figure 5. ArrayRDM−0116A10−GEVB Top Side
View Showing the 1x16 Sensor Placement
50 W
50 W
50 W
S1
J17
J18
S2
S16
J32
F1
F2
J1
J2
F16
J16
J33 (Body)
SiPM 1
SiPM 2
SiPM 16
0 V
J33
−Vbias
Connector
J1−J32
J33
Style
U.FL Receptacle (Hirose U.FL−R−SMT)
SMA Jack (F)
Figure 6. ArrayRDM−0116A10−GEVB Board Schematic
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5
ArrayRDM−0116A10−DFN
ORDERING INFORMATION
†
Part Number
Product Description
Shipping Format
ArrayRDM−0116A10−DFN−TR
Monolithic 1 × 16 array of NIR sensitive SiPM pixels formed
using the RDM process.
Tape and Reel
Individual cathode and fast output connection per pixel and
a common anode available via the 36−pin DFN package.
ArrayRDM−0116A10−DFN−TR1
ArrayRDM−0116A10−DFN−TR−E
Cut Tape
Unqualified prototype part of the ArrayRDM−0116A10−DFN−TR
Depends on
Quantity Order
ArrayRDM−0116A10−GEVB
Evaluation board consisting of an ArrayRDM−0116A10−DFN
mounted onto PCB.
ESD Package
A U.FL connector gives access to each pixel cathode and fast
output. The bias is supplied via an SMA connector to the
common anode.
†For information on tape and reel specifications, including part orientation and tape sizes, please contact sensl_questions@onsemi.com.
www.onsemi.com
6
ArrayRDM−0116A10−DFN
PACKAGE DIMENSIONS
DFN36 12x3, 0.65P
CASE 506EV
ISSUE O
A
B
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7
ArrayRDM−0116A10−DFN
EVALUATION BOARD DIMENSIONS
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8
ArrayRDM−0116A10−DFN
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◊
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