ADT7484ARMZ-RL7 [ONSEMI]
IC TEMP SENSOR DGTL W/SST 8-MSOP;
| 型号： | ADT7484ARMZ-RL7 |
| 厂家： | 
ONSEMI |
| 描述： | IC TEMP SENSOR DGTL W/SST 8-MSOP |
| 文件： | 总14页 (文件大小：359K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ADT7484A/ADT7486A
Digital Temperature Sensor
with SST Interface
The ADT7484A/ADT7486A are simple digital temperature sensors
for use in PC applications with a Simple Serial Transport (SST)
interface. These devices can monitor their own temperature as well as
the temperature of one (ADT7484A) or two (ADT7486A) remote
sensor diodes. The ADT7484A/ADT7486A are controlled by a single
SST bidirectional data line. The devices are fixed-address SST clients
where the target address is chosen by the state of the two address pins,
ADD0 and ADD1.
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SOIC−8
MSOP−8
MSOP−10
CASE 751
CASE 846AB
CASE 846AC
Features
1 On-Chip Temperature Sensor
PIN ASSIGNMENTS
1 or 2 Remote Temperature Sensors
Simple Serial Transport (SST) Interface Rev 1 Compliant
These Devices are Pb-Free and are RoHS Compliant
1
2
3
4
8
7
6
5
V
SST
CC
GND
D1+
D1−
ADD0
ADT7484A
(Top View)
RESERVED
ADD1
Applications
1
2
3
4
5
10
9
Personal Computers
Portable Personal Devices
Industrial Sensor Nets
V
SST
CC
GND
D1+
D1−
D2+
ADD0
RESERVED
ADD1
D2−
ADT7486A
8
(Top View)
7
6
ON-CHIP
TEMPERATURE
SENSOR
ADT7484A/
ADT7486A
MARKING DIAGRAMS
8
LOCAL TEMP
VALUE REGISTER
T7484A
ALYWG
G
D1+
D1−
ANALOG
MUX
A/D
CONVERTER
SST
INTERFACE
1
D2+
SOIC−8
D2−
T7484A = Specific Device Code
REMOTE TEMP
VALUE REGISTER
A
L
= Assembly Location
= Wafer Lot
ADDRESS
SELECTION
Y
W
G
= Year
= Work Week
= Pb-Free Package
OFFSET
REGISTERS
8
1
10
V
GND
RESERVED
ADD0 ADD1 SST
CC
T20
T22
AYWG
AYWG
ADT7486A ONLY
G
G
Figure 1. Functional Block Diagram
1
MSOP−8
MSOP−10
T2x = Specific Device Code
A
Y
W
G
= Assembly Location
= Year
= Work Week
= Pb-Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
July, 2012 − Rev. 5
ADT7484A−86A/D
ADT7484A/ADT7486A
Table 1. ADT7484A PIN ASSIGNMENT
Pin No.
Mnemonic
Type
Power Supply
Description
1
2
3
4
5
6
7
8
V
CC
3.3 V 10%
GND
D1+
Ground
Ground Pin
Analog Input
Analog Input
Digital Input
Reserved
Positive Connection to Remote Temperature Sensor
Negative Connection to Remote Temperature Sensor
SST Address Select
D1−
ADD1
RESERVED
ADD0
SST
Connect to Ground
Digital Input
Digital Input/Output
SST Address Select
SST Bidirectional Data Line
Table 2. ADT7486A PIN ASSIGNMENT
Pin No.
Mnemonic
Type
Power Supply
Description
3.3 V 10%.
1
2
V
CC
GND
D1+
Ground
Ground Pin
3
Analog Input
Analog Input
Analog Input
Analog Input
Analog Input
Analog Input
Digital Input
Digital Input/Output
Positive Connection to Remote 1 Temperature Sensor
Negative Connection to Remote 1 Temperature Sensor
Positive Connection to Remote 2 Temperature Sensor
Negative Connection to Remote 2 Temperature Sensor
SST Address Select
4
D1−
5
D2+
6
D2−
7
ADD1
RESERVED
ADD0
SST
8
Connect to Ground
9
SST Address Select
10
SST Bidirectional Data Line
Table 3. ABSOLUTE MAXIMUM RATINGS
Parameter
Rating
3.6
Unit
V
Supply Voltage (V
)
CC
Voltage on Any Other Pin (Including SST Pin)
Input Current at Any Pin
3.6
V
5.0
mA
mA
C
C
C
Package Input Current
20
Maximum Junction Temperature (T
)
150
J MAX
Storage Temperature Range
−65 to +150
Lead Temperature, Soldering
IR Reflow Peak Temperature
Lead Temperature, Soldering (10 sec)
260
300
ESD Rating
1,500
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
NOTE: This device is ESD sensitive. Use standard ESD precautions when handling.
Table 4. THERMAL CHARACTERISTICS (Note 1)
Package Type
8-lead MSOP and 8-lead SOIC NB Packages (ADT7484A)
10-lead MSOP (ADT7486A)
q
q
Unit
C/W
C/W
JA
JC
206
206
44
44
1. q is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.
JA
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ADT7484A/ADT7486A
Table 5. ELECTRICAL CHARACTERISTICS
(T = T
to T
, V = V
to V
, unless otherwise noted)
A
MIN
MAX
CC
MIN
MAX
Parameter
Conditions
Min
Typ
Max
Unit
Power Supply
Supply Voltage, V
3.0
−
3.3
2.8
3.8
3.6
−
V
V
CC
Undervoltage Lockout Threshold
Average Operating Supply
Continuous Conversions
−
5.0
mA
Current, I
DD
Temperature-to-Digital Converter
Local Sensor Accuracy
40C T 70C, V = 3.3 V 5%
−
−
+1.0
−
1.75
4.0
C
C
A
CC
−40C T +100C
A
Remote Sensor Accuracy
−40C T +125C; T = 25C; V = 3.3 V
−
−
−
+1.0
1.0
1.75
D
A
CC
−40C T +125C; −40 T 70C,
D
A
V
CC
= 3.3 V 5%
−40C T +125C; −40 T +100C
−
−
4.0
D
A
Remote Sensor Source Current
Low Level
Mid Level
High Level
−
−
−
12
80
204
−
−
−
mA
Resolution
−
−
0.016
1.5
−
−
C
Series Resistance Cancellation
The ADT7484A and ADT7486A Cancel
1.5 kW in Series with the Remote Thermal
Diode
kW
Conversion Time
Averaging Enabled
Averaging Enabled
Averaging Enabled
−
−
−
12
−
12
38
50
ms
ms
ms
(Local Temperature) (Note 1)
Conversion Time
(Remote Temperature) (Note 1)
Total Monitoring Cycle Time
(Note 1)
−
Digital Inputs (ADD0, ADD1)
Input High Voltage, V
2.3
−
−
−
−
0.8
−
V
IH
Input Low Voltage, V
V
IL
Input High Current, I
V
V
= V
= 0
−1.0
−
−
mA
mA
pF
IH
IN
CC
Input Low Current, I
Pin Capacitance
−
1.0
−
IL
IN
−
5.0
Digital I/O (SST Pin)
Input High Voltage, V
1.1
−
−
−
−
0.4
−
V
V
IH
Input Low Voltage, V
IL
Hysteresis (Note 1)
Between Input Switching Levels
= 6 mA (maximum)
−
150
−
mV
V
Output High Voltage, V
I
1.1
−
1.9
1.0
OH
SOURCE
High Impedance State Leakage,
Device Powered On SST Bus;
V = 1.1 V, V = 3.3 V
SST
−
mA
I
LEAK
CC
High Impedance State Leakage,
LEAK
Device Unpowered On SST Bus;
V = 1.1 V, V = 0 V
SST
−
−
−
10
mA
I
CC
Signal Noise Immunity, V
Noise Glitches from
10 MHz to 100 MHz; Width Up to 50 ns
300
−
mV
p-p
NOISE
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ADT7484A/ADT7486A
Table 5. ELECTRICAL CHARACTERISTICS (continued)
(T = T to T , V = V to V , unless otherwise noted)
A
MIN
MAX
CC
MIN
MAX
Parameter
Conditions
Min
Typ
Max
Unit
SST Timing
Bitwise Period, t
0.495
−
500
ms
ms
BIT
High Level Time for Logic 1, t
(Note 2)
t
Defined in Speed Negotiation
0.6 t
0.2 t
−
0.75 t
0.8 t
0.4 t
0.2 t
H1
BIT
BIT
BIT
BIT
High Level Time for Logic 0, t
(Note 2)
0.25 t
ms
ms
H0
BIT
BIT
BIT
Time to Assert SST High for
−
−
BIT
Logic 1, t
SU, HIGH
Hold Time, t
Stop Time, t
(Note 3)
See SST Specification Rev 1.0
−
0.5 t
ms
ms
HOLD
BIT−M
Device Responding to a Constant Low Level
Driven by Originator
1.25 t
2 t
2 t
BIT
STOP
BIT
BIT
Time to Respond After a Reset,
RESET
−
−
−
0.4
ms
t
Response Time to Speed
Negotiation After Powerup
Time after Powerup when Device Can
Participate in Speed Negotiation
500
−
ms
1. Guaranteed by design, not production tested.
2. Minimum and maximum bit times are relative to t
defined in the timing negotiation pulse.
BIT
3. Devices compatible with hold time specification as driven by SST originator.
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ADT7484A/ADT7486A
TYPICAL PERFORMANCE CHARACTERISTICS
1.55
1.50
1.45
1.40
1.35
3.56
3.55
3.54
DEV 3
DEV 2
750 W (~2 mA)
3.53
3.52
3.51
3.50
3.49
3.48
3.47
3.46
3.45
270 W (~5.2 mA)
120 W (~10.6 mA)
1.30
1.25
1.20
DEV 1
2.6
2.8
3.0
3.2
(V)
3.4
3.6
−45 −25 −5
15
35 55 75
95 115
V
CC
TEMPERATURE (C)
Figure 2. SST O/P Level vs. Supply Voltage
Figure 3. Supply Current vs. Temperature
7
6
5
4
1.55
750 W (~2 mA)
1.50
1.45
1.40
1.35
1.30
1.25
1.20
270 W (~5.2 mA)
HI SPEC (V = 3.0 V)
CC
3
2
MEAN (V = 3.3 V)
CC
120 W (~10.6 mA)
1
LO SPEC (V = 3.6 V)
CC
0
−1
−50
0
50
100
150
−60 −40 −20
0
20 40 60 80 100 120 140
TEMPERATURE (C)
TEMPERATURE (C)
Figure 4. Local Temperature Error
Figure 5. SST O/P Level vs. Temperature
3.9
3.7
3.5
3.3
3.1
2.9
7
6
5
4
3
2
1
0
DEV2
DEV3
DEV1
HI SPEC (V = 3.0 V)
CC
MEAN (V = 3.3 V)
CC
LO SPEC (V = 3.6 V)
CC
−1
−2
2.65
2.85
3.05
V
3.25
(V)
3.45
3.65
−60 −40 −20
0
20 40 60 80 100 120 140
TEMPERATURE (C)
CC
Figure 6. Supply Current vs. Voltage
Figure 7. Remote Temperature Error
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ADT7484A/ADT7486A
TYPICAL PERFORMANCE CHARACTERISTICS (Cont’d)
30
15
10
5
DEV1_EXT1
DEV1_EXT2
DEV2_EXT1
DEV2_EXT2
DEV3_EXT1
DEV3_EXT2
100 mV
D+ TO GND
25
20
15
10
5
0
−5
−10
−15
−20
−25
−30
−35
−40
60 mV
DEV1_EXT1
DEV1_EXT2
DEV2_EXT1
DEV2_EXT2
DEV3_EXT1
DEV3_EXT2
D+ TO V
CC
40 mV
1M
0
−5
10k
100k
10M
100M
1G
0
20
40
60
80
100
NOISE FREQUENCY (Hz)
RESISTANCE (MW)
Figure 8. Remote Temperature Error vs. PCB
Resistance
Figure 9. Temperature Error vs. Common-Mode
Noise Frequency
20
0
−10
−20
15
10
5
−30
EXT2
−40
EXT1
−50
125 mV
50 mV
−60
−70
−80
−90
0
−5
−10
10k
100k
1M
10M
100M
1G
0
10
20
30
40
50
POWER SUPPLY NOISE FREQUENCY (Hz)
CAPACITANCE (nF)
Figure 10. Local Temperature Error vs. Power
Supply Noise
Figure 11. Remote Temperature Error
vs. Capacitance Between D1+ and D1−
7
5
4
3
2
1
0
40 mV
6
5
4
3
125 mV
20 mV
50 mV
2
−1
−2
−3
1
10 mV
1M
NOISE FREQUENCY (Hz)
0
10k
100k
10M
100M
1G
10k
100k
1M
10M
100M
1G
POWER SUPPLY NOISE FREQUENCY (Hz)
Figure 12. Temperature Error vs. Differential-Mode
Noise Frequency
Figure 13. Remote Temperature Error vs. Power
Supply Noise
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ADT7484A/ADT7486A
Product Description
low (GND), and floating. The address range for fixed
address, discoverable devices is 0x48 to 0x50.
The ADT7484A is a single remote temperature sensor,
and the ADT7486A is a dual temperature sensor for use in
PC applications. The ADT7484A/ADT7486A accurately
measure local and remote temperature and communicate
over a one-wire Simple Serial Transport (SST) bus interface.
Table 6. ADT7484A/ADT7486A SELECTABLE
ADDRESSES
Address
Selected
ADD1
Low (GND)
Low (GND)
Low (GND)
Float
ADD0
Low (GND)
Float
SST Interface
0x48
Simple Serial Transport (SST) is a one-wire serial bus and
a communications protocol between components intended
for use in personal computers, personal handheld devices, or
other industrial sensor nets. The ADT7484A/ADT7486A
support SST specification Rev 1.
SST is a licensable bus technology from Analog Devices,
Inc., and Intel Corporation. To inquire about obtaining a
copy of the Simple Serial Transport Specification or an SST
technology license, please email Analog Devices, at
sst_licensing@analog.com or write to Analog Devices,
3550 North First Street, San Jose, CA 95134, Attention:
SST Licensing, M/S B7-24.
0x49
High
0x4A
0x4B
0x4C
0x4D
0x4E
0x4F
0x50
Low (GND)
Float
Float
Float
High
High
Low (GND)
Float
High
High
High
Command Summary
Table 7 summarizes the commands supported by the
ADT7484A/ADT7486A devices when directed at the target
address selected by the fixed address pins. It contains the
command name, command code (CC), write data length
(WL), read data length (RL), and a brief description.
ADT7484A/ADT7486A Client Address
The client address for the ADT7484A/ADT7486A is
selected using the address pin. The address pin is connected
to a float detection circuit, which allows the ADT7484A/
ADT7486A to distinguish between three input states: high,
Table 7. COMMAND CODE SUMMARY
Command
Code, CC
Write Length,
WL
Command
Ping()
Read Length, RL
Description
0x00
0x00
0x00
0x01
0x00
0x02
Shows a nonzero FCS over the header if present.
GetIntTemp()
Shows the temperature of the device’s internal thermal
diode.
GetExt1Temp()
GetExt2Temp()
0x01
0x02
0x01
0x01
0x02
0x02
Shows the temperature of External Thermal Diode 1.
Shows the temperature of External Thermal Diode 2
(ADT7486A only).
GetAllTemps()
0x00
0x01
0x04 (ADT7484A)
0x06 (ADT7486A)
Shows a 4- or 6-byte block of data (ADT7484A:
GetIntTemp, GetExt1Temp; ADT7486A: GetIntTemp,
GetExt1Temp, GetExt2Temp).
SetExt1Offset()
GetExt1Offset()
0xe0
0xe0
0x03
0x01
0x00
0x02
Sets the offset used to correct errors in External Diode 1.
Shows the offset that the device is using to correct errors
in External Diode 1.
SetExt2Offset()
GetExt2Offset()
ResetDevice()
0xe1
0xe1
0xf6
0x03
0x01
0x01
0x00
0x02
0x00
Sets the offset used to correct errors in External Diode 2
(ADT7486A only).
Shows the offset that the device is using to correct errors
in External Diode 2 (ADT7486A only).
Functional reset. The ADT7484A/ADT7486A also
respond to this command when directed to the Target
Address 0x00.
GetDIB()
0xf7
0xf7
0x01
0x01
0x08
0x10
Shows information used by SW to identify the device’s
capabilities. Can be in 8- or 16-byte format.
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ADT7484A/ADT7486A
Command Code Details
Table 10. RESET DEVICE() COMMAND
Write
Length
Read
Length
Reset
Command
ADT7484A/ADT7486A Device Identifier Block
Target Address
FCS
The GetDIB() command retrieves the device identifier
block (DIB), which provides information to identify the
capabilities of the ADP7484A/ADT7486A. The data
returned can be in 8- or 16-byte format. The full 16-bytes of
DIB is detailed in Table 8. The 8-byte format involves the
first eight bytes described in this table. Byte-sized data is
returned in the respective fields as it appears in Table 8.
Word-sized data, including vendor ID, device ID, and data
values use little endian format, that is, the LSB is returned
first, followed by the MSB.
Device Address
0x01
0x00
0xf6
GetIntTemp()
The ADT7484A/ADT7486A show the local temperature
of the device in response to the GetIntTemp() command. The
data has a little endian, 16-bit, twos complement format.
GetExtTemp()
Prompted by the GetExtTemp() command, the
ADT7484A/ADT7486A show the temperature of the
remote diode in little endian, 16-bit, twos complement
format. The ADT7484A/ADT7486A show 0x8000 in
response to this command if the external diode is an open or
short circuit.
Table 8. DIB BYTE DETAILS
Byte
Name
Value
Description
Device
Capabilities
0xc0
Fixed Address Device
0
GetAllTemps()
Version/
Revision
0x10
Meets Version 1 of
the SST Specification
1
The ADT7484A shows the local and remote temperatures
in a 4-byte block of data (internal temperature first, followed
by External Temperature 1) in response to a GetAllTemps()
command. The ADT7486A shows the local and remote
temperatures in a 6-byte block of data (internal temperature
first, followed by External Temperature 1 and External
Temperature 2) in response to this command.
2, 3
Vendor ID
00x11d4
Contains Company ID
Number in Little
Endian Format
4, 5
Device ID
0x7484
or
0x7486
Contains Device ID
Number in Little
Endian Format
6
7
Device
Interface
0x01
0x00
SST Device
SetExtOffset()
Function
Interface
Reserved
This command sets the offset that the ADT7484A/
ADT7486A will use to correct errors in the external diode.
The offset is set in little endian, 16-bit, twos complement
format. The maximum offset is 128C with +0.25C
resolution.
8
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Revision ID
0x00
0x00
0x00
0x00
0x00
0x00
0x05
Reserved
9
Reserved
10
11
12
13
14
15
Reserved
Reserved
GetExtOffset()
Reserved
This command causes the ADT7484A/ADT7486A to
show the offset that they are using to correct errors in the
external diode. The offset value is returned in little endian
format, that is, LSB before MSB.
Reserved
Contains Revision ID
Client Device
Address
0x48 to
0x50
Dependent on the
State of the Address
Pins
ADT7484A/ADT7486A Response to Unsupported
Commands
A full list of command codes supported by the
ADT7484A/ADT7486A is given in Table 7. The offset
registers (Command Codes 0xe0 and 0xe1) are the only
registers that the user can write to. The other defined
registers are read only. Writing to Register Addresses 0x03
to 0xdf shows a valid FSC, but no action is taken by the
ADT7484A/ADT7486A. The ADT7484A/ADT7486A
show an invalid FSC if the user attempts to write to the
devices between Command Codes 0xe2 to 0xee and no data
is written to the device. These registers are reserved for the
manufacturer’s use only, and no data can be written to the
device via these addresses.
Ping()
The Ping() command verifies if a device is responding at
a particular address. The ADT7484A/ADT7486A show a
valid nonzero FCS in response to the Ping() command when
correctly addressed.
Table 9. PING() COMMAND
Target Address
Write Length
Read Length
FCS
Device Address
0x00
0x00
ResetDevice()
This command resets the register map and conversion
controller. The reset command can be global or directed at
the client address of the ADT7484A/ADT7486A.
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ADT7484A/ADT7486A
Temperature Measurement
Figure 14 shows the input signal conditioning used to
measure the output of a remote temperature sensor. This
figure shows the remote sensor as a substrate transistor,
which is provided for temperature monitoring on some
microprocessors, but it could also be a discrete transistor. If
a discrete transistor is used, the collector is not grounded and
should be linked to the base. To prevent ground noise from
interfering with the measurement, the more negative
terminal of the sensor is not referenced to ground, but is
biased above ground by an internal diode at the D1− input.
If the sensor is operating in an extremely noisy environment,
C1 can be added as a noise filter. Its value should not exceed
1,000 pF.
The ADT7484A/ADT7486A each have two dedicated
temperature measurement channels: one for measuring the
temperature of an on-chip band gap temperature sensor, and
one for measuring the temperature of a remote diode, usually
located in the CPU or GPU.
The ADT7484A monitors one local and one remote
temperature channel, whereas the ADT7486A monitors one
local and two remote temperature channels. Monitoring of
each of the channels is done in a round-robin sequence. The
monitoring sequence is in the order shown in Table 11.
Table 11. TEMPERATURE MONITORING SEQUENCE
To measure DV , the operating current through the
Channel
Number
Conversion
Time (ms)
BE
Measurement
Local Temperature
Remote Temperature 1
sensor is switched between three related currents. Figure 14
shows N1 I and N2 I as different multiples of the current
I. The currents through the temperature diode are switched
0
1
2
12
38
38
between I and N1 I, giving DV , and then between I and
BE1
Remote Temperature 2
(ADT7486A Only)
N2 I, giving DV . The temperature can then be
BE2
calculated using the two DV measurements. This method
BE
can also cancel the effect of series resistance on the
Temperature Measurement Method
temperature measurement. The resulting DV waveforms
A simple method for measuring temperature is to exploit
the negative temperature coefficient of a diode by measuring
BE
are passed through a 65 kHz low-pass filter to remove noise
and then through a chopper-stabilized amplifier to amplify
and rectify the waveform, producing a dc voltage
the base-emitter voltage (V ) of a transistor operated at
BE
constant current. Unfortunately, this technique requires
proportional to DV . The ADC digitizes this voltage, and
calibration to null the effect of the absolute value of V
which varies from device to device.
,
BE
BE
a temperature measurement is produced. To reduce the
effects of noise, digital filtering is performed by averaging
the results of 16 measurement cycles for low conversion
rates. Signal conditioning and measurement of the internal
temperature sensor is performed in the same manner.
The technique used in the ADT7484A/ADT7486A
measures the change in V when the device is operated at
BE
three different currents.
V
CC
I
N1 I
N2 I
I
BIAS
D+
C1*
D−
V
OUT+
REMOTE
SENSING
TRANSISTOR
To ADC
V
OUT−
BIAS
DIODE
LOW-PASS FILTER
= 65 kHz
f
C
*CAPACITOR C1 IS OPTIONAL. IT SHOULD ONLY BE USED IN NOISY ENVIRONMENTS.
Figure 14. Signal Conditioning for Remote Diode Temperature Sensors
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9
ADT7484A/ADT7486A
Reading Temperature Measurements
terminal of the sensor is not referenced to ground, but is
The temperature measurement command codes are
detailed in Table 12. The temperature data returned is two
bytes in little endian format, that is, LSB before MSB. All
temperatures can be read together by using Command Code
0x00 with a read length of 0x04. The command codes and
returned data are described in Table 12.
biased above ground by an internal diode at the D1− input.
ADT7484A/
ADT7486A
2N3904
D+
NPN
D−
Table 12. TEMPERATURE CHANNEL COMMAND
CODES
ADT7484A/
ADT8486A
Temp
Channel
Command
Code
D+
Returned Data
LSB, MSB
2N3906
D−
PNP
Internal
0x00
0x01
0x02
0x00
External 1
External 2
All Temps
LSB, MSB
LSB, MSB
Figure 15. Connections for NPN and PNP Transistors
The ADT7484A/ADT7486A show an external
temperature value of 0x8000 if the external diode is an open
or short circuit.
Internal LSB, Internal MSB;
External 1 LSB, External 1 MSB;
External 2 LSB, External 2 MSB
Layout Considerations
SST Temperature Sensor Data Format
Digital boards can be electrically noisy environments.
Take the following precautions to protect the analog inputs
from noise, particularly when measuring the very small
voltages from a remote diode sensor:
The data for temperature is structured to allow values in
the range of 512C to be reported. Thus, the temperature
sensor format uses a twos complement, 16-bit binary value
to represent values in this range. This format allows
temperatures to be represented with approximately a
0.016C resolution.
1. Place the device as close as possible to the remote
sensing diode. Provided that the worst noise
sources, such as clock generators, data/address
buses, and CRTs, are avoided, this distance can be
four to eight inches.
Table 13. SST TEMPERATURE DATA FORMAT
Twos Complement
2. Route the D1+ and D1− tracks close together in
parallel with grounded guard tracks on each side.
Provide a ground plane under the tracks if
possible.
3. Use wide tracks to minimize inductance and
reduce noise pickup. A 5 mil track minimum width
and spacing is recommended.
MSB
LSB
Temperature (5C)
−125
−80
−40
−20
−5
1110 0000
1110 1100
1111 0110
1111 1011
1111 1110
1111 1111
0000 0000
0000 0000
0000 0001
0000 0100
0000 1010
0001 0100
0001 1111
1100 0000
0000 0000
0000 0000
0011 1110
1100 0000
1100 0000
0000 0000
0100 0000
0100 0000
1100 0010
0000 0000
0000 0000
0100 0000
−1
GND
D+
5 MIL
5 MIL
5 MIL
5 MIL
5 MIL
5 MIL
5 MIL
0
+1
+5
+20
+40
+80
+125
D−
GND
Figure 16. Arrangement of Signal Tracks
Using Discrete Transistors
4. Try to minimize the number of copper/solder
joints, which can cause thermocouple effects.
Where copper/solder joints are used, make sure
that they are in both the D1+ and D1− paths and
are at the same temperature.
5. Thermocouple effects should not be a major
problem because 1C corresponds to about
240 mV, and thermocouple voltages are about
3 mV/C of the temperature difference. Unless
If a discrete transistor is used, the collector is not grounded
and should be linked to the base. If a PNP transistor is used,
the base is connected to the D1− input and the emitter is
connected to the D1+ input. If an NPN transistor is used, the
emitter is connected to the D1− input and the base is
connected to the D1+ input. Figure 17 shows how to connect
the ADT7484A/ADT7486A to an NPN or PNP transistor for
temperature measurement. To prevent ground noise from
interfering with the measurement, the more negative
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10
ADT7484A/ADT7486A
there are two thermocouples with a big
temperature differential between them,
thermocouple voltages should be much less than
200 mV.
one-time calibration of the system, the offset caused by
system board noise can be calculated and nulled by
specifying it in the ADT7484A/ADT7486A. The offset is
automatically added to every temperature measurement.
The maximum offset is 128C with 0.25C resolution. The
offset format is the same as the temperature data format;
16-bit, twos complement notation, as shown in Table 13.
The offset should be programmed in little endian format,
that is, LSB before MSB. The offset value is also returned
in little endian format when read.
6. Place a 0.1 mF bypass capacitor close to the
device.
7. If the distance to the remote sensor is more than
eight inches, the use of a twisted-pair cable is
recommended. This works for distances of about
6 feet to 12 feet.
8. For very long distances (up to 100 feet), use
shielded twisted-pair cables, such as Belden #8451
microphone cables. Connect the twisted-pair cable
to D1+ and D1− and the shield to GND, close to
the device. Leave the remote end of the shield
unconnected to avoid ground loops.
Application Schematics
V
CC
ADT7484A
1
2
V
SST
ADD0
D1+ RESERVED
D1− ADD1
8
7
SST
CC
GND
2N3904
or
CPU
THERMAL
DIODE
3
4
6
5
Because the measurement technique uses switched
current sources, excessive cable and/or filter capacitance
can affect the measurement. When usin g long cables, the
filter capacitor can be reduced or removed. Cable resistance
can also introduce errors. A 1ĂW series resistance introduces
about 0.5C error.
Figure 17. ADT7484A Typical Application Schematic
V
CC
ADT7486A
Temperature Offset
1
2
V
SST 10
SST
CC
As CPUs run faster, it is more difficult to avoid high
frequency clocks when running the D1+ and D1− tracks
around a system board. Even when the recommended layout
guidelines are followed, there may still be temperature
errors, attributed to noise being coupled on to the D1+ and
D1− lines. High frequency noise generally has the effect of
producing temperature measurements that are consistently
too high by a specific amount. The ADT7484A/
ADT87486A have a temperature offset command code of
0xe0 through which a desired offset can be set. By doing a
GND
D1+ RESERVED
ADD0
9
2N3904
NPN
3
4
5
8
7
6
D1−
ADD1
D2+
D2−
CPU
THERMAL
DIODE
Figure 18. ADT7486A Typical Application Schematic
Table 14. ORDERING INFORMATION
†
Device Order Number*
ADT7484AARZ−REEL
ADT7484AARMZ−RL
ADT7486AARMZ−RL
Branding
Package Option
R−8
Package Type
SOIC−8 NB
Shipping
−
2,500 Tape & Reel
3,000 Tape & Reel
3,000 Tape & Reel
T20
T22
RM−8
8-lead MSOP
10-lead MSOP
RM−10
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*These are Pb-Free packages.
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11
ADT7484A/ADT7486A
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−X−
A
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
MILLIMETERS
DIM MIN MAX
INCHES
G
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
1.27 BSC
0.050 BSC
−Z−
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
0.10 (0.004)
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
12
ADT7484A/ADT7486A
PACKAGE DIMENSIONS
MSOP8
CASE 846AB−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
D
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. 846A-01 OBSOLETE, NEW STANDARD 846A-02.
H
E
E
MILLIMETERS
INCHES
NOM
−−
0.003
0.013
0.007
0.118
DIM
A
A1
b
c
D
MIN
−−
0.05
0.25
0.13
2.90
2.90
NOM
−−
MAX
MIN
−−
0.002
0.010
0.005
0.114
0.114
MAX
0.043
0.006
0.016
0.009
0.122
0.122
PIN 1 ID
1.10
0.15
0.40
0.23
3.10
3.10
e
0.08
b 8 PL
0.33
M
S
S
0.08 (0.003)
T B
A
0.18
3.00
E
3.00
0.118
e
L
0.65 BSC
0.55
4.90
0.026 BSC
0.021
0.193
0.40
4.75
0.70
5.05
0.016
0.187
0.028
0.199
SEATING
PLANE
H
E
−T−
A
0.038 (0.0015)
L
A1
c
SOLDERING FOOTPRINT*
1.04
0.38
8X
8X 0.041
0.015
3.20
4.24
5.28
0.126
0.167 0.208
0.65
6X0.0256
SCALE 8:1
mm
inches
ǒ
Ǔ
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
13
ADT7484A/ADT7486A
PACKAGE DIMENSIONS
MSOP10
CASE 846AC−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
−A−
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION “A” DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE
BURRS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. DIMENSION “B” DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. 846B−01 OBSOLETE. NEW STANDARD
846B−02
−B−
K
G
PIN 1 ID
D 8 PL
M
S
S
A
0.08 (0.003)
T B
MILLIMETERS
INCHES
DIM MIN
MAX
3.10
3.10
MIN
MAX
0.122
0.122
0.043
0.012
A
B
C
D
G
H
J
2.90
2.90
0.95
0.20
0.114
0.114
1.10 0.037
0.30 0.008
C
0.038 (0.0015)
0.50 BSC
0.020 BSC
−T−
SEATING
PLANE
L
0.05
0.10
4.75
0.40
0.15 0.002
0.21 0.004
5.05 0.187
0.70 0.016
0.006
0.008
0.199
0.028
H
J
K
L
SOLDERING FOOTPRINT*
1.04
0.041
0.32
0.0126
10X
10X
3.20
4.24
5.28
0.126
0.167 0.208
0.50
mm
inches
ǒ
Ǔ
8X0.0196
SCALE 8:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SST is a licensable bus technology from Analog Devices, Inc., and Intel Corporation.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
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any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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ADT7484A−86A/D
相关型号：
ADT7486AARMZ-U5
Switch/Digital Output Temperature Sensor, DIGITAL TEMP SENSOR-SERIAL, 16BIT(s), 4Cel, SQUARE, SURFACE MOUNT, LEAD FREE, MO-187-AA, MSOP-10
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