74VHC273MX [ONSEMI]
八路 D 型触发器;型号: | 74VHC273MX |
厂家: | ONSEMI |
描述: | 八路 D 型触发器 光电二极管 逻辑集成电路 触发器 |
文件: | 总15页 (文件大小:738K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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April 2007
74VHC273
tm
Octal D-Type Flip-Flop
Features
General Description
■ High Speed: f
= 165MHz (typ) at V = 5V
The VHC273 is an advanced high speed CMOS Octal
D-type flip-flop fabricated with silicon gate CMOS tech-
nology. It achieves the high speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation.
MAX
CC
■ Low power dissipation: I = 4µA (max) at T = 25°C
■ High noise immunity: V
CC
A
= V
= 28% V (min)
NIH
NIL
CC
■ Power down protection is provided on all inputs
■ Low noise: V = 0.9V (max)
OLP
The register has a common buffered Clock (CP) which is
fully edge-triggered. The state of each D input, one setup
time before the LOW-to-HIGH clock transition, is trans-
ferred to the corresponding flip-flop's Q output. The
Master Reset (MR) input will clear all flip-flops simulta-
neously. All outputs will be forced LOW independently of
Clock or Data inputs by a LOW voltage level on the MR
input.
■ Pin and function compatible with 74HC273
■ Leadless DQFN Package
An input protection circuit insures that 0V to 7V can be
applied to the inputs pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery
backup. This circuit prevents device destruction due to
mismatched supply and input voltages.
Ordering Information
Package
Order Number
74VHC273M
Number
Package Description
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
74VHC273SJ
M20D
74VHC273BQ
(Preliminary)
MLP020B
(Preliminary) MO-241, 2.5 x 4.5mm
MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74VHC273MTC
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number. Pb-Free package per JEDEC J-STD-020B.
©1994 Fairchild Semiconductor Corporation
74VHC273 Rev. 1.5
www.fairchildsemi.com
Connection Diagrams
Logic Symbols
Pin Assignments for
PDIP, SOIC, SOP, and TSSOP
IEEE/IEC
Pad Assignments for DQFN
Function Table
Inputs
CP
Outputs
Operating
Mode
Reset (Clear)
Load ‘1’
MR
D
Q
n
n
L
H
H
X
X
L
H
L
H
L
Load ‘0’
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
(Top Through View)
= LOW-to-HIGH Transition
Pin Descriptions
Pin Names
Description
D –D
Data Inputs
0
7
MR
CP
Master Reset
Clock Pulse Input
Data Outputs
Q –Q
0
7
©1994 Fairchild Semiconductor Corporation
74VHC273 Rev. 1.5
www.fairchildsemi.com
2
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.
Figure 1.
©1994 Fairchild Semiconductor Corporation
74VHC273 Rev. 1.5
www.fairchildsemi.com
3
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Rating
V
Supply Voltage
–0.5V to +7.0V
–0.5V to +7.0V
CC
V
DC Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current
IN
V
–0.5V to V + 0.5V
OUT
CC
I
–20mA
20mA
IK
I
OK
I
25mA
OUT
I
DC V /GND Current
75mA
CC
CC
T
Storage Temperature
–65°C to +150°C
260°C
STG
T
Lead Temperature (Soldering, 10 seconds)
L
(1)
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Rating
V
Supply Voltage
2.0V to +5.5V
0V to +5.5V
0V to V
CC
V
Input Voltage
IN
V
Output Voltage
OUT
CC
T
Operating Temperature
Input Rise and Fall Time,
–40°C to +85°C
OPR
t , t
r
f
V
V
= 3.3V 0.3V
= 5.0V 0.5V
0ns/V ∼ 100ns/V
0ns/V ∼ 20ns/V
CC
CC
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
©1994 Fairchild Semiconductor Corporation
74VHC273 Rev. 1.5
www.fairchildsemi.com
4
DC Electrical Characteristics
T =
A
25°C
Typ.
–40°C to +85°C
Symbol
Parameter
V
(V)
Conditions
Min.
Max.
Min.
Max.
Units
CC
2.0
V
HIGH Level
1.50
1.50
V
IH
Input Voltage
3.0–5.5
2.0
0.7 x V
0.7 x V
CC
CC
V
LOW Level Input
Voltage
0.50
0.50
V
V
IL
3.0–5.5
2.0
0.3 x V
0.3 x V
CC
CC
V
HIGH Level
Output
Voltage
V
= V
I
= –50µA
1.9
2.9
2.0
3.0
4.5
1.9
2.9
OH
IN
IH OH
or V
3.0
IL
4.5
4.4
4.4
3.0
I
= –4mA
= –8mA
= 50µA
2.58
3.94
2.48
3.80
OH
4.5
I
OH
V
LOW Level
Output Voltage
2.0
V
or V
=V
IL
I
0.0
0.0
0.0
0.1
0.1
0.1
0.1
V
OL
IN
IH OL
3.0
4.5
0.1
0.1
3.0
I
= 4mA
= 8mA
0.36
0.36
0.1
0.44
0.44
1.0
OL
4.5
I
OL
I
Input Leakage
Current
0–5.5
V
= 5.5V or GND
µA
µA
IN
IN
I
Quiescent
5.5
V
= V or GND
4.0
40.0
CC
IN
CC
Supply Current
Noise Characteristics
T = 25°C
A
Symbol
Parameter
V
(V)
Conditions
Typ.
Limits
Units
CC
(2)
V
Quiet Output Maximum
Dynamic V
5.0
C = 50pF
0.6
0.9
–0.9
3.5
V
V
V
V
OLP
L
OL
(2)
V
Quiet Output Minimum
Dynamic V
5.0
5.0
5.0
C = 50pF
–0.6
OLV
L
OL
(2)
V
Minimum HIGH Level
Dynamic Input Voltage
C = 50pF
IHD
L
(2)
V
Maximum LOW Level
Dynamic Input Voltage
C = 50pF
1.5
ILD
L
Note:
2. Parameter guaranteed by design.
©1994 Fairchild Semiconductor Corporation
74VHC273 Rev. 1.5
www.fairchildsemi.com
5
AC Electrical Characteristics
T = –40°C
A
T = 25°C
to +85°C
A
Symbol
Parameter
V
(V)
Conditions
Min. Typ. Max. Min. Max. Units
CC
f
Maximum Clock
Frequency
3.3 0.3
C = 15pF
75
50
120
75
65
45
MHz
MHz
ns
MAX
L
C = 50pF
L
5.0 0.5
C = 15pF
120
80
165
110
8.7
100
70
L
C = 50pF
L
t
, t
Propagation Delay 3.3 0.3
Time (CK – Q)
C = 15pF
13.6
17.1
9.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
16.0
19.5
10.5
12.5
16.0
19.5
10.0
12.0
1.5
PLH PHL
L
C = 50pF
11.2
5.8
L
5.0 0.5
C = 15pF
ns
L
C = 50pF
7.3
11.0
13.6
17.1
8.5
L
t
Propagation Delay 3.3 0.3
Time (MR – Q)
C = 15pF
8.9
ns
PHL
L
C = 50pF
11.4
5.2
L
5.0 0.5
C = 15pF
ns
L
C = 50pF
6.7
10.5
1.5
L
(3)
t
,
Output to Output
Skew
3.3 0.3
5.0 0.5
C = 50pF
ns
OSLH
L
t
OSHL
C = 50pF
1.0
1.0
L
C
Input Capacitance
V
(4)
= Open
4.0
31
10.0
10.0
pF
pF
IN
CC
C
Power Dissipation
Capacitance
PD
Notes:
3. Parameter guaranteed by design t
= |t
max – t
min|; t
= |t
max – t
min|.
OSLH
PLH
PLH
OSHL
PHL
PHL
4. C is defined as the value of the internal equivalent capacitance which is calculated from the operating
PD
current consumption without load. Average operating current can be obtained from the equation:
I
(opr.) = C • V • f + I / 8 (per F/F). The total C when n pieces of the Flip-Flop operates can be
CC
PD CC IN CC PD
calculated by the equation: C (total) = 22 + 9n.
PD
AC Operating Requirements
T = 25°C
T = –40°C to +85°C
A
A
(5)
Symbol
Parameter
V
(V)
Typ.
Guaranteed Minimum
Units
CC
t (L), t (H) Minimum Pulse Width (CK)
3.3
5.5
5.0
6.5
5.0
6.0
5.0
6.5
4.5
1.0
1.0
2.5
2.0
ns
W
W
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
t (L)
Minimum Pulse Width (MR)
Minimum Setup Time
5.0
5.0
5.5
4.5
1.0
1.0
2.5
2.0
ns
ns
ns
ns
W
t
S
t
Minimum Hold Time
H
t
Minimum Removal Time (MR)
REC
Note:
5. V is 3.3 0.3V or 5.0 0.5V
CC
©1994 Fairchild Semiconductor Corporation
74VHC273 Rev. 1.5
www.fairchildsemi.com
6
Tape and Reel Specification
Tape Format for DQFN
Package
Designator
Tape
Section
Number
Cavities
Cavity
Status
Cover Tape
Status
BQ
Leader (Start End)
Carrier
125 (typ.)
2500/3000
75 (typ.)
Empty
Filled
Sealed
Sealed
Sealed
Trailer (Hub End)
Empty
Tape Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 2.
©1994 Fairchild Semiconductor Corporation
74VHC273 Rev. 1.5
www.fairchildsemi.com
7
Tape and Reel Specification (Continued)
Reel Dimensions for DQFN
Dimensions are in inches (millimeters) unless otherwise noted.
Tape Size
A
B
C
D
N
W1
W2
12mm
13.0
(330)
0.059
(1.50)
0.512
(13.00)
0.795
(20.20)
7.008
(178)
0.488
(12.4)
0.724
(18.4)
Figure 3.
©1994 Fairchild Semiconductor Corporation
74VHC273 Rev. 1.5
www.fairchildsemi.com
8
Physical Dimensions
Dimensions are in inches (millimeters) unless otherwise noted.
Figure 4. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
©1994 Fairchild Semiconductor Corporation
74VHC273 Rev. 1.5
www.fairchildsemi.com
9
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 5. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
©1994 Fairchild Semiconductor Corporation
74VHC273 Rev. 1.5
www.fairchildsemi.com
10
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 6. 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm
Package Number MLP020B (Preliminary)
©1994 Fairchild Semiconductor Corporation
74VHC273 Rev. 1.5
www.fairchildsemi.com
11
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 7. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
©1994 Fairchild Semiconductor Corporation
74VHC273 Rev. 1.5
www.fairchildsemi.com
12
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an
exhaustive list of all such trademarks.
ACEx®
TinyLogic®
TINYOPTO¥
TinyPower¥
TinyWire¥
TruTranslation¥
PSerDes¥
UHC®
UniFET¥
VCX¥
Wire¥
HiSeC¥
i-Lo¥
Programmable Active Droop¥
QFET®
QS¥
QT Optoelectronics¥
Quiet Series¥
RapidConfigure¥
RapidConnect¥
ScalarPump¥
SMART START¥
SPM®
STEALTH™
SuperFET¥
SuperSOT¥-3
SuperSOT¥-6
SuperSOT¥-8
SyncFET™
Across the board. Around the world.¥
ActiveArray¥
Bottomless¥
Build it Now¥
CoolFET¥
ImpliedDisconnect¥
IntelliMAX¥
ISOPLANAR¥
MICROCOUPLER¥
MicroPak¥
MICROWIRE¥
MSX¥
CROSSVOLT¥
CTL™
Current Transfer Logic™
DOME¥
MSXPro¥
OCX¥
E2CMOS¥
EcoSPARK®
EnSigna¥
OCXPro¥
OPTOLOGIC®
OPTOPLANAR®
PACMAN¥
POP¥
FACT Quiet Series™
FACT®
FAST®
Power220®
Power247®
PowerEdge¥
PowerSaver¥
PowerTrench®
FASTr¥
TCM¥
The Power Franchise®
™
FPS¥
FRFET®
GlobalOptoisolator¥
GTO¥
TinyBoost¥
TinyBuck¥
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support,
which, (a) are intended for surgical implant into the body or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
device, or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary
First Production
Full Production
Not In Production
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
No Identification Needed
Obsolete
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
design.
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I24
©1994 Fairchild Semiconductor Corporation
74VHC273 Rev. 1.5
www.fairchildsemi.com
13
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
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