74VCX164245MTDX_技术文档

Is Now Part of

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March 2000

Revised June 2005

74VCX164245

Low Voltage 16-Bit Dual Supply Translating Transceiver

with 3-STATE Outputs

General Description

Features

■ Bidirectional interface between busses ranging from

The VCX164245 is a dual supply, 16-bit translating trans-

ceiver that is designed for two way asynchronous commu-

nication between busses at different supply voltages by

providing true signal translation. The supply rails consist of

1.65V to 3.6V

■ Supports Live Insertion and Withdrawal (Note 1)

■ Static Drive (I_OH/I_OL

)

V_CCB, which is the higher potential rail operating at 2.3V to

24 mA @ 3.0V V_CC

18 mA @ 2.3V V_CC

6 mA @ 1.65V V_CC

3.6V and V_CCA, which is the lower potential rail operating at

1.65V to 2.7V. (V_CCAmust be less than or equal to V_CCB

for proper device operation.) This dual supply design

allows for translation from 1.8V to 2.5V busses to busses at

a higher potential, up to 3.3V.

■ Uses proprietary noise/EMI reduction circuitry

■ Functionally compatible with 74 series 16245

■ Latchup performance exceeds 300 mA

■ ESD performance:

The Transmit/Receive (T/R) input determines the direction

of data flow. Transmit (active-HIGH) enables data from A

Ports to B Ports. Receive (active-LOW) enables data from

B Ports to A Ports. The Output Enable (OE) input, when

HIGH, disables both A and B Ports by placing them in a

High-Z condition. The A Port interfaces with the lower volt-

Human Body Model 2000V

Machine model 200V

■ Also packaged in plastic Fine-Pitch Ball Grid Array

(FBGA)

age bus (1.8V

2.5V). The B Port interfaces with the

higher voltage bus (2.7V 3.3V). Also the VCX164245 is

designed so that the control pins (T/R_n, OE_n) are supplied

by V_CCB

.

Note 1: To ensure the high impedance state during power up or power

The 74VCX164245 is suitable for mixed voltage applica-

tions such as notebook computers using a 1.8V CPU and

3.3V peripheral components. It is fabricated with an

Advanced CMOS technology to achieve high speed opera-

tion while maintaining low CMOS power dissipation.

down, OE should be tied to V

through a pull up resistor. The minimum

CCB

n

value of the resistor is determined by the current sourcing capability of the

driver.

Ordering Code:

Order Number

Package Number

Package Description

74VCX164245G

(Note 2)(Note 3)

BGA54A

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

74VCX164245MTD

(Note 3)

MTD48

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Note 2: Ordering Code “G” indicates Trays.

Note 3: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Diagram

DS500159

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Connection Diagrams

Pin Descriptions

Pin Assignment for TSSOP

Pin Names

Description

OE_n

Output Enable Input (Active LOW)

Transmit/Receive Input

T/R_n

A₀–A₁₅

B₀–B₁₅

NC

Side A Inputs or 3-STATE Outputs

Side B Inputs or 3-STATE Outputs

No Connect

FBGA Pin Assignments

1

2

3

4

5

6

A

B

C

D

E

F

B₀

B₂

NC

B₁

T/R₁

NC

OE₁

NC

A₁

A₀

A₂

B₄

B₃

V_CCB

GND

V_CCB

NC

V_CCA

GND

V_CCA

NC

A₃

A₄

B₆

B₅

A₅

A₆

B₈

B₇

A₇

A₈

B₁₀

B₁₂

B₁₄

B₉

A₉

A₁₀

A₁₂

A₁₄

G

H

B₁₁

B₁₃

A₁₁

A₁₃

J

B₁₅

NC

T/R₂

OE₂

NC

A₁₅

Truth Tables

Inputs

Pin Assignment for FBGA

Outputs

OE₁

T/R₁

L

H

X

Bus B₀–B₇Data to Bus A₀–A₇

Bus A₀–A₇Data to Bus B₀–B₇

HIGH Z State on A₀–A₇, B₀–B₇

H

Inputs

Outputs

OE₂

T/R₂

L

H

X

Bus B₈–B₁₅Data to Bus A₈–A₁₅

Bus A₈–A₁₅Data to Bus B₈–B₁₅

HIGH-Z State on A₈–A₁₅, B₈–B₁₅

H

(Top Through View)

H

L

HIGH Voltage Level

LOW Voltage Level

X

Z

Immaterial (HIGH or LOW, inputs may not float)

High Impedance

Translator Power Up Sequence Recommendations

To guard against power up problems, some simple guide-

sourcing capability of the driver. Second, the T/R_ncontrol

lines need to be adhered to. The VCX164245 is designed

pins should be placed at logic low (0V) level, this will

ensure that the B-side bus pins are configured as inputs to

help guard against bus contention and oscillations. B-side

Data Inputs should be driven to a valid logic level (0V or

so that the control pins (T/R_n, OE_n) are supplied by V_CCB

.

Therefore the first recommendation is to begin by powering

up the control side of the device, V_CCB. The OE_ncontrol

V

_CCB), this will prevent excessive current draw and oscilla-

pins should be ramped with or ahead of V_CCB, this will

tions. V_CCAcan then be powered up after V_CCB, but should

never exceed the V_CCBvoltage level. Upon completion of

guard against bus contentions and oscillations as all A Port

and B Port outputs will be disabled. To ensure the high

impedance state during power up or power down, OE_n

these steps the device can then be configured for the users

desired operation. Following these steps will help to pre-

vent possible damage to the translator device as well as

other system components.

should be tied to V_CCBthrough a pull up resistor. The mini-

mum value of the resistor is determined by the current

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2

Logic Diagrams

Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.

3

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Absolute Maximum Ratings(Note 4)

Recommended Operating

Conditions ^{(Note 6)}

Supply Voltage

V_CCA

0.5V to V_CCB

Power Supply (Note 7)

V_CCB

0.5V to 4.6V

V_CCA

1.65V to 2.7V

2.3V to 3.6V

0V to V_CCB

DC Input Voltage (V_I)

DC Output Voltage (V_I/O

Outputs 3-STATE

V_CCB

)

Input Voltage (V_I) @ OE, T/R

0.5V to 4.6V

Input/Output Voltage (V_I/O

A_n

)

Outputs Active (Note 5)

0V to V_CCA

0V to V_CCB

An

0.5V to V_CCA0.5V

0.5V to V_CCB0.5V

B_n

Bn

Output Current in I_OH/I_OL

V_CCA2.3V to 2.7V

V_CCA1.65V to 1.95V

V_CCB3.0V to 3.6V

V_CCB2.3V to 2.7V

DC Input Diode Current (I_IK

V_I0V

)

18 mA

6 mA

50 mA

DC Output Diode Current (I_OK

V_O0V

)

24 mA

50 mA

18 mA

V_OV_CC

Free Air Operating Temperature (T_A)

Minimum Input Edge Rate ( t/ V)

V_IN0.8V to 2.0V, V_CC3.0V

40 C to 85 C

DC Output Source/Sink Current

(I_OH/I_OL

)

10 ns/V

Note 4: The “Absolute Maximum Ratings” are those values beyond which

the safety of the device cannot be guaranteed. The device should not be

operated at these limits. The parametric values defined in the Electrical

Characteristics tables are not guaranteed at the absolute maximum ratings.

The “Recommended Operating Conditions” table will define the conditions

for actual device operation.

DC V_CCor Ground Current

Supply Pin (I_CCor Ground)

Storage Temperature (T_STG

100 mA

)

65 C to 150 C

Note 5: I Absolute Maximum Rating must be observed.

O

Note 6: Unused inputs or I/O pins must be held HIGH or LOW. They may

not float.

Note 7: Operation requires: V

V

CCB

CCA

DC Electrical Characteristics (1.65V ꢀ V

d 1.95V, 2.3V ꢀ V

d 2.7V)

CCB

CCA

V

CCB

CCA

Symbol

Parameter

Conditions

Min

Max

Units

(V)

V

HIGH Level Input Voltage

A

1.65 1.95 2.3 2.7 0.65 x V

V

IHA

n

CC

V

B , T/R, OE

1.65 1.95 2.3 2.7

1.6 1.95 2.3 2.7

1.6

V

IHB

n

LOW Level Input Voltage

A

0.35 x V

0.7

ILA

n

CC

V

B , T/R, OE

1.65 1.95 2.3 2.7

V

ILB

n

HIGH Level Output Voltage

LOW Level Output Voltage

I

100

A

V

0.2

CCA

OHA

OH

OL

6 mA

100

1.65

1.65 1.95 2.3 2.7

1.65 1.95 2.3

1.65 1.95 2.3 2.7

1.65 2.3 2.7

1.65 1.95 2.3 2.7

1.65 1.95 2.3

2.3 2.7

1.25

0.2

CCB

V

OHB

OLA

OLB

V

18 mA

1.7

100

A

0.2

0.3

0.2

0.6

6 mA

100

A

18 mA

I

Input Leakage Current @ OE, T/R

3-STATE Output Leakage

0V

OE

V

3.6V

1.65 1.95 2.3 2.7

5.0

A

I

OZ

O

V

1.65 1.95 2.3 2.7

10

A

CCB

V

0

V

or V

I

IH IL

I

Power OFF Leakage Current

Quiescent Supply Current,

(V , V )

O

3.6V

or GND

0

10

20

A

OFF

I

/I

A

V

CCA

CCA CCB

n

1.65 1.95 2.3 2.7

per supply, V

/ V

B , OE, & T/R

V or GND

CCB

CCA

CCB

n

V

A

3.6V

CCA

CCB

n

20

A

B , OE, T/R 3.6V

n

I

Increase in I per Input, B , T/R, OE

V

– 0.6V

1.65 1.95 2.3 2.7

750

A

CC

n

I

CCB

Increase in I per Input, A

V

CC

n

I

CCA

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4

DC Electrical Characteristics (1.65V ꢀ V

d 1.95V, 3.0V ꢀ V

d 3.6V)

CCB

CCA

V

CCB

CCA

Symbol

Parameter

Conditions

Min

Max

Units

(V)

1.65–1.95 3.0–3.6 0.65 x V

CC

(V)

V

HIGH Level

A

V

IHA

n

V

Input Voltage

LOW Level

B , T/R, OE

1.65–1.95 3.0–3.6

2.0

V

IHB

n

A

0.35 x V

0.8

ILA

n

CC

V

Input Voltage

B , T/R, OE

1.65–1.95 3.0–3.6

V

ILB

n

HIGH Level Output Voltage

LOW Level Output Voltage

I

100

A

V

–0.2

OHA

OH

OL

CCA

6 mA

100

1.65

1.65–1.95 3.0–3.6

1.65–1.95 3.0

1.65–1.95 3.0–3.6

1.65 3.0–3.6

1.65–1.95 3.0–3.6

1.65–1.95 3.0

3.0–3.6

1.25

V

–0.2

OHB

OLA

OLB

V

24 mA

2.2

100

A

0.2

0.3

6 mA

100

A

0.2

24 mA

0.55

I

Input Leakage Current @ OE, T/R

3-STATE Output Leakage

0V

V

3.6V

1.65–1.95 3.0–3.6

5.0

A

I

0V

OZ

O

OE*

V

1.65–1.95 3.0–3.6

10

A

CCB

V

0

V

or V

IL

I

IH

I

Power Off Leakage Current

Quiescent Supply Current,

(V , V

)

3.6V

0

10

20

A

OFF

I

O

/I

A

V

CCA

or GND

CCA CCB

n

1.65–1.95 3.0–3.6

per supply, V

/V

B , OE, & T/R

V

or GND

CCB

CCA CCB

n

V

A

3.6V

CCA

CCB

n

20

A

B , OE, T/R 3.6V

n

I

Increase in I per Input, B , T/R, OE

V

0.6V

1.65–1.95 3.0–3.6

750

A

CC

n

I

CCB

Increase in I per Input, A

V

CC

n

I

CCA

DC Electrical Characteristics (2.3V ꢀ V

d 2.7V, 3.0V d V

d 3.6V)

CCA

CCB

V

CCB

CCA

Symbol

Parameter

Conditions

Min

Max

Units

(V)

V

HIGH Level Input Voltage

A

2.3–2.7

3.0–3.6

1.6

2.0

V

IHA

n

V

B , T/R, OE

2.3–2.7

3.0–3.6

V

IHB

n

LOW Level Input Voltage

A

0.7

0.8

ILA

n

V

B , T/R, OE

2.3–2.7

2.3

3.0–3.6

3.0

V

ILB

n

HIGH Level Output Voltage

LOW Level Output Voltage

I

100

A

V

–0.2

OHA

OH

OL

CCA

CCB

18 mA

1.7

V

100

A

2.3–2.7

2.3

–0.2

OHB

OLA

OLB

V

24 mA

2.2

100

18 mA

100

24 mA

A

3.0–3.6

3.0

0.2

0.6

A

2.3–2.7

0.2

V

A

0.55

I

Input Leakage Current @ OE, T/R

0V

OE

V

3.6V

2.3–2.7

3.0–3.6

5.0

I

3-STATE Output Leakage @ A

OZ

n

O

V

2.3–2.7

3.0–3.6

10

A

CCA

V

0

V

or V

I

IH IL

I

Power OFF Leakage Current

Quiescent Supply Current,

(V , V

)

3.6V

0

10

20

A

OFF

I

O

I

/I

A

V

CCA

or GND

CCA CCB

n

2.3–2.7

3.0–3.6

per supply, V

/V

B , OE, & T/R

V

or GND

CCB

CCA CCB

n

V

A

3.6V

CCA

CCB

n

2.3–2.7

3.0–3.6

20

A

B , OE, T/R 3.6V

n

I

Increase in I per Input, B , T/R, OE

V

0.6V

2.3–2.7

3.0–3.6

750

A

CC

n

I

CCB

Increase in I per Input, A

V

CC

n

I

CCA

5

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AC Electrical Characteristics

C

30 pF, R

500 , T

A

40 C to 85 C,

L

V

1.65V to 1.95V

2.3V to 2.7V

V

1.65V to 1.95V

3.0V to 3.6V

V

2.3V to 2.7V

3.0V to 3.6V

CCA

Symbol

Parameter

Units

V

CCB

Min

0.8

1.5

0.8

1.5

0.8

CCB

Min

0.6

1.5

0.6

1.5

0.8

CCB

Min

0.6

0.8

0.6

0.8

Max

5.5

5.8

5.3

8.3

5.2

4.6

Max

5.1

6.2

5.1

8.2

5.6

4.5

Max

4.0

4.4

4.0

4.6

4.8

4.4

t

, t

Propagation Delay, A to B

Propagation Delay, B to A

Output Enable Time, OE to B

Output Enable Time, OE to A

Output Disable Time, OE to B

Output Disable Time, OE to A

Output to Output Skew

(Note 8)

ns

PHL PLH

, t

PHL PLH

, t

PZL PZH

, t

PZL PZH

, t

PLZ PHZ

, t

PLZ PHZ

osHL

osLH

0.5

0.75

ns

Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The

specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t

) or LOW-to-HIGH (t

).

osLH

osHL

Dynamic Switching Characteristics

V

T

A

25 C

CCA

CCB

Symbol

Parameter

Conditions

Units

(V)

1.8

2.5

1.8

2.5

1.8

2.5

1.8

2.5

1.8

2.5

1.8

2.5

(V)

2.5

3.3

2.5

3.3

2.5

3.3

2.5

3.3

2.5

3.3

2.5

3.3

Typical

0.25

0.6

V

Quiet Output Dynamic Peak V

B to A

,

C

30 pF, V

V

, V

0V

OLP

OLV

OHV

OL

L

IH

CC

IL

V

Quiet Output Dynamic Peak V

A to B

,

0V

0.6

OL

0.8

V

0.8

V

Quiet Output Dynamic Valley V

B to A

,

0.25

0.6

OL

Quiet Output Dynamic Valley V

A to B

0.6

OL

0.8

V

Quiet Output Dynamic Valley V

A to B

,

1.7

OH

2.0

Quiet Output Dynamic Valley V

B to A

1.3

OH

1.3

1.7

Capacitance

T

25 C

A

Symbol

Parameter

Conditions

3.3V, V 0V or V

Units

Typical

C

Input Capacitance

Input/Output Capacitance

Power Dissipation Capacitance

V

2.5V, V

5

6

pF

IN

CCA

CCB

I

CCA/B

C

V

f

3.3V, V 0V or V

I

I/O

PD

CCA

3.3V, V 0V or V

I

20

pF

10 MHz

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6

AC Loading and Waveforms

FIGURE 1. AC Test Circuit

SWITCH

TEST

t_PLH, t_PHL

OPEN

t_PZL, t_PLZ

6V at V_CC3.3 0.3V;

V_CCx 2 at V_CC2.5 0.2V; 1.8V 0.15V

t_PZH, t_PHZ

GND

FIGURE 2. Waveform for Inverting and Non-inverting Functions

t_Rt_F2.0 ns, 10% to 90%

FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic

t_Rt_F2.0 ns, 10% to 90%

FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic

t_Rt_F2.0 ns, 10% to 90%

V_CC

Symbol

3.3V 0.3V

1.5V

2.5V 0.2V

V_CC/2

1.8V 0.15V

V_CC/2

V_mi

V_mo

V_X

1.5V

V_CC/2

V_OL0.3V

V_OH0.3V

V_OL0.15V

V_OH0.15V

V_OL0.15V

V_OH0.15V

V_Y

7

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Physical Dimensions inches (millimeters) unless otherwise noted

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

Package Number BGA54A

8

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Package Number MTD48

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

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ON Semiconductor and

are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

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型号：	74VCX164245MTDX
厂家：	ONSEMI
描述：	带3态输出的低电压16位双通道电源转换收发器光电二极管逻辑集成电路
文件：	总11页 (文件大小：226K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

74VCX164245MTDX [ONSEMI]

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