74LVX00MTC [ONSEMI]
低电压四路 2 输入 NAND 门极;型号: | 74LVX00MTC |
厂家: | ONSEMI |
描述: | 低电压四路 2 输入 NAND 门极 栅 光电二极管 逻辑集成电路 触发器 |
文件: | 总8页 (文件大小:389K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
February 2008
74LVX00
Low Voltage Quad 2-Input NAND Gate
Features
General Description
■ Input voltage level translation from 5V to 3V
■ Ideal for low power/low noise 3.3V applications
The LVX00 contains four 2-input NAND gates. The
inputs tolerate voltages up to 7V allowing the interface of
5V systems to 3V systems.
■ Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Information
Order
Number
Package
Number
Package Description
74LVX00M
M14A
M14D
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74LVX00SJ
74LVX00MTC
MTC14
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
Description
A , B
Inputs
n
n
O
Outputs
n
©1993 Fairchild Semiconductor Corporation
74LVX00 Rev. 1.4.0
www.fairchildsemi.com
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Rating
V
I
Supply Voltage
–0.5V to +7.0V
CC
IK
DC Input Diode Current, V = –0.5V
–20mA
I
V
DC Input Voltage
–0.5V to 7V
I
I
DC Output Diode Current
OK
V
= –0.5V
–20mA
+20mA
O
V
= V + 0.5V
CC
O
V
DC Output Voltage
–0.5V to V + 0.5V
O
CC
I
DC Output Source or Sink Current
25mA
50mA
O
I
or I
DC V or Ground Current
CC
GND
CC
T
Storage Temperature
Power Dissipation
–65°C to +150°C
180mW
STG
P
(1)
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Rating
V
Supply Voltage
2.0V to 3.6V
0V to 5.5V
0V to V
CC
V
Input Voltage
I
V
Output Voltage
O
CC
T
Operating Temperature
Input Rise and Fall Time
–40°C to +85°C
0ns/V to 100ns/V
A
∆t / ∆V
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
©1993 Fairchild Semiconductor Corporation
74LVX00 Rev. 1.4.0
www.fairchildsemi.com
2
DC Electrical Characteristics
T = –40°C to
A
T = +25°C
+85°C
A
Symbol
Parameter
V
Conditions
Min. Typ. Max. Min.
Max. Units
CC
V
HIGH Level Input
Voltage
2.0
3.0
3.6
2.0
3.0
3.6
2.0
1.5
2.0
2.4
1.5
2.0
2.4
V
IH
V
LOW Level Input
Voltage
0.5
0.8
0.8
0.5
0.8
0.8
V
V
IL
V
HIGH Level Output
Voltage
V
= V or V ,
= –50µA
1.9
2.9
2.0
3.0
1.9
2.9
OH
IN
IL
IH
I
OH
3.0
V
= V or V ,
IN
IL
IH
I
= –50µA
OH
V
= V or V ,
2.58
2.48
IN
IL
IH
I
= –4mA
OH
V
LOW Level Output
Voltage
2.0
3.0
V
= V or V ,
= 50µA
0.0
0.0
0.1
0.1
0.1
0.1
V
OL
IN
IL
IH
I
OL
V
= V or V ,
IN
IL
IH
I
= 50µA
OL
V
= V or V ,
= 4mA
0.36
0.1
0.44
1.0
IN
IL
IH
I
OL
I
Input Leakage
Current
3.6
3.6
µA
µA
V
V
= 5.5V or GND
IN
IN
IN
I
Quiescent Supply
Current
= V or GND
2.0
20.0
CC
CC
(2)
Noise Characteristics
T = 25°C
A
Symbol
Parameter
V
(V)
C (pF)
Typ.
Limit
Units
CC
L
V
Quiet Output Maximum Dynamic V
3.3
50
50
50
50
0.3
0.5
–0.5
2.0
V
V
V
V
OLP
OL
V
Quiet Output Minimum Dynamic V
3.3
3.3
3.3
–0.3
OLV
OL
V
Minimum HIGH Level Dynamic Input Voltage
Maximum LOW Level Dynamic Input Voltage
IHD
V
0.8
ILD
Note:
2. Input t = t = 3ns
r
f
©1993 Fairchild Semiconductor Corporation
74LVX00 Rev. 1.4.0
www.fairchildsemi.com
3
AC Electrical Characteristics
T = –40°C to
A
T = +25°C
+85°C
A
Symbol
Parameter
V
(V) C (pF) Min. Typ. Max. Min. Max. Units
CC L
t
, t
Propagation Delay Time
2.7
15
50
15
50
50
5.4
7.9
4.1
6.6
10.1
13.6
6.2
1.0
1.0
1.0
1.0
12.5
16.0
7.5
ns
ns
PLH PHL
3.3 0.3
9.7
11.0
1.5
(3)
t
, t
Output to Output Skew
2.7
3.3
1.5
OSLH OSHL
1.5
1.5
Note:
3. Parameter guaranteed by design t
= |t
–t
|, t
= |t
–t
|
OSLH
PLHm PLHn OSHL
PHLm PHLn
Capacitance
T = –40°C to
A
T = +25°C
+85°C
A
Symbol
Parameter
Min.
Typ.
4
Max.
Min.
Max. Units
C
Input Capacitance
Power Dissipation Capacitance
10
10
pF
pF
IN
(4)
C
19
PD
Note:
4. C is defined as the value of the internal equivalent capacitance which is calculated from the operating current
PD
consumption without load.
CPD × VCC × fIN × ICC
---------------------------------------------------------
4 (per, Gate)
Average operating current can be obtained by the eqation: I
=
CC(opr.)
©1993 Fairchild Semiconductor Corporation
74LVX00 Rev. 1.4.0
www.fairchildsemi.com
4
0.65
A
ꢀꢁꢂꢂꢂꢁꢃꢂ
0.43TYP
14
8
B
6.4
ꢄꢁꢄꢂꢂꢁꢃꢂ
6.10
3.2
1.65
0.2 C B A
ALL LEAD TIPS
1
7
PIN#1 IDENT
TOP VIEW
0.45
RECOMMENDED LAND PATTERN
SEE DETAIL A
1.2 MAX
+0.15
-0.10
0.90
0.20
0.09
ꢂꢁꢃꢂꢂꢁꢂꢀ
0.30
0.19
ALL LEAD TIPS
C
0.1 C
0.13
A B
C
0.65
ꢃꢅꢁꢂꢂꢆ723ꢆꢇꢆ%27720
FRONT VIEW
0.09 MIN
NOTES:
GAGE PLANE
A. CONFORMS TO JEDEC REGISTRATION MO-153,
VARIATION AB, REF NOTE 6
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS
D. DIMENSIONING AND TOLERANCES PER ANSI
Y14.5M, 2009.
0.25
0.09 MIN
ꢂꢉꢆꢊ
ꢂꢁꢈꢂꢁꢃ
1.00
SEATING PLANE
DETAIL A
E. LANDPATTERN STANDARD: SOP65P640X110-14M.
F. DRAWING FILE NAME: MKT-MTC14rev7.
8.75
8.50
A
0.65
7.62
14
8
14
8
B
4.00
3.80
5.60
6.00
1.70
1
7
PIN #1
IDENT.
1
7
1.27
0.51
0.35
1.27
(0.33)
M
0.25
C B A
LAND PATTERN RECOMMENDATION
TOP VIEW
1.75 MAX
A
0.25
0.19
C
0.10 C
NOTES:
1.50
1.25
0.25
0.10
SIDE VIEW
FRONT VIEW
A. CONFORMS TO JEDEC MS-012,
VARIATION AB, ISSUE C
B. ALL DIMENSIONS ARE IN MILLIMETERS
C. DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS
0.50
0.25
x 45
R0.10
GAGE
PLANE
D. LAND PATTERN STANDARD:
SOIC127P600X145-14M
R0.10
E. CONFORMS TO ASME Y14.5M, 2009
D. DRAWING FILENAME: MKT-M14Arev14
0.36
8°
0°
0.90
0.50
SEATING PLANE
(1.04)
DETAIL A
SCALE 16 : 1
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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