74LCXH16245MTDX [ONSEMI]
带总线保持功能的低电压16位双向收发器;型号: | 74LCXH16245MTDX |
厂家: | ONSEMI |
描述: | 带总线保持功能的低电压16位双向收发器 |
文件: | 总10页 (文件大小:216K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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May 2002
Revised June 2005
74LCXH16245
Low Voltage 16-Bit Bidirectional Transceiver
with Bushold
General Description
Features
The LCXH16245 contains sixteen non-inverting bidirec-
tional buffers with 3-STATE outputs and is intended for bus
oriented applications. The device is designed for low volt-
age (2.5V or 3.3V) VCC applications with capability of inter-
■ 2.3V–3.6V VCC specifications provided
■ 4.5 ns tPD max (VCC 3.3V), 20 A ICC max
■ Power-down high impedance outputs
■ Bushold on inputs eliminates the need for external
pull-up/pull-down resistors
facing to a 5V signal environment. The device is byte
controlled. Each byte has separate control inputs which
could be shorted together for full 16-bit operation. The T/R
inputs determine the direction of data flow through the
device. The OE inputs disable both the A and B Ports by
placing them in a high impedance state.
■
24 mA output drive (VCC 3.0V)
■ Implements patented noise/EMI reduction circuitry
■ Latch-up performance conforms to the requirements of
JESD78
The LCXH16245 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
■ ESD performance:
Human body model 2000V
Machine model 200V
The LCXH16245 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
■ Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Ordering Code:
Order Number
Package Number
Package Description
74LCXH16245G
(Note 1) (Note 2)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LCXH16245MTD
(Note 2)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 1: Ordering Code “G” indicates Trays.
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
© 2005 Fairchild Semiconductor Corporation
DS500581
www.fairchildsemi.com
Connection Diagrams
Pin Descriptions
Pin Names
Description
Output Enable Input
Transmit/Receive Input
Pin Assignment for SSOP and TSSOP
OEn
T/Rn
A0–A15
B0–B15
Side A Inputs or 3-STATE Outputs (Bushold)
Side B Inputs or 3-STATE Outputs (Bushold)
FBGA Pin Assignments
1
2
3
4
5
6
A
B
C
D
E
F
B0
B2
NC
B1
T/R1
NC
OE1
NC
NC
A1
A0
A2
B4
B3
VCC
GND
GND
GND
VCC
NC
VCC
GND
GND
GND
VCC
NC
A3
A4
B6
B5
A5
A6
B8
B7
A7
A8
B10
B12
B14
B9
A9
A10
A12
A14
G
H
B11
B13
A11
A13
J
B15
NC
T/R2
OE2
NC
A15
Truth Tables
Inputs
Outputs
OE1
T/R1
L
L
L
H
X
Bus B0–B7 Data to Bus A0–A7
Bus A0–A7 Data to Bus B0–B7
HIGH Z State on A0–A7, B0–B7
H
Inputs
Outputs
OE2
T/R2
Pin Assignment for FBGA
L
L
L
H
X
Bus B8–B15 Data to Bus A8–A15
Bus A8–A15 Data to Bus B8–B15
H
HIGH Z State on A8–A15, B8–B15
H
L
X
Z
HIGH Voltage Level
LOW Voltage Level
Immaterial
High Impedance
Logic Diagram
(Top Thru View)
www.fairchildsemi.com
2
Absolute Maximum Ratings(Note 3)
Symbol
VCC
Parameter
Supply Voltage
Value
Conditions
Units
0.5 to 7.0
V
V
VI
DC Input Voltage
0.5 to VCC 0.5
0.5 to 7.0
VO
DC Output Voltage
Output in 3-STATE
V
0.5 to VCC 0.5 Output in HIGH or LOW State (Note 4)
IIK
DC Input Diode Current
DC Output Diode Current
50
50
VI GND
VO GND
VO VCC
mA
mA
IOK
50
IO
DC Output Source/Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature
50
mA
mA
mA
C
ICC
100
IGND
TSTG
100
65 to 150
Recommended Operating Conditions (Note 5)
Symbol
Parameter
Min
2.0
1.5
0
Max
3.6
3.6
VCC
VCC
VCC
24
Units
VCC
Supply Voltage
Operating
V
V
V
Data Retention
VI
Input Voltage
VO
Output Voltage
HIGH or LOW State
3-STATE
0
0
IOH/IOL
Output Current
VCC 3.0V 3.6V
VCC 2.7V 3.0V
VCC 2.3V 2.7V
12
mA
8
TA
Free-Air Operating Temperature
40
0
85
C
t/ V
Input Edge Rate, VIN 0.8V–2.0V, VCC 3.0V
10
ns/V
Note 3: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-
mended Operating Conditions” table will define the conditions for actual device operation.
Note 4: I Absolute Maximum Rating must be observed.
O
Note 5: Floating or unused control inputs must be HIGH or LOW.
DC Electrical Characteristics
V
T
40 C to 85 C
Min Max
CC
A
Symbol
Parameter
Conditions
Units
(V)
2.3 2.7
2.7 3.6
2.3 2.7
2.7 3.6
2.3 3.6
2.3
V
V
V
HIGH Level Input Voltage
1.7
2.0
IH
V
V
LOW Level Input Voltage
HIGH Level Output Voltage
0.7
IL
0.8
I
I
I
I
I
I
I
I
I
I
100
A
V
CC
0.2
OH
OH
OH
OH
OH
OH
OL
OL
OL
OL
OL
8 mA
1.8
2.2
2.4
2.2
12 mA
18 mA
24 mA
2.7
V
3.0
3.0
V
LOW Level Output Voltage
Input Leakage Current
100
8mA
A
2.3 3.6
2.3
0.2
0.6
0.4
0.4
0.55
5.0
5.0
OL
12 mA
16 mA
24 mA
2.7
V
A
3.0
3.0
I
Data
V
V or GND
CC
2.3 3.6
2.3 3.6
I
I
Control
O
V
5.5
I
3
www.fairchildsemi.com
DC Electrical Characteristics (Continued)
V
T
40 C to 85 C
Min Max
CC
A
Symbol
Parameter
Conditions
Units
(V)
I
I
Bushold Input Minimum
Drive Hold Current
V
V
V
V
0.7V
1.7V
0.8V
2.0V
45
45
I(HOLD)
IN
IN
IN
IN
2.3
A
75
3.0
2.7
3.6
75
Bushold Input Over-Drive
Current to Change State
(Note 6)
(Note 7)
(Note 6)
(Note 7)
300
300
450
450
I(OD)
A
I
I
I
3-STATE I/O Leakage
V
V
or GND
2.3 3.6
0
5.0
10
A
A
A
A
OZ
O
CC
O
Power-Off Leakage Current
Quiescent Supply Current
V or V
5.5V
or GND
OFF
CC
I
V
V
V
2.3–3.6
2.3–3.6
20
I
CC
I
Increase in I per Input
V 0.6V
CC
500
CC
CC
IH
Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
AC Electrical Characteristics
T
40 C to 85 C, R
500
A
L
V
3.3V 0.3V
50 pF
V
2.7V
V
CC
2.5V 0.2V
CC
CC
Symbol
Parameter
Units
C
C
50 pF
C
L
30 pF
Max
L
L
Min
1.0
1.0
1.0
1.0
1.0
1.0
Max
4.5
4.5
6.5
6.5
6.4
6.4
1.0
1.0
Min
Max
5.2
5.2
7.2
7.2
6.9
6.9
Min
1.0
1.0
1.0
1.0
1.0
1.0
t
t
t
t
t
t
t
t
Propagation Delay
to B or B to A
n
1.0
1.0
1.0
1.0
1.0
1.0
5.4
5.4
8.5
8.5
7.7
7.7
PHL
ns
ns
ns
ns
A
PLH
n
n
n
Output Enable Time
PZL
PZH
PLZ
Output Disable Time
PHZ
OSHL
OSLH
Output to Output Skew (Note 8)
Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
) or LOW-to-HIGH (t
). Parameter guaranteed by design.
OSLH
OSHL
Dynamic Switching Characteristics
T
25 C
V
(V)
A
CC
Symbol
Parameter
Conditions
Units
Typical
0.8
V
V
Quiet Output Dynamic Peak V
C
C
C
C
50 pF, V
30 pF, V
50 pF, V
30 pF, V
3.3V, V
2.5V, V
3.3V, V
2.5V, V
0V
0V
0V
0V
3.3
2.5
3.3
2.5
OLP
OL
L
L
L
L
IH
IH
IH
IH
IL
IL
IL
IL
V
V
0.6
Quiet Output Dynamic Valley V
0.8
OLV
OL
0.6
Capacitance
Symbol
Parameter
Conditions
Typical
Units
pF
C
Input Capacitance
Input/Output Capacitance
Power Dissipation Capacitance
V
V
V
Open, V 0V or V
CC
7
8
IN
CC
CC
CC
I
C
C
3.3V, V 0V or V
CC
pF
I/O
PD
I
3.3V, V 0V or V , f 10 MHz
20
pF
I
CC
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4
AC LOADING and WAVEFORMS Generic for LCX Family
FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance)
Test
PLH, tPHL
PZL, tPLZ
Switch
Open
t
t
6V at VCC 3.3 0.3V, 2.7V and
VCC x 2 at VCC 2.5 0.2V
tPZH, tPHZ
GND
3-STATE Output High Enable and
Disable Times for Logic
Waveform for Inverting and Non-Inverting Functions
Setup Time, Hold Time and Recovery Time for Logic
Propagation Delay. Pulse Width and trec Waveforms
trise and tfall
3-STATE Output Low Enable and
Disable Times for Logic
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, tr = tf = 3ns)
VCC
Symbol
3.3V 0.3V
1.5V
2.7V
1.5V
2.5V 0.2V
VCC/2
Vmi
Vmo
Vx
1.5V
1.5V
VCC/2
VOL 0.3V
VOH 0.3V
VOL 0.3V
VOH 0.3V
VOL 0.15V
VOH 0.15V
Vy
5
www.fairchildsemi.com
Schematic Diagram Generic for LCX Family
www.fairchildsemi.com
6
Physical Dimensions inches (millimeters) unless otherwise noted
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Package Number BGA54A
7
www.fairchildsemi.com
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
www.fairchildsemi.com
8
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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相关型号:
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