74AC86SCX [ONSEMI]
四路2输入"异或"门;
| 型号： | 74AC86SCX |
| 厂家： | 
ONSEMI |
| 描述： | 四路2输入"异或"门 PC 栅 光电二极管 逻辑集成电路 石英晶振 触发器 |
| 文件： | 总7页 (文件大小：277K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON
Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended
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is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
September 1988
Revised February 2005
74AC86
Quad 2-Input Exclusive-OR Gate
General Description
The AC86 contains four, 2-input exclusive-OR gates.
Features
■ ICC reduced by 50%
■ Outputs source/sink 24 mA
Ordering Code:
Order Number Package Number
Package Description
74AC86SC
74AC86SJ
74AC86MTC
74AC86PC
M14A
M14D
MTC14
N14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Descriptions
Pin Names
A0–A3
Description
Inputs
B0–B3
O0–O3
Inputs
Outputs
FACT is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS009909
www.fairchildsemi.com
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions
Supply Voltage (VCC
)
0.5V to 7.0V
DC Input Diode Current (IIK
VI 0.5V
)
Supply Voltage (VCC
)
2.0V to 6.0V
0V to VCC
20 mA
20 mA
Input Voltage (VI)
VI V CC 0.5V
Output Voltage (VO)
0V to VCC
DC Input Voltage (VI)
0.5V to VCC 0.5V
Operating Temperature (TA)
40 C to 85 C
125 mV/ns
DC Output Diode Current (IOK
VO 0.5V
)
Minimum Input Edge Rate ( V/ t)
20 mA
20 mA
V
IN from 30% to 70% of VCC
VO VCC 0.5V
VCC @ 3.3V, 4.5V, 5.5V
DC Output Voltage (VO)
0.5V to VCC 0.5V
50 mA
DC Output Source or Sink Current (IO)
DC VCC or Ground Current
Per Output Pin (ICC or IGND
)
50 mA
Storage Temperature (TSTG
Junction Temperature (TJ)
PDIP
)
65 C to 150 C
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT circuits outside databook specifications.
140 C
DC Electrical Characteristics
V
T
25 C
T
40 C to 85 C
Guaranteed Limits
CC
A
A
Symbol
Parameter
Units
Conditions
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
Typ
V
V
V
Minimum HIGH Level
Input Voltage
1.5
2.1
3.15
2.1
3.15
3.85
0.9
V
0.1V
0.1V
IH
OUT
2.25
2.75
1.5
V
or V
CC
3.85
0.9
Maximum LOW Level
Input Voltage
V
0.1V
0.1V
IL
OUT
2.25
2.75
2.99
4.49
5.49
1.35
1.65
2.9
1.35
1.65
2.9
V
V
or V
CC
Minimum HIGH Level
Output Voltage
OH
4.4
4.4
I
50 A
OUT
5.4
5.4
V
V or V
IL IH
IN
OH
OH
OH
3.0
4.5
5.5
3.0
4.5
5.5
2.56
3.86
4.86
0.1
2.46
3.76
4.76
0.1
I
I
I
=
=
=
12 mA
V
V
24 mA
24 mA (Note 2)
V
Maximum LOW Level
Output Voltage
0.002
0.001
0.001
OL
0.1
0.1
I
50 A
OUT
0.1
0.1
V
V or V
IL IH
IN
3.0
4.5
5.5
5.5
5.5
5.5
0.36
0.36
0.36
0.1
0.44
0.44
0.44
1.0
I
= 12 mA
= 24 mA
OL
V
I
OL
I
= 24 mA (Note 2)
OL
I
I
I
I
(Note 4) Maximum Input Leakage Current
A
mA
mA
V
V
, GND
CC
IN
I
Minimum Dynamic
Output Current (Note 3)
Maximum Quiescent
Supply Current
75
V
V
V
1.65V Max
3.85V Min
OLD
OHD
CC
OLD
OHD
IN
75
V
CC
5.5
2.0
20.0
A
(Note 4)
or GND
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 20 ms, one output loaded at a time.
Note 4: I and I @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V .
CC
IN
CC
www.fairchildsemi.com
2
AC Electrical Characteristics
V
T
25 C
T
A
40 C to 85 C
C 40 pF
L
CC
A
C
50 pF
Symbol
Parameter
(V)
(Note 5)
3.3
Units
L
Min
2.0
1.5
2.0
1.5
Typ
Max
11.5
8.5
Min
Max
t
t
Propagation Delay
6.0
4.5
6.5
4.5
1.5
1.0
1.5
1.0
12.5
9.5
PHL
ns
ns
Inputs to Outputs
Propagation Delay
Inputs to Outputs
5.0
3.3
11.5
8.5
12.5
9.0
PLH
5.0
Note 5: Voltage Range 3.3V is 3.3V 0.3V
Voltage Range 5.0V is 5.0V 0.5V
Capacitance
Symbol
Parameter
Typ
Units
pF
Conditions
C
C
Input Capacitance
4.5
35
V
OPEN
5.0V
IN
CC
Power Dissipation Capacitance
pF
V
PD
CC
3
www.fairchildsemi.com
0.65
A
ꢀꢁꢂꢂꢂꢁꢃꢂ
0.43TYP
14
8
B
6.4
ꢄꢁꢄꢂꢂꢁꢃꢂ
6.10
3.2
1.65
0.2 C B A
ALL LEAD TIPS
1
7
PIN#1 IDENT
TOP VIEW
0.45
RECOMMENDED LAND PATTERN
SEE DETAIL A
1.2 MAX
+0.15
-0.10
0.90
0.20
0.09
ꢂꢁꢃꢂꢂꢁꢂꢀ
0.30
0.19
ALL LEAD TIPS
C
0.1 C
0.13
A B
C
0.65
ꢃꢅꢁꢂꢂꢆ723ꢆꢇꢆ%27720
FRONT VIEW
0.09 MIN
NOTES:
GAGE PLANE
A. CONFORMS TO JEDEC REGISTRATION MO-153,
VARIATION AB, REF NOTE 6
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS
D. DIMENSIONING AND TOLERANCES PER ANSI
Y14.5M, 2009.
0.25
0.09 MIN
ꢂꢉꢆꢊ
ꢂꢁꢈꢂꢁꢃ
1.00
SEATING PLANE
DETAIL A
E. LANDPATTERN STANDARD: SOP65P640X110-14M.
F. DRAWING FILE NAME: MKT-MTC14rev7.
8.75
8.50
A
0.65
7.62
14
8
14
8
B
4.00
3.80
5.60
6.00
1.70
1
7
PIN #1
IDENT.
1
7
1.27
0.51
0.35
1.27
(0.33)
M
0.25
C B A
LAND PATTERN RECOMMENDATION
TOP VIEW
1.75 MAX
A
0.25
0.19
C
0.10 C
NOTES:
1.50
1.25
0.25
0.10
SIDE VIEW
FRONT VIEW
A. CONFORMS TO JEDEC MS-012,
VARIATION AB, ISSUE C
B. ALL DIMENSIONS ARE IN MILLIMETERS
C. DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS
0.50
0.25
x 45
R0.10
GAGE
PLANE
D. LAND PATTERN STANDARD:
SOIC127P600X145-14M
R0.10
E. CONFORMS TO ASME Y14.5M, 2009
D. DRAWING FILENAME: MKT-M14Arev14
0.36
8°
0°
0.90
0.50
SEATING PLANE
(1.04)
DETAIL A
SCALE 16 : 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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相关型号：
74AC86SCX-LF
XOR Gate, AC Series, 4-Func, 2-Input, CMOS, PDSO14, 0.150 INCH, MS-120, SOIC-14
FAIRCHILD
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