2N6027RLRP [ONSEMI]

Programmable Unijunction Transistor; 可编程单结晶体管
2N6027RLRP
型号: 2N6027RLRP
厂家: ONSEMI    ONSEMI
描述:

Programmable Unijunction Transistor
可编程单结晶体管

晶体 晶体管 可编程单结晶体管
文件: 总8页 (文件大小:152K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Preferred Device  
Programmable Unijunction  
Transistor Triggers  
Designed to enable the engineer to “program’’ unijunction  
http://onsemi.com  
characteristics such as R , η, I , and I by merely selecting two  
BB  
V
P
resistor values. Application includes thyristor–trigger, oscillator, pulse  
and timing circuits. These devices may also be used in special thyristor  
applications due to the availability of an anode gate. Supplied in an  
inexpensive TO–92 plastic package for high–volume requirements,  
this package is readily adaptable for use in automatic insertion  
equipment.  
PUTs  
40 VOLTS  
300 mW  
Programmable — R , η, I and I  
BB  
V
P
G
Low On–State Voltage — 1.5 Volts Maximum @ I = 50 mA  
A
F
K
Low Gate to Anode Leakage Current — 10 nA Maximum  
High Peak Output Voltage — 11 Volts Typical  
Low Offset Voltage — 0.35 Volt Typical (R = 10 k ohms)  
G
Device Marking: Logo, Device Type, e.g., 2N6027, Date Code  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Rating  
Symbol  
Value  
Unit  
1
2
3
*Power Dissipation  
Derate Above 25°C  
P
1/θ  
300  
4.0  
mW  
mW/°C  
F
JA  
*DC Forward Anode Current  
Derate Above 25°C  
I
T
150  
2.67  
mA  
mA/°C  
TO–92 (TO–226AA)  
CASE 029  
STYLE 16  
*DC Gate Current  
I
G
50  
mA  
Repetitive Peak Forward Current  
100 µs Pulse Width, 1% Duty Cycle  
*20 µs Pulse Width, 1% Duty Cycle  
I
Amps  
TRM  
PIN ASSIGNMENT  
Anode  
1.0  
2.0  
1
2
3
Gate  
Non–Repetitive Peak Forward Current  
10 µs Pulse Width  
I
5.0  
Amps  
TSM  
Cathode  
*Gate to Cathode Forward Voltage  
*Gate to Cathode Reverse Voltage  
*Gate to Anode Reverse Voltage  
V
40  
5.0  
40  
40  
Volts  
Volts  
Volts  
Volts  
°C  
GKF  
GKR  
GAR  
V
V
ORDERING INFORMATION  
Seedetailedorderingandshippinginformationinthepackage  
dimensions section on page 7 of this data sheet.  
(1)  
*Anode to Cathode Voltage  
V
AK  
Operating Junction Temperature Range  
T
J
–50 to  
+100  
Preferred devices are recommended choices for future use  
and best overall value.  
*Storage Temperature Range  
T
stg  
–55 to  
+150  
°C  
*Indicates JEDEC Registered Data  
(1) Anode positive, R  
= 1000 ohms  
GA  
Anode negative, R  
= open  
GA  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
May, 2000 – Rev. 2  
2N6027/D  
2N6027, 2N6028  
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Max  
75  
Unit  
°C/W  
°C/W  
°C  
Thermal Resistance, Junction to Case  
R
R
θJC  
Thermal Resistance, Junction to Ambient  
Maximum Lead Temperature for Soldering Purposes  
200  
260  
θJA  
T
L
(
1/16from case, 10 secs max)  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted.)  
C
Characteristic  
Fig. No.  
Symbol  
Min  
Typ  
Max  
Unit  
*Peak Current  
(V = 10 Vdc, R = 1 MΩ)  
2,9,11  
I
P
µA  
2N6027  
2N6028  
2N6027  
2N6028  
1.25  
0.08  
4.0  
2.0  
0.15  
5.0  
S
G
(V = 10 Vdc, R = 10 k ohms)  
S
G
0.70  
1.0  
*Offset Voltage  
(V = 10 Vdc, R = 1 MΩ)  
S
1
V
T
Volts  
2N6027  
2N6028  
(Both Types)  
0.2  
0.2  
0.2  
0.70  
0.50  
0.35  
1.6  
0.6  
0.6  
G
(V = 10 Vdc, R = 10 k ohms)  
S
G
*Valley Current  
(V = 10 Vdc, R = 1 MΩ)  
S
1,4,5  
I
V
µA  
2N6027  
2N6028  
2N6027  
2N6028  
2N6027  
2N6028  
70  
25  
1.5  
1.0  
18  
18  
150  
150  
50  
25  
G
(V = 10 Vdc, R = 10 k ohms)  
S
G
(V = 10 Vdc, R = 200 ohms)  
S
mA  
G
*Gate to Anode Leakage Current  
(V = 40 Vdc, T = 25°C, Cathode Open)  
I
nAdc  
GAO  
1.0  
3.0  
10  
S
A
(V = 40 Vdc, T = 75°C, Cathode Open)  
S
A
Gate to Cathode Leakage Current  
(V = 40 Vdc, Anode to Cathode Shorted)  
I
5.0  
50  
nAdc  
GKS  
S
(1)  
*Forward Voltage (I = 50 mA Peak)  
F
1,6  
3,7  
V
0.8  
11  
1.5  
Volts  
Volt  
F
*Peak Output Voltage  
V
o
6.0  
(V = 20 Vdc, C = 0.2 µF)  
G
C
Pulse Voltage Rise Time  
(V = 20 Vdc, C = 0.2 µF)  
3
t
r
40  
80  
ns  
B
C
*Indicates JEDEC Registered Data  
(1) Pulse Test: Pulse Width 300 µsec, Duty Cycle 2%.  
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2
2N6027, 2N6028  
I
+V  
A
B
V
A
R1 R2  
R1 + R2  
I
R
=
A
G
A
R2  
– V =  
G
+
–V  
P
R1  
R1 + R2  
V
S
V
B
S
V = V – V  
S
R
G
T
P
V
V
AK  
R1  
AK  
V
S
K
V
F
V
V
I
A
I
P
I
V
I
F
I
GAO  
1B –  
Equivalent Test Circuit for  
Figure 1A used for electrical  
characteristics testing  
(also see Figure 2)  
1A –  
Programmable Unijunction  
with “Program” Resistors  
R1 and R2  
IC – Electrical Characteristics  
Figure 1. Electrical Characterization  
+V  
B
+V  
Adjust  
for  
Turn–on  
Threshold  
I (SENSE)  
100k  
1.0%  
P
100 µV = 1.0 nA  
510k  
V
o
6 V  
16k  
27k  
+
2N5270  
R
V
B
R
= R/2  
G
C
C
0.01 µF  
V = V  
v
o
S
B/2  
(See Figure 1)  
0.6 V  
Scope  
20 Ω  
t
t
f
Put  
Under  
Test  
20  
R
Figure 2. Peak Current (I ) Test Circuit  
Figure 3. V and t Test Circuit  
o r  
P
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3
2N6027, 2N6028  
TYPICAL VALLEY CURRENT BEHAVIOR  
500  
1000  
100  
R
G
= 10 kΩ  
100  
R = 10 kΩ  
G
100 kΩ  
1 MΩ  
100 kΩ  
1 MΩ  
10  
5
10  
5
10  
15  
20  
–50  
–25  
0
+25  
+50  
+75  
+100  
V , SUPPLY VOLTAGE (VOLTS)  
S
T , AMBIENT TEMPERATURE (°C)  
A
Figure 4. Effect of Supply Voltage  
Figure 5. Effect of Temperature  
10  
25  
20  
15  
10  
5.0  
0
C = 0.2 µF  
C
T = 25°C  
(SEE FIGURE 3)  
A
T = 25°C  
5.0  
A
2.0  
1.0  
0.5  
0.2  
0.1  
1000 pF  
0.05  
0.02  
0.01  
0.01 0.02  
0.05 0.1  
0.2  
0.5  
1.0  
2.0  
5.0  
0
5.0  
10  
15  
20  
25  
30  
35  
40  
I , PEAK FORWARD CURRENT (AMP)  
F
V , SUPPLY VOLTAGE (VOLTS)  
S
Figure 6. Forward Voltage  
Figure 7. Peak Output Voltage  
+
B2  
A
A
K
E
R
T
R
2
R
2
R
= R1 + R2  
P
BB  
R1  
R1 + R2  
G
A
G
G
N
η =  
P
N
R
1
R
1
C
C
K
K
B1  
Typical Application  
Circuit Symbol  
Equivalent Circuit  
with External Program”  
Resistors R1 and R2  
Figure 8. Programmable Unijunction  
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4
2N6027, 2N6028  
TYPICAL PEAK CURRENT BEHAVIOR  
2N6027  
100  
50  
10  
5.0  
20  
10  
V = 10 VOLTS  
S
(SEE FIGURE 2)  
3.0  
2.0  
5.0  
2.0  
1.0  
0.5  
R
G
= 10 kΩ  
100 kΩ  
1.0 MΩ  
1.0  
0.5  
R
G
= 10 kΩ  
T = 25°C  
(SEE FIGURE 2)  
A
0.3  
0.2  
100 kΩ  
1.0 MΩ  
0.2  
0.1  
0.1  
5.0  
10  
15  
20  
–50  
–25  
0
+25  
+50  
+75  
+100  
V , SUPPLY VOLTAGE (VOLTS)  
S
T , AMBIENT TEMPERATURE (°C)  
A
Figure 9. Effect of Supply Voltage and R  
Figure 10. Effect of Temperature and R  
G
G
2N6028  
10  
1.0  
0.7  
0.5  
5.0  
R
= 10 kΩ  
G
2.0  
1.0  
V = 10 VOLTS  
S
(SEE FIGURE 2)  
0.3  
0.2  
100 kΩ  
0.5  
0.1  
0.07  
0.05  
R
G
= 10 kΩ  
0.2  
0.1  
1.0 MΩ  
100 kΩ  
0.03  
0.02  
T = 25°C  
(SEE FIGURE 2)  
0.05  
A
1.0 MΩ  
0.02  
0.01  
0.01  
5.0  
10  
15  
20  
–50  
–25  
0
+25  
+50  
+75  
+100  
V , SUPPLY VOLTAGE (VOLTS)  
S
T , AMBIENT TEMPERATURE (°C)  
A
Figure 11. Effect of Supply Voltage and R  
Figure 12. Effect of Temperature and R  
G
G
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5
2N6027, 2N6028  
TO–92 EIA RADIAL TAPE IN FAN FOLD BOX OR ON REEL  
H2A  
H2A  
H2B  
H2B  
H
W2  
H4  
H5  
T1  
L1  
H1  
W1  
W
L
T
T2  
F1  
F2  
D
P2  
P1  
P2  
P
Figure 13. Device Positioning on Tape  
Specification  
Millimeter  
Inches  
Symbol  
D
Item  
Min  
Max  
Min  
Max  
0.1496  
0.015  
0.0945  
.059  
0.1653  
3.8  
4.2  
Tape Feedhole Diameter  
D2  
F1, F2  
H
0.020  
0.110  
.156  
0.38  
2.4  
1.5  
8.5  
0
0.51  
2.8  
Component Lead Thickness Dimension  
Component Lead Pitch  
4.0  
Bottom of Component to Seating Plane  
Feedhole Location  
H1  
H2A  
H2B  
H4  
H5  
L
0.3346  
0
0.3741  
0.039  
0.051  
0.768  
0.649  
0.433  
9.5  
1.0  
Deflection Left or Right  
0
0
1.0  
Deflection Front or Rear  
0.7086  
0.610  
0.3346  
0.09842  
0.4921  
0.2342  
0.1397  
0.06  
18  
19.5  
16.5  
11  
Feedhole to Bottom of Component  
Feedhole to Seating Plane  
Defective Unit Clipped Dimension  
Lead Wire Enclosure  
15.5  
8.5  
2.5  
12.5  
5.95  
3.55  
0.15  
L1  
P
0.5079  
0.2658  
0.1556  
0.08  
12.9  
6.75  
3.95  
0.20  
1.44  
0.65  
19  
Feedhole Pitch  
P1  
Feedhole Center to Center Lead  
First Lead Spacing Dimension  
Adhesive Tape Thickness  
Overall Taped Package Thickness  
Carrier Strip Thickness  
P2  
T
T1  
0.0567  
0.027  
0.7481  
0.2841  
0.01968  
T2  
0.014  
0.6889  
0.2165  
.0059  
0.35  
17.5  
5.5  
.15  
W
Carrier Strip Width  
W1  
W2  
6.3  
Adhesive Tape Width  
0.5  
Adhesive Tape Position  
NOTES:  
1. Maximum alignment deviation between leads not to be greater than 0.2 mm.  
2. Defective components shall be clipped from the carrier tape such that the remaining protrusion (L) does not exceed a maximum of 11 mm.  
3. Component lead to tape adhesion must meet the pull test requirements.  
4. Maximum non–cumulative variation between tape feed holes shall not exceed 1 mm in 20 pitches.  
5. Holddown tape not to extend beyond the edge(s) of carrier tape and there shall be no exposure of adhesive.  
6. No more than 1 consecutive missing component is permitted.  
7. A tape trailer and leader, having at least three feed holes is required before the first and after the last component.  
8. Splices will not interfere with the sprocket feed holes.  
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6
2N6027, 2N6028  
ORDERING & SHIPPING INFORMATION: 2N6027 and 2N6028 packaging options, Device Suffix  
Europe  
Equivalent  
U.S.  
Shipping  
Description of TO92 Tape Orientation  
2N6027, 2N6028  
Bulk in Box (5K/Box)  
N/A, Bulk  
2N6027, 2N6028RLRA  
Radial Tape and Reel (2K/Reel)  
Radial Tape and Reel (2K/Reel)  
Radial Tape and Fan Fold Box (2K/Box)  
Radial Tape and Fan Fold Box (2K/Box)  
Round side of TO92 and adhesive tape visible  
Flat side of TO92 and adhesive tape visible  
Flat side of TO92 and adhesive tape visible  
Round side of TO92 and adhesive tape visible  
2N6027RL1  
2N6028RLRM  
2N6028RLRP  
PACKAGE DIMENSIONS  
TO–92 (TO–226AA)  
CASE 029–11  
ISSUE AJ  
NOTES:  
A
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
B
2. CONTROLLING DIMENSION: INCH.  
3. CONTOUR OF PACKAGE BEYOND DIMENSION R  
IS UNCONTROLLED.  
4. LEAD DIMENSION IS UNCONTROLLED IN P AND  
BEYOND DIMENSION K MINIMUM.  
R
P
L
INCHES  
DIM MIN MAX  
MILLIMETERS  
SEATING  
PLANE  
K
MIN  
4.45  
4.32  
3.18  
MAX  
5.20  
5.33  
4.19  
A
B
C
D
G
H
J
0.175 0.205  
0.170 0.210  
0.125 0.165  
0.016 0.021 0.407 0.533  
D
0.045 0.055  
0.095 0.105  
0.015 0.020  
1.15  
2.42  
0.39  
1.39  
2.66  
0.50  
–––  
–––  
2.66  
2.54  
–––  
–––  
X X  
G
J
H
V
K
L
N
P
0.500  
0.250  
0.080 0.105  
––– 0.100  
––– 12.70  
–––  
6.35  
2.04  
–––  
2.93  
3.43  
C
SECTION X–X  
R
V
0.115  
0.135  
–––  
–––  
1
N
STYLE 16:  
PIN 1. ANODE  
2. GATE  
3. CATHODE  
N
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7
2N6027, 2N6028  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes  
withoutfurthernoticetoanyproductsherein. SCILLCmakesnowarranty,representationorguaranteeregardingthesuitabilityofitsproductsforanyparticular  
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,  
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be  
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.  
SCILLCproductsarenotdesigned, intended, orauthorizedforuseascomponentsinsystemsintendedforsurgicalimplantintothebody, orotherapplications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or  
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold  
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attorneyfees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim  
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.  
PUBLICATION ORDERING INFORMATION  
NORTH AMERICA Literature Fulfillment:  
CENTRAL/SOUTH AMERICA:  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST)  
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Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada  
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Toll Free from Hong Kong & Singapore:  
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001–800–4422–3781  
N. American Technical Support: 800–282–9855 Toll Free USA/Canada  
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EUROPE: LDC for ON Semiconductor – European Support  
German Phone: (+1) 303–308–7140 (M–F 1:00pm to 5:00pm Munich Time)  
Email: ONlit–german@hibbertco.com  
JAPAN: ON Semiconductor, Japan Customer Focus Center  
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–8549  
Phone: 81–3–5740–2745  
French Phone: (+1) 303–308–7141 (M–F 1:00pm to 5:00pm Toulouse Time)  
Email: ONlit–french@hibbertco.com  
English Phone: (+1) 303–308–7142 (M–F 12:00pm to 5:00pm UK Time)  
Email: ONlit@hibbertco.com  
Email: r14525@onsemi.com  
ON Semiconductor Website: http://onsemi.com  
EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781  
For additional information, please contact your local  
Sales Representative.  
*Available from Germany, France, Italy, England, Ireland  
2N6027/D  

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