2N5060 [ONSEMI]
Sensitive Gate Silicon Controlled Rectifiers; 敏感栅硅控整流器
| 型号： | 2N5060 |
| 厂家： | 
ONSEMI |
| 描述： | Sensitive Gate Silicon Controlled Rectifiers |
| 文件： | 总8页 (文件大小：74K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
2N5060 Series
Preferred Device
Sensitive Gate
Silicon Controlled Rectifiers
Reverse Blocking Thyristors
Annular PNPN devices designed for high volume consumer
applications such as relay and lamp drivers, small motor controls, gate
drivers for larger thyristors, and sensing and detection circuits.
Supplied in an inexpensive plastic TO−92/TO-226AA package which
is readily adaptable for use in automatic insertion equipment.
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SILICON CONTROLLED
RECTIFIERS
0.8 A RMS, 30 − 200 V
Features
• Sensitive Gate Trigger Current − 200 mA Maximum
• Low Reverse and Forward Blocking Current − 50 mA Maximum,
T = 110°C
G
C
• Low Holding Current − 5 mA Maximum
• Passivated Surface for Reliability and Uniformity
• Device Marking: Device Type, e.g., 2N5060, Date Code
• Pb−Free Packages are Available*
A
K
MARKING
DIAGRAM
2N
50xx
YWW
1
TO−92
CASE 29
STYLE 10
2
3
50xx
Y
Specific Device Code
= Year
WW
= Work Week
PIN ASSIGNMENT
Cathode
1
2
3
Gate
Anode
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2005
1
Publication Order Number:
January, 2005 − Rev. 7
2N5060/D
2N5060 Series
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Rating
Symbol
Value
Unit
Peak Repetitive Off−State Voltage (Note 1)
V
DRM,
V
(T = *40 to 110°C, Sine Wave,
J
V
RRM
50 to 60 Hz, Gate Open)
2N5060
2N5061
2N5062
2N5064
30
60
100
200
On-State Current RMS (180° Conduction Angles; T = 80°C)
I
0.8
A
A
C
T(RMS)
*Average On-State Current
I
T(AV)
(180° Conduction Angles)
(T = 67°C)
C
0.51
(T = 102°C)
C
0.255
*Peak Non-repetitive Surge Current,
I
10
A
TSM
T = 25°C
A
(1/2 cycle, Sine Wave, 60 Hz)
2
2
Circuit Fusing Considerations (t = 8.3 ms)
I t
0.4
A s
*Average On-State Current
I
A
T(AV)
(180° Conduction Angles)
(T = 67°C)
C
0.51
(T = 102°C)
C
0.255
*Forward Peak Gate Power (Pulse Width v 1.0 msec; T = 25°C)
P
0.1
0.01
W
W
A
A
GM
*Forward Average Gate Power (T = 25°C, t = 8.3 ms)
P
G(AV)
A
*Forward Peak Gate Current (Pulse Width v 1.0 msec; T = 25°C)
I
1.0
A
GM
*Reverse Peak Gate Voltage (Pulse Width v 1.0 msec; T = 25°C)
V
RGM
5.0
V
A
*Operating Junction Temperature Range
*Storage Temperature Range
T
−40 to +110
−40 to +150
°C
°C
J
T
stg
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. V
and V
for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate
DRM
RRM
voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current
source such that the voltage ratings of the devices are exceeded.
THERMAL CHARACTERISTICS
Characteristic
*Thermal Resistance, Junction−to−Case (Note 2)
Thermal Resistance, Junction−to−Ambient
Symbol
Max
75
Unit
°C/W
°C/W
°C
R
q
JC
JA
R
200
q
*Lead Solder Temperature (Lead Length q 1/16″ from case, 10 s Max)
−
+230*
2. This measurement is made with the case mounted “flat side down” on a heatsink and held in position by means of a metal clamp over the
curved surface.
*Indicates JEDEC Registered Data.
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2
2N5060 Series
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Characteristic
OFF CHARACTERISTICS
Symbol
Min
Typ
Max
Unit
*Peak Repetitive Forward or Reverse Blocking Current (Note 3)
I
, I
DRM RRM
(V = Rated V
or V
)
T
C
T
C
= 25°C
= 110°C
−
−
−
−
10
50
mA
mA
AK
DRM
RRM
ON CHARACTERISTICS
*Peak Forward On−State Voltage (Note 4)
(I = 1.2 A peak @ T = 25°C)
V
TM
−
−
1.7
V
TM
A
Gate Trigger Current (Continuous DC) (Note 5)
*(V = 7.0 Vdc, R = 100 W)
I
mA
GT
T
C
T
C
= 25°C
= −40°C
−
−
−
−
200
350
AK
L
Gate Trigger Voltage (Continuous DC) (Note 5)
*(V = 7.0 Vdc, R = 100 W)
T
C
T
C
= 25°C
= −40°C
V
−
−
−
−
0.8
1.2
V
V
GT
AK
L
*Gate Non−Trigger Voltage
(V = Rated V , R = 100 W) T = 110°C
V
GD
0.1
−
−
AK
DRM
L
C
Holding Current (Note 5)
T
T
= 25°C
= −40°C
I
−
−
−
−
5.0
10
mA
ms
C
C
H
*(V = 7.0 Vdc, initiating current = 20 mA)
AK
Turn-On Time
Delay Time
Rise Time
t
t
−
−
3.0
0.2
−
−
d
r
(I = 1.0 mA, V = Rated V ,
DRM
GT
D
Forward Current = 1.0 A, di/dt = 6.0 A/ms
Turn-Off Time
t
ms
q
(Forward Current = 1.0 A pulse,
Pulse Width = 50 ms,
0.1% Duty Cycle, di/dt = 6.0 A/ms,
dv/dt = 20 V/ms, I = 1 mA)
2N5060, 2N5061
2N5062, 2N5064
−
−
10
30
−
−
GT
DYNAMIC CHARACTERISTICS
Critical Rate of Rise of Off−State Voltage
dv/dt
−
30
−
V/ms
(Rated V
, Exponential)
DRM
3. R = 1000 W is included in measurement.
GK
4. Forward current applied for 1 ms maximum duration, duty cycle p 1%.
5. R current is not included in measurement.
GK
*Indicates JEDEC Registered Data.
Voltage Current Characteristic of SCR
+ Current
Anode +
V
TM
Symbol
Parameter
V
Peak Repetitive Off State Forward Voltage
Peak Forward Blocking Current
Peak Repetitive Off State Reverse Voltage
Peak Reverse Blocking Current
Peak on State Voltage
DRM
DRM
on state
I
I
H
I
at V
RRM
RRM
V
RRM
RRM
I
V
TM
+ Voltage
I
H
Holding Current
I
at V
DRM
Reverse Blocking Region
(off state)
DRM
Forward Blocking Region
(off state)
Reverse Avalanche Region
Anode −
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3
2N5060 Series
CURRENT DERATING
130
130
110
90
a
α = CONDUCTION ANGLE
α
α = CONDUCTION ANGLE
120
110
100
90
CASE MEASUREMENT
POINT − CENTER OF
FLAT PORTION
TYPICAL PRINTED
CIRCUIT BOARD
MOUNTING
dc
70
80
dc
α = 30°
180°
120°
60°
90°
70
50
30
60
50
α = 30°
60° 90° 120°
180°
0
0.1
0.2
0.3
0.4
0.5
0
0.1
0.2
0.3
0.4
I
, AVERAGE ON-STATE CURRENT (AMP)
I
, AVERAGE ON-STATE CURRENT (AMP)
T(AV)
T(AV)
Figure 1. Maximum Case Temperature
Figure 2. Maximum Ambient Temperature
CURRENT DERATING
10
5.0
7.0
5.0
3.0
2.0
T = 110°C
J
25°C
3.0
2.0
1.0
0.7
0.5
1.0
1.0
2.0 3.0
5.0 7.0 10
20 30
50 70 100
0.3
0.2
NUMBER OF CYCLES
Figure 4. Maximum Non−Repetitive Surge Current
0.8
0.6
0.4
180°
120°
0.1
a
90°
60°
0.07
0.05
α = CONDUCTION ANGLE
α = 30°
0.03
0.02
dc
0.2
0
0.01
0
0.5
1.0
1.5
2.0
2.5
0
0.1
0.2
0.3
0.4
0.5
v , INSTANTANEOUS ON-STATE VOLTAGE (VOLTS)
T
I
, AVERAGE ON-STATE CURRENT (AMP)
T(AV)
Figure 3. Typical Forward Voltage
Figure 5. Power Dissipation
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4
2N5060 Series
1.0
0.5
0.2
0.1
0.05
0.02
0.01
0.002
0.005
0.01
0.02
0.05
0.1
0.2
0.5
1.0
2.0
5.0
10
20
t, TIME (SECONDS)
Figure 6. Thermal Response
TYPICAL CHARACTERISTICS
0.8
0.7
0.6
0.5
200
V
= 7.0 V
AK
R = 100
V
= 7.0 V
AK
R = 100
100
50
L
L
R
= 1.0 k
GK
2N5062-64
20
10
5.0
2N5060-61
2.0
1.0
0.5
0.4
0.3
0.2
−75
−50
−25
0
25
50
75
100 110
−75
−50
−25
0
25
50
75
100 110
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 8. Typical Gate Trigger Current
Figure 7. Typical Gate Trigger Voltage
4.0
3.0
V
= 7.0 V
AK
R = 100
L
R
GK
= 1.0 k
2.0
2N5060,61
1.0
0.8
2N5062-64
0.6
0.4
−75
−50
−25
0
25
50
75
100 110
T , JUNCTION TEMPERATURE (°C)
J
Figure 9. Typical Holding Current
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5
2N5060 Series
ORDERING INFORMATION
Device
†
Package
TO−92
Shipping
2N5060
5,000 Units / Box
2,000 / Tape & Reel
2,000 / Tape & Reel
2N5060RLRA
TO−92
2N5060RLRAG
TO−92
(Pb−Free)
2N5060RLRM
2N5061
TO−92
TO−92
2,000 / Ammo Pack
5,000 Units / Box
5,000 Units / Box
2N5061G
TO−92
(Pb−Free)
2N5061RLRA
TO−92
2,000 / Tape & Reel
2,000 / Tape & Reel
2N5061RLRAG
TO−92
(Pb−Free)
2N5061RLRM
2N5062
TO−92
TO−92
2,000 / Ammo Pack
5,000 Units / Box
5,000 Units / Box
2N5062G
TO−92
(Pb−Free)
2N5062RLRA
TO−92
2,000 / Tape & Reel
2,000 / Tape & Reel
2N5062RLRAG
TO−92
(Pb−Free)
2N5064
TO−92
TO−92
TO−92
5,000 Units / Box
2,000 / Tape & Reel
2,000 / Ammo Pack
2,000 / Ammo Pack
2N5064RLRA
2N5064RLRM
2N5064RLRMG
TO−92
(Pb−Free)
2N5060RL1
TO−92
2,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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6
2N5060 Series
PACKAGE DIMENSIONS
TO−92
TO−226AA
CASE 29−11
ISSUE AL
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
A
B
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R
IS UNCONTROLLED.
4. LEAD DIMENSION IS UNCONTROLLED IN P AND
BEYOND DIMENSION K MINIMUM.
R
P
L
INCHES
DIM MIN MAX
MILLIMETERS
SEATING
PLANE
K
MIN
4.45
4.32
3.18
0.407
1.15
2.42
0.39
12.70
6.35
2.04
−−−
MAX
5.20
5.33
4.19
0.533
1.39
2.66
0.50
−−−
A
B
C
D
G
H
J
0.175
0.170
0.125
0.016
0.045
0.095
0.015
0.500
0.250
0.080
−−−
0.205
0.210
0.165
0.021
0.055
0.105
0.020
−−−
D
X X
G
J
H
V
K
L
−−−
−−−
C
N
P
R
V
0.105
0.100
−−−
2.66
2.54
−−−
SECTION X−X
0.115
0.135
2.93
3.43
1
N
−−−
−−−
N
STYLE 10:
PIN 1. CATHODE
2. GATE
3. ANODE
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7
2N5060 Series
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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Phone: 81−3−5773−3850
For additional information, please contact your
local Sales Representative.
2N5060/D
相关型号：
2N506075AP
Silicon Controlled Rectifier, 0.8A I(T)RMS, 30V V(DRM), 30V V(RRM), 1 Element, TO-92, TO-92, 3 PIN
TECCOR
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