2N3055HG [ONSEMI]
晶体管硅功率 NPN;
| 型号： | 2N3055HG |
| 厂家： | 
ONSEMI |
| 描述： | 晶体管硅功率 NPN 局域网 开关 晶体管 功率双极晶体管 |
| 文件： | 总4页 (文件大小：85K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
2N3055, MJ2955
Preferred Device
Complementary Silicon
Power Transistors
. . . designed for general−purpose switching and amplifier
applications.
• DC Current Gain − h = 20−70 @ I = 4 Adc
FE
C
http://onsemi.com
• Collector−Emitter Saturation Voltage −
= 1.1 Vdc (Max) @ I = 4 Adc
V
CE(sat)
C
15 A
POWER TRANSISTORS
COMPLEMENTARY SILICON
60 V
• Excellent Safe Operating Area
• Pb−Free Package is Available
MAXIMUM RATINGS
Rating
Collector−Emitter Voltage
Collector−Emitter Voltage
Collector−Base Voltage
Emitter−Base Voltage
Collector Current − Continuous
Base Current
Symbol
Value
60
Unit
Vdc
Vdc
Vdc
Vdc
Adc
Adc
115 W
V
CEO
CER
V
70
MARKING
DIAGRAM
V
CB
100
7
V
EB
I
C
15
xxxx55
TO−204AA (TO−3)
CASE 1−07
A
I
B
7
YYWW
Total Power Dissipation @ T = 25°C
Derate above 25°C
P
D
115
0.657
W
W/°C
C
Operating and Storage Junction Tempera-
ture Range
T , T
–65 to +200
°C
xxxx55 = Device Code
J
stg
xxxx= 2N3055 or MJ2955
= Assembly Location
= Year
A
YY
THERMAL CHARACTERISTICS
Characteristic
WW = Work Week
Symbol
Max
Unit
x
= 1, 2, or 3
Thermal Resistance, Junction−to−Case
R
1.52
°C/W
q
JC
ORDERING INFORMATION
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits
are exceeded, device functional operation is not implied, damage may occur
and reliability may be affected.
†
Device
2N3055
Package
Shipping
TO−204AA
100 Units / Tray
1 Units / Tubes
2N3055G
TO−204AA
(Pb−Free)
160
140
120
2N3055H
MJ2955
TO−204AA
TO−204AA
100 Units / Tray
100 Units / Tray
100
80
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
60
40
20
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
0
0
25
50
75
100
125
150
175
200
Preferred devices are recommended choices for future use
and best overall value.
T , CASE TEMPERATURE (°C)
C
Figure 1. Power Derating
Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
April, 2004 − Rev. 4
2N3055/D
2N3055, MJ2955
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Characteristic
Symbol
Min
Max
Unit
*OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (Note 1)
V
60
70
−
−
−
Vdc
Vdc
CEO(sus)
(I = 200 mAdc, I = 0)
C
B
Collector−Emitter Sustaining Voltage (Note 1)
(I = 200 mAdc, R = 100 W)
V
CER(sus)
C
BE
Collector Cutoff Current
(V = 30 Vdc, I = 0)
I
0.7
mAdc
mAdc
CEO
CE
B
Collector Cutoff Current
I
CEX
(V = 100 Vdc, V
(V = 100 Vdc, V
CE
= 1.5 Vdc)
= 1.5 Vdc, T = 150°C)
CE
BE(off)
BE(off)
−
−
1.0
5.0
C
Emitter Cutoff Current
(V = 7.0 Vdc, I = 0)
I
−
5.0
mAdc
EBO
BE
C
*ON CHARACTERISTICS (Note 1)
DC Current Gain
h
FE
−
(I = 4.0 Adc, V = 4.0 Vdc)
C
CE
20
5.0
70
−
(I = 10 Adc, V = 4.0 Vdc)
C
CE
Collector−Emitter Saturation Voltage
(I = 4.0 Adc, I = 400 mAdc)
V
Vdc
Vdc
CE(sat)
C
B
−
−
1.1
3.0
(I = 10 Adc, I = 3.3 Adc)
C
B
Base−Emitter On Voltage
(I = 4.0 Adc, V = 4.0 Vdc)
V
1.5
BE(on)
C
CE
SECOND BREAKDOWN
Second Breakdown Collector Current with Base Forward Biased
I
s/b
2.87
−
Adc
(V = 40 Vdc, t = 1.0 s, Nonrepetitive)
CE
DYNAMIC CHARACTERISTICS
Current Gain − Bandwidth Product
f
2.5
15
10
−
120
−
MHz
−
T
(I = 0.5 Adc, V = 10 Vdc, f = 1.0 MHz)
C
CE
*Small−Signal Current Gain
(I = 1.0 Adc, V = 4.0 Vdc, f = 1.0 kHz)
h
fe
C
CE
*Small−Signal Current Gain Cutoff Frequency
(V = 4.0 Vdc, I = 1.0 Adc, f = 1.0 kHz)
f
kHz
hfe
CE
C
*Indicates Within JEDEC Registration. (2N3055)
1. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2.0%.
20
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
50 ms
10
dc
1 ms
breakdown. Safe operating area curves indicate I − V
C
CE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
6
4
500 ms
2
1
250 ms
The data of Figure 2 is based on T = 25°C; T
is
C
J(pk)
variable depending on power level. Second breakdown
pulse limits are valid for duty cycles to 10% but must be
derated for temperature according to Figure 1.
0.6
0.4
BONDING WIRE LIMIT
THERMALLY LIMITED @ T = 25°C (SINGLE PULSE)
C
SECOND BREAKDOWN LIMIT
0.2
6
10
20
40
60
V
CE
, COLLECTOR−EMITTER VOLTAGE (VOLTS)
Figure 2. Active Region Safe Operating Area
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2
2N3055, MJ2955
500
200
V
CE
= 4.0 V
V
CE
= 4.0 V
300
200
T = 150°C
J
T = 150°C
J
25°C
100
70
25°C
100
−ꢀ55°C
−ꢀ55°C
70
50
50
30
20
30
20
10
7.0
5.0
10
0.1
0.2 0.3
0.5 0.7 1.0
2.0 3.0
5.0 7.0 10
0.1
0.2 0.3
0.5 0.7 1.0
2.0 3.0
5.0 7.0 10
I , COLLECTOR CURRENT (AMP)
C
I , COLLECTOR CURRENT (AMP)
C
Figure 3. DC Current Gain, 2N3055 (NPN)
Figure 4. DC Current Gain, MJ2955 (PNP)
2.0
1.6
2.0
1.6
1.2
0.8
0.4
0
T = 25°C
J
T = 25°C
J
I
C
= 1.0 A
4.0 A
8.0 A
I
C
= 1.0 A
4.0 A
8.0 A
1.2
0.8
0.4
0
5.0
10 20
50
100 200
500 1000 2000 5000
5.0
10 20
50
100 200
500 1000 2000
5000
I , BASE CURRENT (mA)
B
I , BASE CURRENT (mA)
B
Figure 5. Collector Saturation Region,
2N3055 (NPN)
Figure 6. Collector Saturation Region,
MJ2955 (PNP)
1.4
2.0
T = 25°C
J
T = 25°C
J
1.2
1.0
0.8
0.6
0.4
0.2
0
1.6
1.2
0.8
0.4
0
V
@ I /I = 10
C B
V
@ I /I = 10
C B
BE(sat)
BE(sat)
V
BE
@ V = 4.0 V
CE
V
BE
@ V = 4.0 V
CE
V
@ I /I = 10
C B
CE(sat)
V
@ I /I = 10
C B
CE(sat)
0.1
0.2 0.3
0.5 0.7 1.0
2.0 3.0
5.0 7.0 10
0.1
0.2
0.3 0.5
1.0
2.0
3.0 5.0
10
I , COLLECTOR CURRENT (AMPERES)
C
I , COLLECTOR CURRENT (AMP)
C
Figure 7. “On” Voltages, 2N3055 (NPN)
Figure 8. “On” Voltages, MJ2955 (PNP)
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3
2N3055, MJ2955
PACKAGE DIMENSIONS
TO−204 (TO−3)
CASE 1−07
ISSUE Z
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
A
N
2. CONTROLLING DIMENSION: INCH.
3. ALL RULES AND NOTES ASSOCIATED WITH
REFERENCED TO−204AA OUTLINE SHALL APPLY.
C
SEATING
PLANE
−T−
E
INCHES
DIM MIN MAX
1.550 REF
MILLIMETERS
K
D 2 PL
MIN
MAX
A
B
C
D
E
G
H
K
L
39.37 REF
M
M
M
Y
0.13 (0.005)
T Q
−−−
0.250
0.038
0.055
1.050
−−−
6.35
0.97
1.40
26.67
8.51
1.09
1.77
0.335
0.043
0.070
U
−Y−
L
V
H
0.430 BSC
0.215 BSC
0.440 0.480
0.665 BSC
10.92 BSC
5.46 BSC
11.18 12.19
16.89 BSC
2
1
B
G
N
Q
U
V
−−−
0.151
0.830
0.165
−−−
3.84
21.08
4.19
1.187 BSC
30.15 BSC
0.131
0.188
3.33
4.77
−Q−
0.13 (0.005)
M
M
Y
T
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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2N3055/D
相关型号：
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