1SMC5.0AT3G [ONSEMI]

1500 Watt Peak Power Zener Transient Voltage Suppressors; 1500瓦峰值功率齐纳瞬态电压抑制器
1SMC5.0AT3G
型号: 1SMC5.0AT3G
厂家: ONSEMI    ONSEMI
描述:

1500 Watt Peak Power Zener Transient Voltage Suppressors
1500瓦峰值功率齐纳瞬态电压抑制器

瞬态抑制器 二极管 光电二极管
文件: 总7页 (文件大小:72K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
1SMC5.0AT3 Series  
1500 Watt Peak Power  
Zener Transient Voltage  
Suppressors  
Unidirectional*  
http://onsemi.com  
The SMC series is designed to protect voltage sensitive  
components from high voltage, high energy transients. They have  
excellent clamping capability, high surge capability, low zener  
impedance and fast response time. The SMC series is supplied in  
ON Semiconductor’s exclusive, cost-effective, highly reliable  
Surmetict package and is ideally suited for use in communication  
systems, automotive, numerical controls, process controls, medical  
equipment, business machines, power supplies and many other  
industrial/consumer applications.  
PLASTIC SURFACE MOUNT  
ZENER TRANSIENT  
VOLTAGE SUPPRESSORS  
5.0−78 VOLTS  
1500 WATT PEAK POWER  
Features  
Cathode  
Anode  
Working Peak Reverse Voltage Range − 5.0 V to 78 V  
Standard Zener Breakdown Voltage Range − 6.7 V to 91.25 V  
Peak Power − 1500 W @ 1 ms  
ESD Rating of Class 3 (>16 KV) per Human Body Model  
Maximum Clamp Voltage @ Peak Pulse Current  
Low Leakage < 5 mA Above 10 V  
SMC  
CASE 403  
PLASTIC  
MARKING DIAGRAM  
UL 497B for Isolated Loop Circuit Protection  
Maximum Temperature Coefficient Specified  
Response Time is Typically < 1 ns  
AYWW  
Gxx G  
G
Pb−Free Packages are Available  
Mechanical Characteristics:  
A
Y
= Assembly Location  
= Year  
CASE: Void-free, transfer-molded, thermosetting plastic  
FINISH: All external surfaces are corrosion resistant and leads are  
readily solderable  
MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES:  
260°C for 10 Seconds  
WW = Work Week  
Gxx = Device Code (Refer to page 3)  
G
= Pb−Free Package  
(Note: Microdot may be in either location)  
LEADS: Modified L−Bend providing more contact area to bond pads  
POLARITY: Cathode indicated by molded polarity notch  
MOUNTING POSITION: Any  
ORDERING INFORMATION  
Device  
Package  
Shipping  
1SMCxxxAT3  
1SMCxxxAT3G  
SMC  
2500/Tape & Reel  
2500/Tape & Reel  
SMC  
(Pb−Free)  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specifications  
Brochure, BRD8011/D.  
Bidirectional devices will not be available in this series.  
DEVICE MARKING INFORMATION  
See specific marking information in the device marking  
column of the Electrical Characteristics table on page 3 of  
this data sheet.  
©
Semiconductor Components Industries, LLC, 2007  
1
Publication Order Number:  
February, 2007 − Rev. 5  
1SMC5.0AT3/D  
1SMC5.0AT3 Series  
MAXIMUM RATINGS  
Rating  
Symbol  
Value  
1500  
4.0  
Unit  
W
Peak Power Dissipation (Note 1) @ T = 25°C, Pulse Width = 1 ms  
P
L
PK  
DC Power Dissipation @ T = 75°C  
P
W
L
D
Measured Zero Lead Length (Note 2)  
Derate Above 75°C  
Thermal Resistance from Junction−to−Lead  
54.6  
18.3  
mW/°C  
°C/W  
R
q
JL  
DC Power Dissipation (Note 3) @ T = 25°C  
P
0.75  
6.1  
165  
W
mW/°C  
°C/W  
A
D
Derate Above 25°C  
Thermal Resistance from Junction−to−Ambient  
R
q
JA  
Forward Surge Current (Note 4) @ T = 25°C  
I
200  
A
A
FSM  
Operating and Storage Temperature Range  
T , T  
−65 to +150  
°C  
J
stg  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
1. 10 x 1000 ms, non−repetitive.  
2. 1 in square copper pad, FR−4 board.  
3. FR−4 board, using ON Semiconductor minimum recommended footprint, as shown in 403 case outline dimensions spec.  
4. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, duty cycle = 4 pulses per minute maximum.  
ELECTRICAL CHARACTERISTICS (T = 25°C unless  
I
A
otherwise noted, V = 3.5 V Max @ I = 100 A) (Note 5)  
F
F
I
F
Symbol  
Parameter  
I
Maximum Reverse Peak Pulse Current  
Clamping Voltage @ I  
PP  
V
C
PP  
V
V
V
BR RWM  
V
Working Peak Reverse Voltage  
C
RWM  
V
I
V
R
T
F
I
Maximum Reverse Leakage Current @ V  
I
R
RWM  
V
Breakdown Voltage @ I  
Test Current  
BR  
T
I
T
F
I
Forward Current  
I
PP  
V
Forward Voltage @ I  
F
F
Uni−Directional TVS  
5. 1/2 sine wave or equivalent, PW = 8.3 ms non−repetitive duty  
cycle  
http://onsemi.com  
2
 
1SMC5.0AT3 Series  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
A
Breakdown Voltage  
V
V
@ I (Note 8)  
C
PP  
V
RWM  
V
V (Note 7)  
@ I  
I
(Note 6)  
I
@ V  
RWM  
BR  
T
C
PP  
R
Device  
Min  
Nom  
Max  
mA  
V
mA  
V
A
Marking  
Device*  
1SMC5.0AT3, G  
1SMC6.0AT3, G  
1SMC6.5AT3, G  
1SMC7.0AT3, G  
GDE  
GDG  
GDK  
GDM  
5.0  
6.0  
6.5  
7.0  
1000  
1000  
500  
6.4  
6.7  
7.02  
7.6  
7.0  
7.37  
7.98  
8.6  
10  
10  
10  
10  
9.2  
10.3  
11.2  
12  
163  
145.6  
133.9  
125  
6.67  
7.22  
7.78  
200  
8.19  
1SMC7.5AT3, G  
1SMC8.0AT3, G  
1SMC8.5AT3, G  
1SMC9.0AT3, G  
GDP  
GDR  
GDT  
GDV  
7.5  
8.0  
8.5  
9.0  
100  
50  
25  
8.33  
8.89  
9.44  
10  
8.77  
9.36  
9.92  
9.21  
9.83  
10.4  
11.1  
1
1
1
1
12.9  
13.6  
14.4  
15.4  
116.3  
110.3  
104.2  
97.4  
10  
10.55  
1SMC10AT3, G  
1SMC12AT3, G  
1SMC13AT3, G  
GDX  
GEE  
GEG  
10  
12  
13  
5
5
5
11.1  
13.3  
14.4  
11.7  
14  
15.15  
12.3  
14.7  
15.9  
1
1
1
17  
19.9  
21.5  
88.2  
75.3  
69.7  
1SMC14AT3, G  
1SMC15AT3, G  
1SMC16AT3, G  
1SMC17AT3, G  
GEK  
GEM  
GEP  
GER  
14  
15  
16  
17  
5
5
5
5
15.6  
16.7  
17.8  
18.9  
16.4  
17.6  
18.75  
19.9  
17.2  
18.5  
19.7  
20.9  
1
1
1
1
23.2  
24.4  
26  
64.7  
61.5  
57.7  
53.3  
27.6  
1SMC18AT3, G  
1SMC20AT3, G  
1SMC22AT3, G  
1SMC24AT3, G  
GET  
GEV  
GEX  
GEZ  
18  
20  
22  
24  
5
5
5
5
20  
21.05  
23.35  
25.65  
28.1  
22.1  
24.5  
26.9  
29.5  
1
1
1
1
29.2  
32.4  
35.5  
38.9  
51.4  
46.3  
42.2  
38.6  
22.2  
24.4  
26.7  
1SMC26AT3, G  
1SMC28AT3, G  
1SMC30AT3, G  
1SMC33AT3, G  
GFE  
GFG  
GFK  
GFM  
26  
28  
30  
33  
5
5
5
5
28.9  
31.1  
33.3  
36.7  
30.4  
32.75  
35.05  
38.65  
31.9  
34.4  
36.8  
40.6  
1
1
1
1
42.1  
45.4  
48.4  
53.3  
35.6  
33  
31  
28.1  
1SMC36AT3, G  
1SMC40AT3, G  
1SMC43AT3, G  
1SMC45AT3  
GFP  
GFR  
GFT  
GFV  
36  
40  
43  
45  
5
5
5
5
40  
44.4  
47.8  
50  
42.1  
46.75  
50.3  
44.2  
49.1  
52.8  
55.3  
1
1
1
1
58.1  
64.5  
69.4  
72.2  
25.8  
32.2  
21.6  
20.6  
52.65  
1SMC48AT3, G  
1SMC51AT3, G  
1SMC54AT3, G  
1SMC58AT3, G  
GFX  
GFZ  
GGE  
GGG  
48  
51  
54  
58  
5
5
5
5
53.3  
56.7  
60  
56.1  
59.7  
63.15  
67.8  
58.9  
62.7  
66.3  
71.2  
1
1
1
1
77.4  
82.4  
87.1  
93.6  
19.4  
18.2  
17.2  
16  
64.4  
1SMC60AT3, G  
1SMC64AT3, G  
1SMC70AT3, G  
1SMC75AT3, G  
1SMC78AT3, G  
GGK  
GGM  
GGP  
GGR  
GGT  
60  
64  
70  
75  
78  
5
5
5
5
5
66.7  
71.1  
77.8  
83.3  
86.7  
70.2  
74.85  
81.9  
87.7  
91.25  
73.7  
78.6  
86  
92.1  
95.8  
1
1
1
1
1
96.8  
103  
113  
121  
126  
15.5  
14.6  
13.3  
12.4  
11.4  
6. A transient suppressor is normally selected according to the maximum working peak reverse voltage (V ), which should be equal to or  
RWM  
greater than the DC or continuous peak operating voltage level.  
7. V measured at pulse test current I at an ambient temperature of 25°C.  
BR  
T
8. Surge current waveform per Figure 2 and derate per Figure 3 of the General Data − 1500 Watt at the beginning of this group.  
*The “G’’ suffix indicates Pb−Free package available.  
http://onsemi.com  
3
 
1SMC5.0AT3 Series  
100  
PULSE WIDTH (t ) IS DEFINED  
P
NONREPETITIVE  
AS THAT POINT WHERE THE PEAK  
CURRENT DECAYS TO 50%  
t 10 ms  
rꢀ  
PULSE WAVEFORM  
SHOWN IN FIGURE 2  
OF I  
.
PP  
100  
50  
0
PEAK VALUE − I  
PP  
10  
I
PP  
2
HALF VALUE −  
t
P
1
0.1 ms 1 ms  
10 ms  
100 ms  
t , PULSE WIDTH  
1 ms  
10 ms  
0
1
2
3
4
t, TIME (ms)  
P
Figure 1. Pulse Rating Curve  
Figure 2. Pulse Waveform  
160  
1000  
500  
V
ꢀ(NOM)ꢀ=ꢀ6.8ꢀTOꢀ13ꢀV  
20ꢀV  
140  
120  
BR  
T ꢀ=ꢀ25°C  
L
t ꢀ=ꢀ10ꢀms  
P
43ꢀV  
24ꢀV  
200  
100  
50  
75ꢀV  
120ꢀV  
100  
80  
180ꢀV  
20  
10  
60  
40  
20  
0
5
2
1
0.3  
0
25  
50  
75  
100  
125  
150  
0.5 0.7  
1
2
3
5
7
10  
20 30  
T , AMBIENT TEMPERATURE (°C)  
A
DV , INSTANTANEOUS INCREASE IN V ABOVE V (NOM) (VOLTS)  
BR  
BR  
BR  
Figure 3. Pulse Derating Curve  
Figure 4. Dynamic Impedance  
UL RECOGNITION  
The entire series has Underwriters Laboratory  
Recognition for the classification of protectors (QVGV2)  
under the UL standard for safety 497B and File #E210057.  
Many competitors only have one or two devices recognized  
or have recognition in a non-protective category. Some  
competitors have no recognition at all. With the UL497B  
recognition, our parts successfully passed several tests  
including Strike Voltage Breakdown test, Endurance  
Conditioning, Temperature test, Dielectric Voltage-Withstand  
test, Discharge test and several more.  
Whereas, some competitors have only passed a  
flammability test for the package material, we have been  
recognized for much more to be included in their Protector  
category.  
http://onsemi.com  
4
 
1SMC5.0AT3 Series  
APPLICATION NOTES  
RESPONSE TIME  
minimum lead lengths and placing the suppressor device as  
close as possible to the equipment or components to be  
protected will minimize this overshoot.  
In most applications, the transient suppressor device is  
placed in parallel with the equipment or component to be  
protected. In this situation, there is a time delay associated  
with the capacitance of the device and an overshoot  
condition associated with the inductance of the device and  
the inductance of the connection method. The capacitive  
effect is of minor importance in the parallel protection  
scheme because it only produces a time delay in the  
transition from the operating voltage to the clamp voltage as  
shown in Figure 5.  
The inductive effects in the device are due to actual  
turn-on time (time required for the device to go from zero  
current to full current) and lead inductance. This inductive  
effect produces an overshoot in the voltage across the  
equipment or component being protected as shown in  
Figure 6. Minimizing this overshoot is very important in the  
application, since the main purpose for adding a transient  
suppressor is to clamp voltage spikes. The SMC series have  
a very good response time, typically < 1 ns and negligible  
inductance. However, external inductive effects could  
produce unacceptable overshoot. Proper circuit layout,  
Some input impedance represented by Z is essential to  
in  
prevent overstress of the protection device. This impedance  
should be as high as possible, without restricting the circuit  
operation.  
DUTY CYCLE DERATING  
The data of Figure 1 applies for non-repetitive conditions  
and at a lead temperature of 25°C. If the duty cycle increases,  
the peak power must be reduced as indicated by the curves  
of Figure 7. Average power must be derated as the lead or  
ambient temperature rises above 25°C. The average power  
derating curve normally given on data sheets may be  
normalized and used for this purpose.  
At first glance the derating curves of Figure 7 appear to be  
in error as the 10 ms pulse has a higher derating factor than  
the 10 ms pulse. However, when the derating factor for a  
given pulse of Figure 7 is multiplied by the peak power value  
of Figure 1 for the same pulse, the results follow the  
expected trend.  
http://onsemi.com  
5
1SMC5.0AT3 Series  
TYPICAL PROTECTION CIRCUIT  
Z
in  
LOAD  
V
in  
V
L
V
in  
(TRANSIENT)  
OVERSHOOT DUE TO  
INDUCTIVE EFFECTS  
V
V
V
in  
(TRANSIENT)  
V
L
V
L
V
in  
t
d
t
= TIME DELAY DUE TO CAPACITIVE EFFECT  
t
D
t
Figure 5.  
Figure 6.  
1
0.7  
0.5  
0.3  
0.2  
PULSE WIDTH  
10 ms  
0.1  
0.07  
0.05  
1 ms  
0.03  
0.02  
100 ms  
10 ms  
0.01  
0.1 0.2  
0.5  
1
2
5
10 20  
50 100  
D, DUTY CYCLE (%)  
Figure 7. Typical Derating Factor for Duty Cycle  
http://onsemi.com  
6
1SMC5.0AT3 Series  
PACKAGE DIMENSIONS  
SMC  
CASE 403−03  
ISSUE E  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.  
H
E
2. CONTROLLING DIMENSION: INCH.  
3. D DIMENSION SHALL BE MEASURED WITHIN DIMENSION P.  
4. 403−01 THRU −02 OBSOLETE, NEW STANDARD 403−03.  
E
MILLIMETERS  
INCHES  
DIM  
A
A1  
b
c
D
MIN  
1.90  
0.05  
2.92  
0.15  
5.59  
6.60  
7.75  
0.76  
NOM  
2.13  
0.10  
3.00  
0.23  
5.84  
6.86  
7.94  
1.02  
MAX  
MIN  
NOM  
0.084  
0.004  
0.118  
0.009  
0.230  
0.270  
0.313  
0.040  
MAX  
0.095  
0.006  
0.121  
0.012  
0.240  
0.280  
0.320  
0.050  
2.41  
0.15  
3.07  
0.30  
6.10  
7.11  
8.13  
1.27  
0.075  
0.002  
0.115  
0.006  
0.220  
0.260  
0.305  
0.030  
b
D
E
H
E
L
L1  
0.51 REF  
0.020 REF  
A
c
A1  
L
L1  
SOLDERING FOOTPRINT*  
4.343  
0.171  
3.810  
0.150  
2.794  
0.110  
mm  
inches  
ǒ
Ǔ
SCALE 4:1  
*For additional information on our Pb−Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
SURMETIC is a trademark of Semiconductor Components Industries, LLC.  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
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USA/Canada  
Europe, Middle East and Africa Technical Support:  
Phone: 421 33 790 2910  
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Phone: 81−3−5773−3850  
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Order Literature: http://www.onsemi.com/orderlit  
Literature Distribution Center for ON Semiconductor  
P.O. Box 5163, Denver, Colorado 80217 USA  
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada  
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
1SMC5.0AT3/D  

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