1N5932BRNG [ONSEMI]
ZEN SUR30 REG 3W;
ONSEMI 
1N59xxBRNG Series
3 W DO-41 Surmetict 30
Zener Voltage Regulators
This is a 1N59xxBRNG series with limits and excellent operating
characteristics that reflect the superior capabilities of silicon−oxide
passivated junctions. All this in an axial−lead, transfer−molded plastic
package that offers protection in all common environmental
conditions.
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Features
Cathode
Anode
• Zener Voltage Range − 3.3 V to 200 V
• ESD Rating of Class 3 (>16 KV) per Human Body Model
• Surge Rating of 98 W @ 1 ms
• Maximum Limits Guaranteed on up to Six Electrical Parameters
• Package No Larger than the Conventional 1 W Package
• This is a Pb−Free Device
AXIAL LEAD
CASE 59AB
STYLE 1
Mechanical Characteristics
CASE: Void free, transfer−molded, thermosetting plastic
FINISH: All external surfaces are corrosion resistant and leads are
readily solderable
MAXIMUM LEAD TEMPERATURE FOR SOLDERING PURPOSES:
260°C, 1/16″ from the case for 10 seconds
POLARITY: Cathode indicated by polarity band
MOUNTING POSITION: Any
MARKING DIAGRAM
A
1N
MAXIMUM RATINGS
59xxR
YYWWG
G
Rating
Symbol
Value
Unit
Max. Steady State Power Dissipation
P
D
3.0
W
A
= Assembly Location
1N59xxR = Device Number
@ T = 75°C, Lead Length = 3/8″
L
Derate above 75°C
24
mW/°C
YY
WW
G
= Year
= Work Week
= Pb−Free Package
Steady State Power Dissipation
P
D
1.0
W
@ T = 50°C
A
Derate above 50°C
6.67
mW/°C
°C
(Note: Microdot may be in either location)
Operating and Storage
Temperature Range
T , T
−65 to
+200
J
stg
ORDERING INFORMATION
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
†
Device
Package
Shipping
1N59xxBRNG
Axial Lead
(Pb−Free)
3000 Units / Box
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
January, 2012 − Rev. 0
1N5929BRN/D
1N59xxBRNG Series
ELECTRICAL CHARACTERISTICS
I
(T = 30°C unless otherwise noted,
L
I
F
V = 1.5 V Max @ I = 200 mAdc for all types)
F
F
Symbol
Parameter
V
Z
Reverse Zener Voltage @ I
ZT
I
ZT
Reverse Current
V
Z
V
R
V
Z
Maximum Zener Impedance @ I
Reverse Current
ZT
ZK
ZT
I
V
F
R
ZT
I
I
Z
ZK
Maximum Zener Impedance @ I
ZK
I
Reverse Leakage Current @ V
Breakdown Voltage
R
R
V
R
I
F
Forward Current
Zener Voltage Regulator
V
F
Forward Voltage @ I
F
I
Maximum DC Zener Current
ZM
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2
1N59xxBRNG Series
ELECTRICAL CHARACTERISTICS (T = 30°C unless otherwise noted, V = 1.5 V Max @ I = 200 mAdc for all types)
L
F
F
Zener Voltage (Note 2)
Zener Impedance (Note 3)
Leakage Current
V (Volts)
Z
@ I
Z
ZT
@ I
Z
ZK
@ I
I @ V
R
I
ZT
ZT
ZK
R
ZM
†
Device
Device
Min
Nom
15
Max
15.75
21.00
25.20
mA
W
W
mA
mA Max
Volts
11.4
15.2
18.2
mA
100
75
(Note 1)
Marking
1N5929BRNG
1N5932BRNG
1N5934BRNG
1N5929R
1N5932R
1N5934R
14.25
19.00
22.80
25.0
18.7
15.6
9
600
650
700
0.25
0.25
0.25
1
1
1
20
14
19
24
62
†The “G’’ suffix indicates Pb−Free package available.
1. TOLERANCE AND TYPE NUMBER DESIGNATION
Tolerance designation − device tolerance of 5% are indicated by a “B” suffix.
2. ZENER VOLTAGE (V ) MEASUREMENT
Z
ON Semiconductor guarantees the zener voltage when measured at 90 seconds while maintaining the lead temperature (T ) at 30°C 1°C,
L
3/8″ from the diode body.
3. ZENER IMPEDANCE (Z ) DERIVATION
Z
The zener impedance is derived from 60 seconds AC voltage, which results when an AC current having an rms value equal to 10% of the
DC zener current (I or I ) is superimposed on I or I .
ZT
ZK
ZT
ZK
5
4
3
L = LEAD LENGTH
TO HEAT SINK
L = 3/8″
2
1
0
0
20 40
60
80 100 120 140 160 180
200
T , LEAD TEMPERATURE (°C)
L
Figure 1. Power Temperature Derating Curve
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3
1N59xxBRNG Series
100
10
1
0.5
0.2
0.1
0.05
0.02
0.01
DUTY CYCLE, D = t /t
1
2
PK
PK
SINGLE PULSE D T = q (t)P
JL
JL
0.1
D = 0
REPETITIVE PULSES D T = q (t,D)P
JL
JL
P
PK
t
1
q
(t,D) = D * q (∞)+(1−D) * q (t)
JL
JL JL
[where q (t) is D = 0 curve]
t
JL
2
0.01
0.0000001 0.000001 0.00001
0.0001
0.001
t, TIME (SECONDS)
0.01
0.1
1
10
100
Figure 2. Typical Thermal Response L, Lead Length = 3/8 Inch
3
1K
2
RECTANGULAR
NONREPETITIVE
1
500
0.5
T = 125°C
A
WAVEFORM
T ꢀ=ꢀ25°C PRIOR
300
200
J
TO INITIAL PULSE
0.2
0.1
0.05
100
50
0.02
0.01
0.005
30
20
T = 125°C
A
0.002
0.001
0.0005
0.0003
10
1
2
5
10
20
50 100 200 400 1000
0.1 0.2 0.3 0.5
1
2
3
5
10 20 30 50 100
NOMINAL V (VOLTS)
Z
PW, PULSE WIDTH (ms)
Figure 3. Maximum Surge Power
Figure 4. Typical Reverse Leakage
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4
1N59xxBRNG Series
APPLICATION NOTE
Since the actual voltage available from a given zener
diode is temperature dependent, it is necessary to determine
junction temperature under any set of operating conditions
in order to calculate its value. The following procedure is
recommended:
DT is the increase in junction temperature above the lead
temperature and may be found from Figure 2 for a train of
power pulses (L = 3/8 inch) or from Figure 10 for dc power.
JL
DTJL = qJL PD
For worst-case design, using expected limits of I , limits
Z
Lead Temperature, T , should be determined from:
L
of P and the extremes of T (DT ) may be estimated.
D
J
J
TL = qLA PD + TA
Changes in voltage, V , can then be found from:
Z
q
is the lead-to-ambient thermal resistance (°C/W) and
LA
DV = qVZ DTJ
P is the power dissipation. The value for q will vary and
depends on the device mounting method. q is generally
30−40°C/W for the various clips and tie points in common
use and for printed circuit board wiring.
The temperature of the lead can also be measured using a
thermocouple placed on the lead as close as possible to the
tie point. The thermal mass connected to the tie point is
normally large enough so that it will not significantly
respond to heat surges generated in the diode as a result of
pulsed operation once steady-state conditions are achieved.
D
LA
q
, the zener voltage temperature coefficient, is found
VZ
LA
from Figures 5 and 6.
Under high power-pulse operation, the zener voltage will
vary with time and may also be affected significantly by the
zener resistance. For best regulation, keep current
excursions as low as possible.
Data of Figure 2 should not be used to compute surge
capability. Surge limitations are given in Figure 3. They are
lower than would be expected by considering only junction
temperature, as current crowding effects cause temperatures
to be extremely high in small spots resulting in device
degradation should the limits of Figure 3 be exceeded.
Using the measured value of T , the junction temperature
may be determined by:
L
TJ = TL + DTJL
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5
1N59xxBRNG Series
TEMPERATURE COEFFICIENT RANGES
(90% of the Units are in the Ranges Indicated)
10
1000
8
6
4
500
200
100
2
0
RANGE
50
20
10
-2
-4
10
20
50
100
200
400
1000
3
4
5
6
7
8
9
10
11
12
V , ZENER VOLTAGE @ I (VOLTS)
Z ZT
V , ZENER VOLTAGE @ I (VOLTS)
Z ZT
Figure 5. Units To 12 Volts
Figure 6. Units 10 To 400 Volts
ZENER VOLTAGE versus ZENER CURRENT
(Figures 7, 8 and 9)
100
50
100
50
30
20
30
20
10
10
5
3
2
5
3
2
1
1
0.5
0.5
0.3
0.2
0.3
0.2
0.1
0.1
0
1
2
3
4
5
6
7
8
9
10
0
10
20
30
40
50
60
70
80
90 100
V , ZENER VOLTAGE (VOLTS)
Z
V , ZENER VOLTAGE (VOLTS)
Z
Figure 7. VZ = 3.3 thru 10 Volts
Figure 8. VZ = 12 thru 82 Volts
80
70
60
50
40
30
20
10
0
10
5
2
1
L
L
0.5
T
L
EQUAL CONDUCTION
THROUGH EACH LEAD
0.2
0.1
0
1/8
1/4
3/8
1/2
5/8
3/4
7/8
1
100
150
200
250
300
350
400
L, LEAD LENGTH TO HEAT SINK (INCH)
V , ZENER VOLTAGE (VOLTS)
Z
Figure 9. VZ = 100 thru 400 Volts
Figure 10. Typical Thermal Resistance
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6
1N59xxBRNG Series
PACKAGE DIMENSIONS
AXIAL LEAD
CASE 59AB
ISSUE O
NOTES:
B
1. CONTROLLING DIMENSION: INCHES.
2. PACKAGE CONTOUR IS OPTIONAL WITHIN DIMENSIONS A
AND B. HEAT SLUGS, IF ANY, SHALL BE WITHIN DIMENSION
B BUT NOT SUBJECT TO ITS MINIMUM VALUE.
3. DIMENSION A DEFINES THE ENTIRE BODY INCLUDING
HEAT SLUGS.
4. DIMENSION B IS MEASURED AT THE MAXIMUM DIAMETER
OF THE BODY.
5. POLARITY SHALL BE DENOTED BY A CATHODE BAND.
6. LEAD DIAMETER, D, IS NOT CONTROLLED IN ZONE F.
7. ALL RULES AND NOTES ASSOCIATED WITH JEDEC DO−41
OUTLINE SHALL APPLY
K
D
F
INCHES
DIM MIN MAX
MILLIMETERS
A
MIN
4.10
2.00
0.71
−−−
MAX
5.20
2.70
0.86
1.27
−−−
A
B
D
F
0.161 0.205
0.079 0.106
0.028 0.034
−−− 0.050
POLARITY INDICATOR
OPTIONAL AS NEEDED
(SEE STYLES)
F
K
0.540
−−− 13.70
K
STYLE 1:
PIN 1. CATHODE (POLARITY BAND)
2. ANODE
SURMETIC is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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1N5929BRN/D
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