1N5819G [ONSEMI]
Axial Lead Rectifiers; 轴向引线整流器
| 型号： | 1N5819G |
| 厂家： | 
ONSEMI |
| 描述： | Axial Lead Rectifiers |
| 文件： | 总7页 (文件大小：76K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1N5817, 1N5818, 1N5819
1N5817 and 1N5819 are Preferred Devices
Axial Lead Rectifiers
This series employs the Schottky Barrier principle in a large area
metal−to−silicon power diode. State−of−the−art geometry features
chrome barrier metal, epitaxial construction with oxide passivation
and metal overlap contact. Ideally suited for use as rectifiers in
low−voltage, high−frequency inverters, free wheeling diodes, and
polarity protection diodes.
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Features
SCHOTTKY BARRIER
RECTIFIERS
• Extremely Low V
F
• Low Stored Charge, Majority Carrier Conduction
• Low Power Loss/High Efficiency
• These are Pb−Free Devices*
1.0 AMPERE
20, 30 and 40 VOLTS
Mechanical Characteristics:
• Case: Epoxy, Molded
• Weight: 0.4 Gram (Approximately)
• Finish: All External Surfaces Corrosion Resistant and Terminal
Leads are Readily Solderable
• Lead Temperature for Soldering Purposes:
260°C Max for 10 Seconds
AXIAL LEAD
CASE 59
STYLE 1
• Polarity: Cathode Indicated by Polarity Band
• ESD Ratings: Machine Model = C (>400 V)
Human Body Model = 3B (>8000 V)
MARKING DIAGRAM
A
1N581x
YYWWG
G
A
=Assembly Location
1N581x =Device Number
x= 7, 8, or 9
YY
WW
G
=Year
=Work Week
=Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of
this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Preferred devices are recommended choices for future use
and best overall value.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
July, 2006 − Rev. 10
1N5817/D
1N5817, 1N5818, 1N5819
MAXIMUM RATINGS
Rating
Symbol
1N5817 1N5818 1N5819 Unit
Peak Repetitive Reverse Voltage
Working Peak Reverse Voltage
DC Blocking Voltage
V
20
30
40
V
RRM
V
RWM
V
R
Non−Repetitive Peak Reverse Voltage
RMS Reverse Voltage
V
24
14
36
21
48
28
V
V
A
RSM
V
R(RMS)
Average Rectified Forward Current (Note 1), (V
≤ 0.2 V (dc), T = 90°C,
I
1.0
R(equiv)
R
L
O
R
q
JA
= 80°C/W, P.C. Board Mounting, see Note 2, T = 55°C)
A
Ambient Temperature (Rated V (dc), P
= 0, R
= 80°C/W)
T
A
85
80
75
°C
q
JA
R
F(AV)
Non−Repetitive Peak Surge Current, (Surge applied at rated load conditions,
I
25 (for one cycle)
A
FSM
half−wave, single phase 60 Hz, T = 70°C)
L
Operating and Storage Junction Temperature Range (Reverse Voltage applied)
Peak Operating Junction Temperature (Forward Current applied)
T , T
−65 to +125
150
°C
°C
J
stg
T
J(pk)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
THERMAL CHARACTERISTICS (Note 1)
Characteristic
Thermal Resistance, Junction−to−Ambient
Symbol
Max
Unit
R
q
JA
80
°C/W
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (Note 1)
L
Characteristic
Symbol
1N5817 1N5818 1N5819 Unit
Maximum Instantaneous Forward Voltage (Note 2)
(i = 0.1 A)
v
0.32
0.45
0.75
0.33
0.55
0.875
0.34
0.6
0.9
V
F
F
(i = 1.0 A)
F
(i = 3.0 A)
F
Maximum Instantaneous Reverse Current @ Rated dc Voltage (Note 2)
I
mA
R
(T = 25°C)
(T = 100°C)
1.0
10
1.0
10
1.0
10
L
L
1. Lead Temperature reference is cathode lead 1/32 in from case.
2. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2.0%.
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2
1N5817, 1N5818, 1N5819
125
NOTE 3. — DETERMINING MAXIMUM RATINGS
40 30 23
Reverse power dissipation and the possibility of thermal
runaway must be considered when operating this rectifier at
115
105
95
°
reverse voltages above 0.1 V
. Proper derating may be
RWM
accomplished by use of equation (1).
(1)
T
=
=
=
T
− R
P
− R
P
A(max)
q
q
JA R(AV)
J(max)
JA F(AV)
where T
Maximum allowable ambient temperature
Maximum allowable junction temperature
(125°C or the temperature at which thermal
runaway occurs, whichever is lowest)
A(max)
R
(°C/W) = 110
q
JA
T
J(max)
80
60
P
= Average forward power dissipation
F(AV)
85
P
=
=
Average reverse power dissipation
Junction−to−ambient thermal resistance
R(AV)
R
q
JA
Figures 1, 2, and 3 permit easier use of equation (1) by
taking reverse power dissipation and thermal runaway into
consideration. The figures solve for a reference temperature
as determined by equation (2).
75
3.0
4.0 5.0
7.0
10
15
20
2.0
V , DC REVERSE VOLTAGE (VOLTS)
R
Figure 1. Maximum Reference Temperature
1N5817
T
= T
− R P
q
JA R(AV)
(2)
R
J(max)
125
115
Substituting equation (2) into equation (1) yields:
40
23
30
T
= T − R P
q
JA F(AV)
(3)
A(max)
R
°
Inspection of equations (2) and (3) reveals that T is the
R
ambient temperature at which thermal runaway occurs or
105
95
where T = 125°C, when forward power is zero. The
J
R
(°C/W) = 110
q
JA
transition from one boundary condition to the other is
evident on the curves of Figures 1, 2, and 3 as a difference
in the rate of change of the slope in the vicinity of 115°C. The
data of Figures 1, 2, and 3 is based upon dc conditions. For
use in common rectifier circuits, Table 1 indicates suggested
factors for an equivalent dc voltage to use for conservative
design, that is:
80
60
85
75
3.0
4.0
5.0
7.0
10
15
20
30
(4)
V
= V
x F
R(equiv)
in(PK)
V , DC REVERSE VOLTAGE (VOLTS)
R
The factor F is derived by considering the properties of the
various rectifier circuits and the reverse characteristics of
Schottky diodes.
Figure 2. Maximum Reference Temperature
1N5818
125
115
40
EXAMPLE: Find T
for 1N5818 operated in a
A(max)
30
23
12−volt dc supply using a bridge circuit with capacitive filter
°
such that I = 0.4 A (I
= 0.5 A), I /I = 10, Input
DC
F(AV)
(FM) (AV)
Voltage = 10 V , R
(rms) qJA
= 80°C/W.
105
95
Step 1. Find V
Step 1. Find ∴ V
. Read F = 0.65 from Table 1,
= (1.41)(10)(0.65) = 9.2 V.
R
(°C/W) = 110
R(equiv)
q
JA
R(equiv)
80
60
Step 2. Find T from Figure 2. Read T = 109°C
R
R
Step 1. Find @ V = 9.2 V and R
= 80°C/W.
q
R
JA
Step 3. Find P
from Figure 4. **Read P
= 0.5 W
F(AV)
(FM)
F(AV)
I
85
@
= 10 and IF(AV) = 0.5 A.
I
(AV)
Step 4. Find T
Step 4. Find T
from equation (3).
= 109 − (80) (0.5) = 69°C.
A(max)
A(max)
75
4.0 5.0
7.0
10
15
20
V , DC REVERSE VOLTAGE (VOLTS)
30
40
R
**Values given are for the 1N5818. Power is slightly lower for the
1N5817 because of its lower forward voltage, and higher for the
1N5819.
Figure 3. Maximum Reference Temperature
1N5819
Table 1. Values for Factor F
Full Wave, Bridge
Half Wave
Circuit
Load
Full Wave, Center Tapped*†
Resistive
Capacitive*
Resistive
0.5
Capacitive
Resistive
1.0
Capacitive
Sine Wave
0.5
1.3
1.5
0.65
0.75
1.3
1.5
Square Wave
**Note that V
0.75
0.75
1.5
†Use line to center tap voltage for V .
≈ 2.0 V
.
in
R(PK)
in(PK)
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3
1N5817, 1N5818, 1N5819
90
80
70
5.0
Sine Wave
π
BOTH LEADS TO HEATSINK,
EQUAL LENGTH
=
(Resistive Load)
I
3.0
2.0
(FM)
I
(AV)
5
Capacitive
Loads
10
1.0
0.7
0.5
{
dc
60
50
40
30
20
10
20
MAXIMUM
SQUARE WAVE
TYPICAL
0.3
0.2
T ≈ 125°C
J
0.1
0.07
0.05
1
1/8
1/4
3/8
1/2
5/8
3/4
7/8
1.0
0.2
0.4
0.6 0.8 1.0
2.0
4.0
L, LEAD LENGTH (INCHES)
I
, AVERAGE FORWARD CURRENT (AMP)
F(AV)
Figure 4. Steady−State Thermal Resistance
Figure 5. Forward Power Dissipation
1N5817−19
1.0
0.7
0.5
0.3
0.2
Z
= Z • r(t)
q
JL
q
JL(t)
P
P
pk
pk
DUTY CYCLE, D = t /t
p
1
PEAK POWER, P , is peak of
an
0.1
pk
t
p
equivalent square power pulse.
TIME
0.07
0.05
t
1
DT = P • R
JL pk
qJL
[D + (1 − D) • r(t + t ) + r(t ) − r(t )] where
1 p p 1
DT = the increase in junction temperature above the lead temperature
JL
0.03
0.02
r(t) = normalized value of transient thermal resistance at time, t, from Figure 6,
i.e.:
r(t) = r(t + t ) = normalized value of transient thermal resistance at time, t + t .
1
p
1
p
0.01
0.1
0.2
0.5
1.0
2.0
5.0
10
20
t, TIME (ms)
50
100
200
500
1.0k
2.0k
5.0k 10k
Figure 6. Thermal Response
Mounting Method 1
Mounting Method 3
NOTE 4. — MOUNTING DATA
Data shown for thermal resistance, junction−to−ambient
(R ) for the mountings shown is to be used as typical guide-
P.C. Board with
1−1/2″ x 1−1/2″
copper surface.
P.C. Board with
1−1/2″ x 1−1/2″
copper surface.
qJA
line values for preliminary engineering, or in case the tie
point temperature cannot be measured.
L = 3/8″
L
L
TYPICAL VALUES FOR RqJA IN STILL AIR
Lead Length, L (in)
Mounting
BOARD GROUND
PLANE
R
Method
q
JA
1/8
1/4
1/2
3/4
Mounting Method 2
1
52
67
65
80
72
87
85
°C/W
°C/W
°C/W
2
3
100
L
L
50
VECTOR PIN MOUNTING
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4
1N5817, 1N5818, 1N5819
NOTE 5. — THERMAL CIRCUIT MODEL
(For heat conduction through the leads)
R
R
R
R
R
R
q
S(K)
q
S(A)
q
L(A)
q
J(A)
q
J(K)
q
L(K)
T
A(A)
T
A(K)
P
D
T
T
T
L(K)
T
T
C(K)
L(A)
C(A)
J
Use of the above model permits junction to lead thermal re-
(Subscripts A and K refer to anode and cathode sides, re-
sistance for any mounting configuration to be found. For a spectively.) Values for thermal resistance components are:
given total lead length, lowest values occur when one side of
the rectifier is brought as close as possible to the heatsink.
Terms in the model signify:
R
R
= 100°C/W/in typically and 120°C/W/in maximum
= 36°C/W typically and 46°C/W maximum.
q
L
J
q
T
A
= Ambient Temperature
T = Case Temperature
C
T = Lead Temperature
L
T = Junction Temperature
J
R
R
R
P
= Thermal Resistance, Heatsink to Ambient
= Thermal Resistance, Lead to Heatsink
= Thermal Resistance, Junction to Case
q
q
q
S
L
J
= Power Dissipation
30
20
D
1 Cycle
20
T = 70°C
L
f = 60 Hz
10
10
7.0
5.0
7.0
T = 100°C
C
5.0
3.0
2.0
Surge Applied at
Rated Load Conditions
25°C
3.0
1.0
2.0 3.0
5.0 7.0 10
20 30
40 70 100
NUMBER OF CYCLES
1.0
0.7
0.5
Figure 8. Maximum Non−Repetitive Surge Current
30
20
T = 125°C
J
0.3
0.2
15
100°C
75°C
5.0
3.0
2.0
0.1
1.0
0.5
0.07
0.05
25°C
0.3
0.2
0.03
0.02
0.1
1N5817
1N5818
1N5819
0.05
0.03
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1
0
4.0
8.0 12
16
20
24
28
32
36 40
v , INSTANTANEOUS FORWARD VOLTAGE (VOLTS)
F
V , REVERSE VOLTAGE (VOLTS)
R
Figure 7. Typical Forward Voltage
Figure 9. Typical Reverse Current
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5
1N5817, 1N5818, 1N5819
NOTE 6. — HIGH FREQUENCY OPERATION
200
Since current flow in a Schottky rectifier is the result of
majority carrier conduction, it is not subject to junction
diode forward and reverse recovery transients due to
minority carrier injection and stored charge. Satisfactory
circuit analysis work may be performed by using a model
consisting of an ideal diode in parallel with a variable
capacitance. (See Figure 10.)
100
1N5817
1N5818
1N5819
70
50
Rectification efficiency measurements show that
operation will be satisfactory up to several megahertz. For
example, relative waveform rectification efficiency is
approximately 70 percent at 2.0 MHz, e.g., the ratio of dc
power to RMS power in the load is 0.28 at this frequency,
whereas perfect rectification would yield 0.406 for sine
wave inputs. However, in contrast to ordinary junction
diodes, the loss in waveform efficiency is not indicative of
power loss: it is simply a result of reverse current flow
through the diode capacitance, which lowers the dc output
voltage.
30
20
T = 25°C
J
f = 1.0 MHz
10
0.4 0.6 0.8 1.0
2.0
4.0 6.0 8.0 10
20
40
V , REVERSE VOLTAGE (VOLTS)
R
Figure 10. Typical Capacitance
ORDERING INFORMATION
Device
†
Package
Shipping
1N5817
Axial Lead*
Axial Lead*
Axial Lead*
Axial Lead*
Axial Lead*
Axial Lead*
Axial Lead*
Axial Lead*
Axial Lead*
Axial Lead*
Axial Lead*
Axial Lead*
1000 Units / Bag
1000 Units / Bag
5000 / Tape & Reel
5000 / Tape & Reel
1000 Units / Bag
1000 Units / Bag
5000 / Tape & Reel
5000 / Tape & Reel
1000 Units / Bag
1000 Units / Bag
5000 / Tape & Reel
5000 / Tape & Reel
1N5817G
1N5817RL
1N5817RLG
1N5818
1N5818G
1N5818RL
1N5818RLG
1N5819
1N5819G
1N5819RL
1N5819RLG
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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6
1N5817, 1N5818, 1N5819
PACKAGE DIMENSIONS
AXIAL LEAD
CASE 59−10
ISSUE U
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
B
2. CONTROLLING DIMENSION: INCH.
3. ALL RULES AND NOTES ASSOCIATED WITH
JEDEC DO−41 OUTLINE SHALL APPLY
4. POLARITY DENOTED BY CATHODE BAND.
5. LEAD DIAMETER NOT CONTROLLED WITHIN F
DIMENSION.
K
D
INCHES
DIM MIN MAX
MILLIMETERS
MIN
4.10
2.00
0.71
−−−
MAX
5.20
2.70
0.86
1.27
−−−
F
A
B
D
F
0.161 0.205
0.079 0.106
0.028 0.034
−−− 0.050
A
K
1.000
−−− 25.40
POLARITY INDICATOR
OPTIONAL AS NEEDED
(SEE STYLES)
STYLE 1:
F
PIN 1. CATHODE (POLARITY BAND)
2. ANODE
K
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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1N5817/D
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