MSM511666C-XXTS-K [OKI]
65,536-Word X 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO (BYTE WRITE); 65536字×16位动态RAM ： EDO与快速页面模式类型（字节写入）
| 型号： | MSM511666C-XXTS-K |
| 厂家： | 
OKI ELECTRONIC COMPONETS |
| 描述： | 65,536-Word X 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO (BYTE WRITE) |
| 文件： | 总16页 (文件大小：239K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
E2G0015-17-41
This version: Jan. 1998
Previous version: May 1997
¡ Semiconductor
MSM511666C/CL
65,536-Word ¥ 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO (BYTE WRITE)
DESCRIPTION
The MSM511666C/CL is a 65,536-word ¥ 16-bit dynamic RAM fabricated in Oki's silicon-gate CMOS
technology. The MSM511666C/CL achieves high integration, high-speed operation, and low-power
consumption because Oki manufactures the device in a quadruple-layer polysilicon/single-layer
metal CMOS process. The MSM511666C/CL is available in a 40-pin plastic SOJ or 44/40-pin plastic
TSOP. The MSM511666CL (the low-power version) is specially designed for lower-power applications.
FEATURES
• 65,536-word ¥ 16-bit configuration
• Single 5 V power supply, ±10% tolerance
• Input
: TTL compatible, low input capacitance
• Output : TTL compatible, 3-state
• Refresh : 256 cycles/4 ms, 256 cycles/32 ms (L-version)
• Byte write and fast page mode with EDO, read modify write capability
• CAS before RAS refresh, hidden refresh, RAS-only refresh capability
• Package options:
40-pin 400 mil plastic SOJ
(SOJ40-P-400-1.27)
(Product : MSM511666C/CL-xxJS)
44/40-pin 400 mil plastic TSOP
(TSOPII44/40-P-400-0.80-K) (Product : MSM511666C/CL-xxTS-K)
xx indicates speed rank.
PRODUCT FAMILY
Access Time (Max.)
Cycle Time
(Min.)
Power Dissipation
Standby (Max.)
Family
tRAC tAA tCAC tOEA
60 ns 30 ns 20 ns 20 ns
70 ns 35 ns 20 ns 20 ns
Operating (Max.)
MSM511666C/CL-60
MSM511666C/CL-70
110 ns
120 ns
550 mW
495 mW
5.5 mW/
1.1 mW (L-version)
1/16
¡ Semiconductor
MSM511666C/CL
PIN CONFIGURATION (TOP VIEW)
VCC
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
1
2
3
4
5
6
7
8
9
44 VSS
VCC
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
1
2
3
4
5
6
7
8
9
40 VSS
39 DQ16
38 DQ15
37 DQ14
36 DQ13
35 DQ12
34 DQ11
33 DQ10
32 DQ9
31 NC
43 DQ16
42 DQ15
41 DQ14
40 DQ13
39 DQ12
38 DQ11
37 DQ10
36 DQ9
35 NC
NC 10
NC 10
VCC 11
UWE 12
LWE 13
RAS 14
A0 15
VCC 13
UWE 14
LWE 15
RAS 16
A0 17
A1 18
A2 19
A3 20
A4 21
32 VSS
31 CAS
30 OE
29 NC
28 NC
27 NC
26 A7
25 A6
24 A5
23 VSS
30 VSS
29 CAS
28 OE
27 NC
26 NC
A1 16
25 NC
A2 17
24 A7
VCC 22
A3 18
23 A6
44/40-Pin Plastic TSOP
(K Type)
A4 19
22 A5
VCC 20
21 VSS
40-Pin Plastic SOJ
Pin Name
Function
A0 - A7
RAS
Address Input
Row Address Strobe
Column Address Strobe
Data Input/Data Output
Output Enable
CAS
DQ1 - DQ16
OE
LWE
Lower Byte Write Enable
Upper Byte Write Enable
Power Supply (5 V)
Ground (0 V)
UWE
VCC
VSS
NC
No Connection
Note :
The same power supply voltage must be provided to every V pin, and the same GND
CC
voltage level must be provided to every V pin.
SS
2/16
¡ Semiconductor
MSM511666C/CL
BLOCK DIAGRAM
Timing
Generator
RAS
Timing
Generator
CAS
Write
Clock
Generator
UWE
LWE
Column
Address
Buffers
Column
Decoders
8
8
OE
Output
Buffers
16
16
16
Internal
Address
Counter
I/O
Selector
Refresh
Control Clock
Sense
Amplifiers
A0 - A7
16
16
16
DQ1 - DQ16
Input
Buffers
16
Row
Address
Buffers
Row
De-
8
8
Word
Drivers
Memory
Cells
coders
VCC
On Chip
BB Generator
V
VSS
FUNCTION TABLE
Input Pin
DQ Pin
DQ1 - DQ8
Function Mode
RAS
CAS
LWE
UWE
OE
DQ9 - DQ16
High-Z
High-Z
DOUT
Standby
Refresh
H
L
L
L
L
L
L
High-Z
High-Z
DOUT
*
H
*
*
*
*
H
*
H
*
L
Word Read
Lower Byte Write
Upper Byte Write
Word Write
—
L
L
L
L
L
DIN
L
H
L
H
L
H
H
H
H
Don't Care
DIN
Don't Care
DIN
DIN
L
High-Z
High-Z
H
H
*: "H" or "L"
3/16
¡ Semiconductor
MSM511666C/CL
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter
Voltage on Any Pin Relative to VSS
Short Circuit Output Current
Power Dissipation
Symbol
VT
Rating
–1.0 to 7.0
50
Unit
V
IOS
mA
W
PD
*
1
Operating Temperature
Storage Temperature
Topr
Tstg
0 to 70
–55 to 150
°C
°C
*: Ta = 25°C
Recommended Operating Conditions
(Ta = 0°C to 70°C)
Parameter
Power Supply Voltage
Symbol
VCC
Min.
4.5
0
Typ.
5.0
0
Max.
Unit
5.5
0
V
V
V
V
VSS
Input High Voltage
Input Low Voltage
VIH
2.4
–1.0
—
6.5
0.8
VIL
—
Capacitance
(VCC = 5 V 10ꢀ% Ta = 25°C% f = 1 MHꢁ)
Parameter
Symbol
Typ.
Max.
Unit
Input Capacitance (A0 - A7)
Input Capacitance
CIN1
—
—
—
7
pF
CIN2
CI/O
7
7
pF
pF
(RAS% CAS% UWE% LWE% OE)
Output Capacitance (DQ1 - DQ16)
4/16
¡ Semiconductor
MSM511666C/CL
DC Characteristics
(VCC = 5 V 10ꢀ% Ta = 0°C to 70°C)
MSM511666
C/CL-60
MSM511666
C/CL-70
Parameter
Symbol
Condition
Unit Note
Min.
Max.
Min.
Max.
VCC
Output High Voltage
Output Low Voltage
VOH IOH = –2.5 mA
VOL IOL = 2.1 mA
0 V £ VI £ 6.5 V;
ILI All other pins not
under test = 0 V
DQ disable
2.4
0
VCC
0.4
2.4
0
V
V
0.4
Input Leakage Current
–10
–10
—
10
10
–10
–10
—
10
10
90
mA
Output Leakage Current ILO
mA
0 V £ VO £ 5.5 V
Average Power
RAS% CAS cycling%
Supply Current
(Operating)
ICC1
100
mA 1% 2
tRC = Min.
RAS% CAS = VIH
—
—
—
2
1
—
—
—
2
1
Power Supply
mA
1
ICC2 RAS% CAS
≥ VCC –0.2 V
RAS cycling%
ICC3 CAS = VIH%
tRC = Min.
Current (Standby)
200
200
mA 1% 5
Average Power
Supply Current
—
—
—
—
—
100
5
—
—
—
—
—
90
5
mA 1% 2
(RAS-only Refresh)
RAS = VIH%
Power Supply
ICC5 CAS = VIL%
DQ = enable
mA
1
Current (Standby)
Average Power
Supply Current
(CAS before RAS Refresh)
Average Power
Supply Current
(Fast Page Mode)
Average Power
Supply Current
(Battery Backup)
RAS cycling%
ICC6
100
95
90
85
300
mA 1% 2
mA 1% 3
CAS before RAS
RAS = VIL%
ICC7 CAS cycling%
tHPC = Min.
tRC = 125 ms%
1% 4%
ICC10
300
mA
CAS before RAS%
tRAS £ 1 ms
5
Notes : 1. I Max. is specified as I for output open condition.
CC
CC
2. The address can be changed once or less while RAS = V .
IL
3. The address can be changed once or less while CAS = V
.
IH
4. V – 0.2 V £ V £ 6.5 V, –1.0 V £ V £ 0.2 V.
CC
IH
IL
5. L-version.
5/16
¡ Semiconductor
MSM511666C/CL
AC Characteristics (1/2)
(VCC = 5 V 10ꢀ% Ta = 0°C to 70°C) Note 1% 2% 3
MSM511666
C/CL-60
MSM511666
C/CL-70
Parameter
Symbol
Unit Note
Min.
Max.
—
Min.
Max.
Random Read or Write Cycle Time
Read Modify Write Cycle Time
Fast Page Mode Cycle Time
tRC
tRWC
tHPC
110
155
25
120
170
30
—
—
—
ns
ns
ns
—
—
Fast Page Mode Read Modify Write
Cycle Time
65
—
70
—
ns
tHPRWC
Access Time from RAS
Access Time from CAS
Access Time from Column Address
Access Time from CAS Precharge
tRAC
tCAC
tAA
—
—
—
—
60
20
30
35
—
—
—
—
70
20
35
40
ns 4% 5% 6
ns
ns
ns
4% 5
4% 6
4
tCPA
Access Time from OE
Output Low Impedance Time from CAS
Data Output Hold After CAS Low
tOEA
tCLZ
tDOH
—
0
20
—
—
15
15
15
—
0
20
—
—
15
15
15
ns
ns
ns
ns
ns
ns
4
4
5
5
0
0
7% 8
7% 8
7
CAS to Data Output Buffer Turn-off Delay Time tCEZ
RAS to Data Output Buffer Turn-off Delay Time tREZ
OE to Data Output Buffer Turn-off Delay Time
0
0
tOEZ
0
0
0
1
—
15
50
4
0
1
—
15
50
4
ns
ns
ms
7
3
WE to Data Output Buffer Turn-off Delay Time tWEZ
Transition Time
tT
Refresh Period
tREF
tREF
tRP
—
40
60
60
20
15
10
32
—
—
40
70
70
20
15
10
32
—
ms
ns
ns
ns
ns
ns
ns
Refresh Period (L-version)
RAS Precharge Time
RAS Pulse Width
10%000
100%000
—
10%000
100%000
—
tRAS
RAS Pulse Width (Fast Page Mode with EDO) tRASP
RAS Hold Time
RAS Hold Time referenced to OE
tRSH
tROH
—
—
—
—
CAS Precharge Time (Fast Page Mode with EDO) tCP
CAS Pulse Width
tCAS
tCSH
tCRP
tRHCP
tCHO
tRCD
tRAD
tRSCD
tASR
tRAH
tASC
tCAH
tAR
10
50
5
10%000
—
10
55
5
10%000
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CAS Hold Time
CAS to RAS Precharge Time
RAS Hold Time from CAS Precharge
OE Hold Time from CAS (DQ Disable)
RAS to CAS Delay Time
RAS to Column Address Delay Time
RAS to Second CAS Delay Time
Row Address Set-up Time
—
—
35
5
—
40
5
—
—
—
20
15
60
0
40
20
15
70
0
50
5
6
30
35
—
—
—
—
10
0
—
10
0
—
Row Address Hold Time
—
—
Column Address Set-up Time
Column Address Hold Time
Column Address Hold Time from RAS
Column Address to RAS Lead Time
10
45
30
—
—
—
10
55
35
—
—
—
ns
ns
ns
tRAL
6/16
¡ Semiconductor
MSM511666C/CL
AC Characteristics (2/2)
(VCC = 5 V 10ꢀ% Ta = 0°C to 70°C) Note 1% 2% 3
MSM511666
C/CL-60
MSM511666
C/CL-70
Parameter
Symbol
Unit Note
Min.
Max.
—
Min.
Max.
0
0
0
0
0
—
ns
Read Command Set-up Time
Read Command Hold Time
tRCS
tRCH
tRRH
tWCS
—
0
0
0
—
—
—
ns
ns
ns
9
9
Read Command Hold Time referenced to RAS
Write Command Set-up Time
—
—
10
Write Command Hold Time
Write Command Hold Time from RAS
tWCH
tWCR
10
40
—
—
10
45
—
—
ns
ns
Write Command Pulse Width
tWP
10
—
10
—
ns
WE Pulse Width (DQ Disable)
OE Command Hold Time
OE Precharge Time
tWPE
tOEH
tOEP
7
10
10
—
—
—
7
10
10
—
—
—
ns
ns
ns
OE Command Hold Time
tOCH
tRWL
tCWL
10
20
20
—
—
—
10
20
20
—
—
—
ns
ns
ns
Write Command to RAS Lead Time
Write Command to CAS Lead Time
Data-in Set-up Time
tDS
tDH
0
—
—
—
—
—
—
—
—
—
—
—
0
—
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
11
11
Data-in Hold Time
10
40
15
40
50
80
55
0
10
45
15
45
60
95
65
0
Data-in Hold Time from RAS
OE to Data-in Delay Time
CAS to WE Delay Time
Column Address to WE Delay Time
RAS to WE Delay Time
tDHR
tOED
tCWD
tAWD
tRWD
tCPWD
tRPC
10
10
10
10
CAS Precharge WE Delay Time
CAS Active Delay Time from RAS Precharge
RAS to CAS Set-up Time (CAS before RAS) tCSR
RAS to CAS Hold Time (CAS before RAS) tCHR
5
10
5
10
7/16
¡ Semiconductor
MSM511666C/CL
Notes: 1. Astart-up delay of 100 µs is required after power-up, followed by a minimum of eight
initialization cycles (RAS-only refresh or CAS before RAS refresh) before proper device
operation is achieved.
2. The AC characteristics assume t = 5 ns.
T
3. V (Min.) and V (Max.) are reference levels for measuring input timing signals.
IH
IL
Transition times (t ) are measured between V and V .
T
IH
IL
4. This parameter is measured with a load circuit equivalent to 1 TTL load and 50 pF.
The output timing reference levels are V = 2.0 V (I = –2 mA) and V = 0.8 V (I
OH
OH
OL
OL
= 2 mA).
5. Operation within the t
(Max.) limit ensures that t
(Max.) can be met.
is greater than the specified
RCD
RAC
t
(Max.) is specified as a reference point only. If t
RCD
RCD
t
(Max.) limit, then the access time is controlled by t
.
RCD
CAC
6. Operation within the t
(Max.) limit ensures that t
(Max.) can be met.
is greater than the specified
RAD
RAC
t
(Max.) is specified as a reference point only. If t
RAD
RAD
t
(Max.) limit, then the access time is controlled by t
.
RAD
AA
7. t
(Max.), t
(Max.), t
(Max.) and t
(Max.) define the time at which the
CEZ
REZ
WEZ
OEZ
output achieves the open circuit condition and are not referenced to output voltage
levels.
8. t
9. t
and t
must be satisfied for open circuit condition.
CEZ
REZ
or t
must be satisfied for a read cycle.
RCH
RRH
10. t
, t
, t
, t
and t
are not restrictive operating parameters. They are
WCS CWD RWD AWD
CPWD
included in the data sheet as electrical characteristics only. If t
≥t
(Min.), then
WCS WCS
the cycle is an early write cycle and the data out will remain open circuit (high
impedance) throughout the entire cycle. If t ≥ t (Min.) , t ≥ t (Min.),
CWD
CWD
RWD
RWD
t
≥ t
(Min.) and t
≥ t
(Min.), then the cycle is a read modify write
AWD AWD
CPWD
CPWD
cycle and data out will contain data read from the selected cell; if neither of the above
sets of conditions is satisfied, then the condition of the data out (at access time) is
indeterminate.
11. These parameters are referenced to the CAS leading edge in an early write cycle, and
to the WE leading edge in an OE control write cycle, or a read modify write cycle.
8/16
E2G0095-17-41H
¡ Semiconductor
MSM511666C/CL
TIMING WAVEFORM
Read Cycle
tRC
tRP
tCRP
tRAS
VIH
VIL
–
–
tAR
RAS
tCSH
tCRP
tRCD
tASC
tRCS
tRSH
tCAS
VIH
VIL
–
–
CAS
tRAD
tRAH
tASR
Row
tRAL
tCAH
Column
VIH
VIL
–
–
Address
tRCH
tRRH
VIH
VIL
–
–
tAA
WE
OE
tROH
tREZ
tOEA
VIH
VIL
–
–
tCEZ
tCAC
tRAC
tOEZ
VOH
VOL
–
–
DQ
Open
Valid Data-out
tCLZ
"H" or "L"
Write Cycle (Early Write)
tRC
tRP
tRAS
VIH
VIL
–
–
tAR
tCRP
RAS
CAS
tCSH
tCRP
tRCD
tRAD
tRAH
tASC
tRSH
tCAS
VIH
VIL
–
–
tRAL
tASR
Row
tCAH
Column
VIH
VIL
–
–
Address
tWCS
tCWL
tWCH
tWP
VIH
VIL
–
–
WE
tWCR
tRWL
VIH
VIL
–
–
OE
tDHR
tDS
tDH
VIH
VIL
–
–
DQ
Open
Valid Data-in
"H" or "L"
9/16
¡ Semiconductor
MSM511666C/CL
Read Modify Write Cycle
tRWC
tRAS
tRP
VIH
VIL
–
–
tAR
RAS
CAS
tCRP
tCSH
tCRP
tRCD
tRSH
tCAS
VIH
VIL
–
–
tRAH
tASC
tASR
tCAH
Column
VIH
VIL
–
–
Row
Address
tCWL
tRWL
tWP
tCWD
tAWD
tRAD
tRWD
tOEA
VIH
VIL
–
–
tAA
WE
OE
tRCS
VIH
VIL
–
–
tOED
tOEZ
tOEH
tDH
tCAC
tDS
tRAC
VI/OH
–
Valid
Data-out
Valid
Data-in
DQ
–
tCLZ
VI/OL
"H" or "L"
10/16
¡ Semiconductor
MSM511666C/CL
Fast Page Mode Read Cycle (Part-1)
tRASP
tRP
tRSCD
VIH
VIL
–
–
tAR
tRCD
tRAD
tRHCP
RAS
CAS
tHPC
tCAS
tCRP
tCP
tCP
tCAS
tCAS
–
–
VIH
VIL
tCSH
tCAH
tASR
Row
tASC
Column
tASC
Column
tCAH
tCAH
tASC
tRAH
–
–
VIH
VIL
Column
Address
tRCS
tRRH
VIH
VIL
–
–
tCHO
tOEP
tOCH
tOEP
WE
tRAC
tAA
tAA
tAA
tCAC
VIH
VIL
–
–
OE
tOEA
tCPA
tOEA
tCAC
tOEA
tOEZ
tCAC tOEZ
tREZ
tDOH
Valid
Data-out
Valid*
Data-out
Valid*
Data-out
VOH
VOL
–
–
Valid
Data-out
DQ
tCLZ
* : Same Data%
"H" or "L"
Fast Page Mode Read Cycle (Part-2)
tRASP
tRP
tCRP
tRSCD
VIH
VIL
–
–
tAR
tRCD
tRAD
tRHCP
RAS
CAS
tHPC
tCAS
tCRP
tCP
tCP
tCAS
tCAS
–
–
VIH
VIL
tCSH
tASR
Row
tASC
Column
tASC
Column
tCAH
tCAH
tCAH
tASC
tRAH
–
–
VIH
VIL
Column
Address
tRCS
tRCS
VIH
VIL
–
–
tRCH
WE
tRAC
tAA
tAA
tAA
tWPE
VIH
VIL
–
–
tCPA
OE
tOEA
tCAC tWEZ
tCAC
tDOH
tCAC
tCEZ
VOH
VOL
–
–
Valid
Data-out
Valid
Data-out
Valid
Data-out
DQ
tCLZ
"H" or "L"
11/16
¡ Semiconductor
MSM511666C/CL
Fast Page Mode Write Cycle (Early Write)
tRP
tRASP
tRSCD
VIH
VIL
–
–
tAR
tRCD
tRAD
RAS
CAS
tHPC
tCAS
tHPC
tCRP
tCP
tCP
tCAS
tCSH
tCAS
tRSH
–
–
VIH
VIL
tASC tCAH
Column
tASC tCAH
Column
tASC tCAH
tASR
tRAH
Row
–
–
VIH
VIL
Column
Address
tWCS
tWCH
tWCS tWCH
tWCS tWCH
VIH
VIL
–
–
WE
VIH
VIL
–
–
OE
tDHR
tDS
tDH
Valid
tDS tDH
tDS tDH
VIH
VIL
–
–
Valid
Data-in
Valid
Data-in
DQ
Data-in
"H" or "L"
Fast Page Mode Read Modify Write Cycle
tRASP
tRSCD
tRWD
VIH
VIL
–
–
tAR
RAS
CAS
tCP
tCRP
tRCD
tRAD
tRAH
–
–
tCWD
tHPRWC
VIH
VIL
tCPWD
tCPA
tRWL
tCWL
tASC
tASR
tASC tCAH
tCAH
–
–
VIH
VIL
Row
Column
Column
Address
tRCS
tAWD
tCWD
tRCS
VIH
VIL
–
–
WE
OE
tAWD
tRAC
tDS tWP
tAA
tDS
tWP
tAA
VIH
VIL
–
–
tOEH
tDH
tOEH
tDH
tOED
tOED
tOEA
tOEA
tCAC
tOEZ
tOEZ
tCAC
VI/OH
VI/OL
–
–
Valid
Data-out
Valid
Data-in
Valid
Data-out
Valid
Data-in
DQ
tCLZ
tCLZ
"H" or "L"
12/16
¡ Semiconductor
MSM511666C/CL
RAS-Only Refresh Cycle
tRC
tRP
tRAS
VIH
VIL
–
–
RAS
CAS
tCRP
tRPC
VIH
VIL
–
–
tASR tRAH
VIH
VIL
–
–
Address
DQ
Row
tCEZ
VOH
VOL
–
–
Open
Note: WE% OE = "H" or "L"
"H" or "L"
CAS before RAS Refresh Cycle
tRC
tRP
tRAS
tRP
VIH
VIL
–
–
RAS
tRPC
tRPC
tCP
tCSR
tCHR
VIH
VIL
–
–
CAS
tCEZ
VOH
VOL
–
–
DQ
Open
Note: WE% OE% Address = "H" or "L"
13/16
¡ Semiconductor
MSM511666C/CL
Hidden Refresh Read Cycle
tRC
tRC
tRAS
tRAS
tRP
tRP
tAR
tRCD
VIH –
RAS
VIL
–
tCRP
tRSH
tCHR
VIH –
tRAD
tASC
CAS
VIL
–
tCAH
Column
tASR
Row
tRAH
VIH
VIL
–
–
Address
tRCS
tRRH
tRAL
tAA
VIH –
VIL
WE
OE
–
tROH
tOEA
VIH –
VIL
–
tCEZ
tOEZ
tCAC
tCLZ
tREZ
tRAC
VOH
VOL
–
–
DQ
Open
Valid Data-out
"H" or "L"
Hidden Refresh Write Cycle
tRC
tRAS
tRC
tRAS
tRP
tRP
tAR
VIH
VIL
–
–
RAS
CAS
tCRP
tRCD
tRSH
tCHR
–
–
VIH
VIL
tRAD
tASC
tASR
tCAH
tRAH
tRAL
–
–
VIH
VIL
Row
Column
tRWL
tWCH
tWP
Address
tWCS
VIH
VIL
–
–
WE
OE
tWCR
VIH
VIL
–
–
tDS
tDH
VIH
VIL
–
–
Valid Data-in
tDHR
DQ
"H" or "L"
14/16
¡ Semiconductor
PACKAGE DIMENSIONS
SOJ40-P-400-1.27
MSM511666C/CL
(Unit : mm)
Mirror finish
Package material
Epoxy resin
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)
42 alloy
Solder plating
5 mm or more
1.70 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
15/16
¡ Semiconductor
MSM511666C/CL
(Unit : mm)
TSOPII44/40-P-400-0.80-K
Mirror finish
Package material
Epoxy resin
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)
42 alloy
Solder plating
5 mm or more
0.49 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
16/16
相关型号：
MSM511666CL-60JS
EDO DRAM, 64KX16, 60ns, CMOS, PDSO40, 0.400 INCH, 1.27 MM PITCH, PLASTIC, SOJ-40
OKI
©2020 ICPDF网 联系我们和版权申明