MSC23237D-XXBS18 [OKI]
2,097,152-word x 36-bit DYNAMIC RAM MODULE : FAST PAGE MODE TYPE; 2,097,152字×36位的动态RAM模块：快速页面模式类型
| 型号： | MSC23237D-XXBS18 |
| 厂家： | 
OKI ELECTRONIC COMPONETS |
| 描述： | 2,097,152-word x 36-bit DYNAMIC RAM MODULE : FAST PAGE MODE TYPE |
| 文件： | 总9页 (文件大小：87K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
This version: Mar. 3. 1999
Semiconductor
MSC23237D-xxBS18/DS18
2,097,152-word x 36-bit DYNAMIC RAM MODULE : FAST PAGE MODE TYPE
DESCRIPTION
The MSC23237D-xxBS18/DS18 is a fully decoded, 2,097,152-word x 36-bit CMOS dynamic random access
memory module composed of eighteen 4Mb DRAMs in SOJ packages mounted with eighteen decoupling capacitors
on a 72-pin glass epoxy single-inline package. This module supports any application where high density and large
capacity of storage memory are required.
FEATURES
· 2,097,152-word x 36-bit organization
· 72-pin Single Inline Memory Module
MSC23237D-xxBS18 : Gold tab
MSC23237D-xxDS18 : Solder tab
· Single +5V supply ± 10% tolerance
· Input
: TTL compatible
· Output
: TTL compatible, 3-state
· Refresh : 1024cycles/16ms
· /CAS before /RAS refresh, hidden refresh, /RAS only refresh capability
· Fast page mode capability
· Multi-bit test mode capability
PRODUCT FAMILY
Cycle
Access Time (Max.)
tRAC tAA tCAC tOEA
Power Dissipation
Time
Family
(Min.)
Operating (Max.)
Standby (Max.)
MSC23237D-60BS18/DS18
MSC23237D-70BS18/DS18
60ns 30ns 15ns 15ns
70ns 35ns 20ns 20ns
110ns
130ns
4703mW
4208mW
99mW
Semiconductor
MSC23237D
MODULE OUTLINE
(Unit : mm)
9.3Max.
MSC23237D-xxBS18/DS18
107.95±0.2*1
101.19Typ.
3.38Typ.
3.18
25.4±0.2
6.7Min.
Typ. Typ.
10.16 6.35
3.7Min.
1
72
R1.57
6.35
2.03Typ.
6.35Typ.
1.27±0.1
1.04Typ.
+0.1
-0.08
1.27
95.25
*1 The common size difference of the board width 12.5mm of its height is specified as ±0.2.
The value above 12.5mm is specified as ±0.5.
Semiconductor
MSC23237D
PIN CONFIGURATION
Pin No.
Pin Name
Pin No.
19
Pin Name
/OE
Pin No.
37
Pin Name
DQ19
DQ20
VSS
Pin No.
55
Pin Name
DQ28
DQ29
DQ30
DQ31
VCC
1
2
VSS
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
VCC
NC
20
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
A7
38
56
3
21
39
57
4
22
40
/CAS0
NC
58
5
23
41
59
6
24
42
NC
60
DQ32
DQ33
DQ34
DQ35
NC
7
25
43
/CAS1
/RAS0
/RAS1
DQ21
/WE
61
8
26
44
62
9
27
45
63
10
11
12
13
14
15
16
17
18
28
46
64
29
DQ16
VCC
47
65
NC
A0
30
48
VSS
66
NC
A1
31
A8
49
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
67
PD1
A2
32
A9
50
68
PD2
A3
33
NC
51
69
PD3
A4
34
NC
52
70
PD4
A5
35
DQ17
DQ18
53
71
NC
A6
36
54
72
VSS
Presence Detect Pins
Pin No.
MSC23237D
-60BS18/DS18
MSC23237D
-70BS18/DS18
Pin Name
67
68
69
70
PD1
PD2
PD3
PD4
NC
NC
NC
NC
NC
NC
VSS
NC
Semiconductor
MSC23237D
BLOCK DIAGRAM
A0-A9
/RAS0
/CAS0
/WE
/OE
A0-A9
/RAS
/CAS
/WE
DQ
DQ
DQ
DQ
DQ0
DQ1
DQ2
DQ3
DQ
DQ
DQ
DQ
A0-A9
/RAS
/CAS
/WE
A0-A9
/RAS
/CAS
/WE
DQ
DQ
DQ
DQ
DQ20
DQ21
DQ22
DQ23
DQ
DQ
DQ
DQ
A0-A9
/RAS
/CAS
/WE
/OE
/OE
/OE
/OE
V
CC
V
SS
V
SS
V
CC
V
CC
V
SS
V
SS
V
CC
A0-A9
/RAS
/CAS
/WE
DQ
DQ
DQ
DQ
DQ4
DQ5
DQ6
DQ7
DQ
DQ
DQ
DQ
A0-A9
/RAS
/CAS
/WE
A0-A9
/RAS
/CAS
/WE
DQ
DQ
DQ
DQ
DQ24
DQ25
DQ26
DQ27
DQ
DQ
DQ
DQ
A0-A9
/RAS
/CAS
/WE
/OE
/OE
/OE
/OE
V
CC
V
SS
V
SS
V
CC
V
CC
V
SS
V
SS
V
CC
A0-A9
/RAS
/CAS
/WE
DQ
DQ
DQ
DQ
DQ8
DQ9
DQ10
DQ11
DQ
DQ
DQ
DQ
A0-A9
/RAS
/CAS
/WE
A0-A9
/RAS
/CAS
/WE
DQ
DQ
DQ
DQ
DQ28
DQ29
DQ30
DQ31
DQ
DQ
DQ
DQ
A0-A9
/RAS
/CAS
/WE
/OE
/OE
/OE
/OE
V
CC
V
SS
V
SS
V
CC
V
CC
V
SS
V
SS
V
CC
A0-A9
/RAS
/CAS
/WE
DQ
DQ
DQ
DQ
DQ12
DQ13
DQ14
DQ15
DQ
DQ
DQ
DQ
A0-A9
/RAS
/CAS
/WE
A0-A9
/RAS
/CAS
/WE
DQ
DQ
DQ
DQ
DQ32
DQ33
DQ34
DQ35
DQ
DQ
DQ
DQ
A0-A9
/RAS
/CAS
/WE
/OE
/OE
/OE
/OE
V
CC
V
SS
V
SS
V
CC
V
CC
V
SS
V
SS
V
CC
A0-A9
/RAS
/CAS
/WE
DQ
DQ
DQ
DQ
DQ16
DQ17
DQ18
DQ19
DQ
DQ
DQ
DQ
A0-A9
/RAS
/CAS
/WE
/OE
/OE
V
CC
V
SS
V
SS
V
CC
/RAS1
/CAS1
V
CC
C1-C18
V
SS
Semiconductor
MSC23237D
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter
Voltage on Any Pin Relative to VSS
Voltage on VCC Supply Relative to VSS
Short Circuit Output Current
Power Dissipation
Symbol
VIN, VOUT
VCC
Rating
-1.0 to +7.0
-1.0 to +7.0
50
Unit
V
V
IOS
mA
W
PD *
18
Operating Temperature
TOPR
0 to +70
-40 to +125
°C
°C
Storage Temperature
TSTG
* Ta = 25°C
Recommended Operating Conditions
( Ta = 0°C to +70°C )
Parameter
Symbol
Min.
4.5
0
Typ.
Max.
Unit
V
VCC
VSS
VIH
VIL
5.0
5.5
0
Power Supply Voltage
0
-
V
Input High Voltage
Input Low Voltage
2.4
-1.0
6.5
0.8
V
-
V
Capacitance
( VCC = 5V ± 10%, Ta = 25°C, f = 1 MHz )
Parameter
Input Capacitance (A0 - A9)
Symbol
CIN1
Typ.
Max.
122
73
Unit
pF
-
-
-
-
Input Capacitance (/RAS0, /RAS1, /CAS0, /CAS1)
Input Capacitance (/WE, /OE)
CIN2
pF
CIN3
140
20
pF
I/O Capacitance (DQ0 - DQ35)
CDQ
pF
Note: Capacitance measured with Boonton Meter.
Semiconductor
MSC23237D
DC Characteristics
(VCC = 5V ± 10%, Ta = 0°C to +70°C )
MSC23237D
-60BS18/DS18
MSC23237D
-70BS18/DS18
Symbo
l
Parameter
Condition
Unit
Note
Min.
Max.
Min.
Max.
0V ≤ VIN ≤ 6.5V;
All other pins not
under test = 0V
Input Leakage Current
Output Leakage Current
ILI
-180
180
-180
180
µA
µA
DQ disable
0V ≤ VOUT ≤ 5.5V
ILO
-20
20
-20
20
Output High Voltage
Output Low Voltage
VOH
VOL
IOH = -5.0mA
IOL = 4.2mA
2.4
0
VCC
0.4
2.4
0
VCC
0.4
V
V
Average Power Supply Current
(Operating)
/RAS, /CAS cycling,
tRC = Min.
ICC1
-
855
-
765
mA
1, 2
/RAS, /CAS = VIH
-
-
36
18
-
-
36
18
mA
mA
1
1
Power Supply Current
(Standby)
ICC2
/RAS, /CAS
≥ VCC -0.2V
/RAS cycling,
/CAS = VIH,
tRC = Min.
Average Power Supply Current
(/RAS only refresh)
ICC3
ICC6
ICC7
-
-
-
855
855
675
-
-
-
765
765
585
mA
mA
mA
1, 2
1, 2
1, 3
Average Power Supply Current
(/CAS before /RAS refresh)
/RAS cycling,
/CAS before /RAS
/RAS = VIL,
/CAS cycling,
tPC = Min.
Average Power Supply Current
(Fast Page Mode)
Notes: 1. ICC Max. is specified as ICC for output open condition.
2. Address can be changed once or less while /RAS = VIL.
3. Address can be changed once or less while /CAS = VIH.
Semiconductor
MSC23237D
AC Characteristics (1/2)
(VCC = 5V ± 10%, Ta = 0°C to +70°C ) Note: 1, 2, 3, 11, 12
MSC23237D
MSC23237D
-60BS18/DS18
-70BS18/DS18
Parameter
Symbol
Unit
Note
Min.
110
150
40
80
-
Max.
Min.
130
180
45
95
-
Max.
Random Read or Write Cycle Time
Read Modify Write Cycle Time
Fast Page Mode Cycle Time
Fast Page Mode Read Modify Write Cycle Time
Access Time from /RAS
tRC
tRWC
tPC
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
-
-
-
tPRWC
tRAC
tCAC
tAA
-
-
60
70
4, 5, 6
Access Time from /CAS
-
15
-
20
4, 5
4, 6
4
Access Time from Column Address
Access Time from /CAS Precharge
Access Time from /OE
-
30
-
35
tCPA
tOEA
tCLZ
tOFF
tOEZ
tT
-
35
-
40
-
15
-
20
4
Output Low Impedance Time from /CAS
/CAS to Data Output Buffer Turn-off Delay Time
/OE to Data Output Buffer Turn-off Delay Time
Transition Time
0
-
0
-
4
0
15
0
20
7
0
15
0
20
7
3
50
3
50
3
Refresh Period
tREF
tRP
-
16
-
16
/RAS Precharge Time
40
60
60
15
15
10
15
60
5
-
50
70
70
20
20
10
20
70
5
-
/RAS Pulse Width
tRAS
tRASP
tRSH
tROH
tCP
10K
10K
/RAS Pulse Width (Fast Page Mode)
/RAS Hold Time
100K
100K
-
-
/RAS Hold Time referenced to /OE
/CAS Precharge Time (Fast Page Mode)
/CAS Pulse Width
-
-
-
-
tCAS
tCSH
tCRP
tRHCP
tRCD
tRAD
tASR
tRAH
tASC
tCAH
tAR
10K
10K
/CAS Hold Time
-
-
-
-
/CAS to /RAS Precharge Time
/RAS Hold Time from /CAS Precharge
/RAS to /CAS Delay Time
35
20
15
0
-
40
20
15
0
-
45
30
-
50
35
-
5
6
/RAS to Column Address Delay Time
Row Address Set-up Time
Row Address Hold Time
10
0
-
10
0
-
Column Address Set-up Time
Column Address Hold Time
Column Address Hold Time from /RAS
Column Address to /RAS Lead Time
-
-
15
50
30
-
15
55
35
-
-
-
tRAL
-
-
Semiconductor
MSC23237D
AC Characteristics (2/2)
(VCC = 5V ± 10%, Ta = 0°C to +70°C ) Note: 1, 2, 3, 11, 12
MSC23237D
MSC23237D
-60BS18/DS18
-70BS18/DS18
Parameter
Symbol
Unit
Note
Min.
0
Max.
Min.
0
Max.
Read Command Set-up Time
Read Command Hold Time
tRCS
tRCH
tRRH
tWCS
tWCH
tWCR
tWP
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
0
0
8
8
9
Read Command Hold Time referenced to /RAS
Write Command Set-up Time
Write Command Hold Time
0
0
0
0
10
45
10
15
15
15
0
10
50
10
20
20
20
0
Write Command Hold Time from /RAS
Write Command Pulse Width
/OE Command Hold Time
tOEH
tRWL
tCWL
tDS
Write Command to /RAS Lead Time
Write Command to /CAS Lead time
Data-in Set-up Time
10
10
Data-in Hold Time
tDH
15
50
15
35
50
80
55
10
15
55
20
45
60
95
65
10
Data-in Hold Time from /RAS
/OE to Data-in Delay Time
tDHR
tOED
tCWD
tAWD
tRWD
tCPWD
tRPC
/CAS to /WE Delay Time
9
9
9
9
Column Address to /WE Delay Time
/RAS to /WE Delay Time
/CAS Precharge /WE Delay Time
/CAS Active Delay Time from /RAS Precharge
/RAS to /CAS Set-up Time
(/CAS before /RAS)
tCSR
tCHR
tWRP
tWRH
tWTS
tWTH
5
-
-
-
-
-
-
5
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
/RAS to /CAS Hold Time
(/CAS before /RAS)
10
10
10
10
10
10
10
10
10
10
/WE to /RAS Precharge Time
(/CAS before /RAS)
/WE Hold Time from /RAS
(/CAS before /RAS)
/RAS to /WE Set-up Time
(Test Mode)
/RAS to /WE Hold Time
(Test Mode)
Semiconductor
MSC23237D
Notes: 1. A start-up delay of 200µs is required after power-up, followed by a minimum of eight initialization cycles
(/RAS only refresh or /CAS before /RAS refresh) before proper device operation is achieved.
2. The AC characteristics assumes tT = 5ns.
3. VIH(Min.) and VIL(Max.) are reference levels for measuring input timing signals. Transition time (tT) are
measured between VIH and VIL.
4. This parameter is measured with a load circuit equivalent to 2TTL loads and 100pF.
5. Operation within the tRCD(Max.) limit ensures that tRAC(Max.) can be met.
tRCD(Max.) is specified as a reference point only. If tRCD is greater than the specified tRCD(Max.) limit, then
the access time is controlled by tCAC
.
6. Operation within the tRAD(Max.) limit ensures that tRAC(Max.) can be met.
tRAD(Max.) is specified as a reference point only. If tRAD is greater than the specified tRAD(Max.) limit, then
the access time is controlled by tAA.
7. tOFF(Max.) and tOEZ(Max.) define the time at which the output achieves the open circuit condition and are
not referenced to output voltage levels.
8. tRCH or tRRH must be satisfied for a read cycle.
9. tWCS, tCWD, tRWD and tCPWD are not restrictive operating parameters. They are included in the data sheet
as electrical characteristics only. If tWCS ≥ tWCS(Min.), the cycle is an early write cycle and the data out will
remain open circuit (high impedance) throughout the entire cycle. If tCWD ≥ tCWD(Min.), tRWD ≥ tRWD(Min.),
t
AWD ≥ tAWD(Min.) and tCPWD ≥ tCPWD(Min.), the cycle is a read modify write cycle and data out will contain
data read from the selected cell; if neither or the above sets of conditions is satisfied, the conditions of
the data out (at access time) is indeterminate.
10. These parameters are referenced to /CAS leading edge in an early write cycle, and to /WE leading edge
in an /OE control write cycle or a read modify write cycle.
11. The test mode is initiated by performing a /WE and /CAS before /RAS refresh cycle. This mode is
latched and remains in effect until the exit cycle is generated. The test mode specified in this data sheet
is a 2-bit parallel test function. CA0 is not used. In a read cycle, if all internal bits are equal, the DQ pin
will indicate a high level. If any internal bits are not equal, the DQ pin will indicate a low level.
The test mode is cleared and the memory device returned to its normal operating state by a /RAS only
refresh or /CAS before /RAS refresh cycle.
12. In a test mode read cycle, the value of access time parameters is delayed for 5ns for the specified value.
These parameters should be specified in test mode cycle by adding the above value to the specified
value in this data sheet.
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