MSC23236D-70BS20 [OKI]

2,097,152-word x 36-bit DYNAMIC RAM MODULE : FAST PAGE MODE TYPE; 2,097,152字×36位的动态RAM模块:快速页面模式类型
MSC23236D-70BS20
型号: MSC23236D-70BS20
厂家: OKI ELECTRONIC COMPONETS    OKI ELECTRONIC COMPONETS
描述:

2,097,152-word x 36-bit DYNAMIC RAM MODULE : FAST PAGE MODE TYPE
2,097,152字×36位的动态RAM模块:快速页面模式类型

存储 内存集成电路 动态存储器
文件: 总9页 (文件大小:87K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
This version: Mar. 3. 1999  
Semiconductor  
MSC23236D/DL-xxBS20/DS20  
2,097,152-word x 36-bit DYNAMIC RAM MODULE : FAST PAGE MODE TYPE  
DESCRIPTION  
The MSC23236D/DL-xxBS20/DS20 is a fully decoded, 2,097,152-word x 36-bit CMOS dynamic random access  
memory module composed of sixteen 4Mb DRAMs in SOJ packages and four 2Mb DRAMs in SOJ packages  
mounted with twenty decoupling capacitors on a 72-pin glass epoxy single-inline package. This module supports any  
application where high density and large capacity of storage memory are required. The MSC23236DL (the low-  
power version) is specially designed for lower-power applications.  
FEATURES  
· 2,097,152-word x 36-bit organization  
· 72-pin Single Inline Memory Module  
MSC23236D/DL-xxBS20 : Gold tab  
MSC23236D/DL-xxDS20 : Solder tab  
· Single +5V supply ± 10% tolerance  
· Input  
: TTL compatible  
· Output  
: TTL compatible, 3-state  
· Refresh : 1024cycles/16ms (1024cycles/128ms: L-version)  
· /CAS before /RAS refresh, hidden refresh, /RAS only refresh capability  
· Fast page mode capability  
· Multi-bit test mode capability  
PRODUCT FAMILY  
Cycle  
Access Time (Max.)  
Power Dissipation  
Time  
Family  
tRAC  
60ns  
70ns  
tAA  
tCAC  
15ns  
20ns  
(Min.)  
Operating (Max.)  
Standby (Max.)  
MSC23236D/DL-60BS20/DS20  
MSC23236D/DL-70BS20/DS20  
30ns  
35ns  
110ns  
130ns  
5115mW  
4565mW  
110mW/  
19.8mW(L-version)  
Semiconductor  
MSC23236D/DL  
MODULE OUTLINE  
(Unit : mm)  
9.3Max.  
MSC23236D/DL-xxBS20/DS20  
107.95±0.2*1  
101.19Typ.  
3.38Typ.  
3.18  
25.4±0.2  
6.2Min.  
Typ. Typ.  
10.16 6.35  
3.7Min.  
1
72  
R1.57  
6.35  
2.03Typ.  
6.35Typ.  
1.27±0.1  
1.04Typ.  
+0.1  
-0.08  
1.27  
95.25  
*1 The common size difference of the board width 12.5mm of its height is specified as ±0.2.  
The value above 12.5mm is specified as ±0.5.  
Semiconductor  
MSC23236D/DL  
PIN CONFIGURATION  
Pin No.  
Pin Name  
Pin No.  
19  
Pin Name  
NC  
Pin No.  
37  
Pin Name  
DQ17  
DQ35  
VSS  
Pin No.  
55  
Pin Name  
DQ12  
DQ30  
DQ13  
DQ31  
VCC  
1
2
VSS  
DQ0  
DQ18  
DQ1  
DQ19  
DQ2  
DQ20  
DQ3  
DQ21  
VCC  
20  
DQ4  
DQ22  
DQ5  
DQ23  
DQ6  
DQ24  
DQ7  
DQ25  
A7  
38  
56  
3
21  
39  
57  
4
22  
40  
/CAS0  
/CAS2  
/CAS3  
/CAS1  
/RAS0  
/RAS1  
NC  
58  
5
23  
41  
59  
6
24  
42  
60  
DQ32  
DQ14  
DQ33  
DQ15  
DQ34  
DQ16  
NC  
7
25  
43  
61  
8
26  
44  
62  
9
27  
45  
63  
10  
11  
12  
13  
14  
15  
16  
17  
18  
28  
46  
64  
NC  
29  
NC  
47  
/WE  
65  
A0  
30  
VCC  
48  
NC  
66  
A1  
31  
A8  
49  
DQ9  
67  
PD1  
A2  
32  
A9  
50  
DQ27  
DQ10  
DQ28  
DQ11  
DQ29  
68  
PD2  
A3  
33  
/RAS3  
/RAS2  
DQ26  
DQ8  
51  
69  
PD3  
A4  
34  
52  
70  
PD4  
A5  
35  
53  
71  
NC  
A6  
36  
54  
72  
VSS  
Presence Detect Pins  
Pin No.  
MSC23236D/DL  
-60BS20/DS20  
MSC23236D/DL  
-70BS20/DS20  
Pin Name  
67  
68  
69  
70  
PD1  
PD2  
PD3  
PD4  
NC  
NC  
NC  
NC  
NC  
NC  
VSS  
NC  
Semiconductor  
MSC23236D/DL  
BLOCK DIAGRAM  
A0-A9  
/RAS0  
/CAS0  
/WE  
/RAS2  
/CAS2  
A0-A9  
DQ  
DQ  
DQ  
DQ  
/OE  
DQ0  
DQ1  
DQ2  
DQ3  
DQ  
DQ  
DQ  
DQ  
/OE  
V
A0-A9  
/RAS  
/CAS  
/WE  
A0-A9  
/RAS  
/CAS  
/WE  
DQ  
DQ  
DQ  
DQ  
/OE  
DQ18  
DQ19  
DQ20  
DQ21  
DQ  
DQ  
DQ  
DQ  
/OE  
V
A0-A9  
/RAS  
/CAS  
/WE  
/RAS  
/CAS  
/WE  
V
CC  
V
SS  
V
CC  
V
CC  
V
SS  
V
CC  
SS  
SS  
A0-A9  
/RAS  
/CAS  
/WE  
DQ  
DQ  
DQ  
DQ  
/OE  
DQ4  
DQ5  
DQ6  
DQ7  
DQ  
DQ  
DQ  
DQ  
/OE  
V
A0-A9  
/RAS  
/CAS  
/WE  
A0-A9  
/RAS  
/CAS  
/WE  
DQ  
DQ  
DQ  
DQ  
/OE  
DQ22  
DQ23  
DQ24  
DQ25  
DQ  
DQ  
DQ  
DQ  
/OE  
V
A0-A9  
/RAS  
/CAS  
/WE  
V
CC  
V
SS  
V
CC  
V
CC  
V
SS  
V
CC  
SS  
SS  
A0-A9 DQ1  
DQ8  
DQ17  
DQ1 A0-A9  
A0-A9 DQ1  
DQ26  
DQ35  
DQ1 A0-A9  
/RAS  
/CAS1  
/CAS2  
/WE  
DQ2  
DQ2  
/RAS  
/CAS1  
/CAS2  
/WE  
/RAS  
/CAS1  
/CAS2  
/WE  
DQ2  
DQ2  
/RAS  
/CAS1  
/CAS2  
/WE  
/OE  
/OE  
/OE  
/OE  
V
V
V
V
V
V
V
V
CC  
SS  
SS  
CC  
CC  
SS  
SS  
CC  
A0-A9  
/RAS  
/CAS  
/WE  
DQ  
DQ  
DQ  
DQ  
/OE  
DQ9  
DQ10  
DQ11  
DQ12  
DQ  
DQ  
DQ  
DQ  
/OE  
A0-A9  
/RAS  
/CAS  
/WE  
A0-A9  
/RAS  
/CAS  
/WE  
DQ  
DQ  
DQ  
DQ  
/OE  
DQ27  
DQ28  
DQ29  
DQ30  
DQ  
DQ  
DQ  
DQ  
/OE  
A0-A9  
/RAS  
/CAS  
/WE  
V
CC  
V
SS  
V
SS  
V
CC  
V
CC  
V
SS  
V
SS  
V
CC  
A0-A9  
/RAS  
/CAS  
/WE  
DQ  
DQ  
DQ  
DQ  
/OE  
DQ13  
DQ14  
DQ15  
DQ16  
DQ  
DQ  
DQ  
DQ  
/OE  
A0-A9  
/RAS  
/CAS  
/WE  
A0-A9  
/RAS  
/CAS  
/WE  
DQ  
DQ  
DQ  
DQ  
/OE  
DQ31  
DQ32  
DQ33  
DQ34  
DQ  
DQ  
DQ  
DQ  
/OE  
A0-A9  
/RAS  
/CAS  
/WE  
V
CC  
V
SS  
V
SS  
V
CC  
V
CC  
V
SS  
V
SS  
V
CC  
/RAS1  
/CAS1  
/RAS3  
/CAS3  
V
CC  
C1-C20  
V
SS  
Semiconductor  
MSC23236D/DL  
ELECTRICAL CHARACTERISTICS  
Absolute Maximum Ratings  
Parameter  
Voltage on Any Pin Relative to VSS  
Voltage on VCC Supply Relative to VSS  
Short Circuit Output Current  
Power Dissipation  
Symbol  
VIN, VOUT  
VCC  
Rating  
-1.0 to +7.0  
-1.0 to +7.0  
50  
Unit  
V
V
IOS  
mA  
W
PD *  
20  
Operating Temperature  
TOPR  
0 to +70  
-40 to +125  
°C  
°C  
Storage Temperature  
TSTG  
* Ta = 25°C  
Recommended Operating Conditions  
( Ta = 0°C to +70°C )  
Parameter  
Symbol  
Min.  
4.5  
0
Typ.  
Max.  
Unit  
V
VCC  
VSS  
VIH  
VIL  
5.0  
5.5  
0
Power Supply Voltage  
0
-
V
Input High Voltage  
Input Low Voltage  
2.4  
-1.0  
6.5  
0.8  
V
-
V
Capacitance  
( VCC = 5V ± 10%, Ta = 25°C, f = 1 MHz )  
Parameter  
Symbol  
CIN1  
Typ.  
Max.  
135  
155  
43  
Unit  
pF  
Input Capacitance (A0 - A9)  
Input Capacitance (/WE)  
-
-
-
-
-
CIN2  
pF  
Input Capacitance (/RAS0- /RAS3)  
Input Capacitance (/CAS0- /CAS3)  
I/O Capacitance (DQ0 - DQ35)  
CIN3  
pF  
CIN4  
43  
pF  
CDQ  
20  
pF  
Note: Capacitance measured with Boonton Meter.  
Semiconductor  
MSC23236D/DL  
DC Characteristics  
(VCC = 5V ± 10%, Ta = 0°C to +70°C )  
MSC23236D/DL MSC23236D/DL  
-60BS20/DS20 -70BS20/DS20  
Symbo  
l
Parameter  
Condition  
Unit  
Note  
Min.  
Max.  
Min.  
Max.  
0V VIN 6.5V:  
All other pins not  
under test = 0V  
Input Leakage Current  
Output Leakage Current  
ILI  
-200  
200  
-200  
200  
µA  
µA  
DQ disable  
0V VOUT 5.5V  
ILO  
-20  
20  
-20  
20  
Output High Voltage  
Output Low Voltage  
VOH  
VOL  
IOH = -5.0mA  
IOL = 4.2mA  
2.4  
0
VCC  
0.4  
2.4  
0
VCC  
0.4  
V
V
Average Power Supply Current  
(Operating)  
/RAS, /CAS cycling,  
tRC = Min.  
ICC1  
-
930  
-
830  
mA  
1, 2  
/RAS, /CAS = VIH  
-
-
-
20  
10  
-
-
-
20  
10  
mA  
mA  
mA  
1
Power supply current  
(Standby)  
ICC2  
1
/RAS, /CAS  
VCC -0.2V  
3.6  
3.6  
1, 5  
/RAS cycling,  
/CAS = VIH,  
tRC = Min.  
Average Power Supply Current  
(/RAS only refresh)  
ICC3  
ICC6  
ICC7  
ICC10  
-
-
-
-
930  
930  
730  
5.6  
-
-
-
-
830  
830  
640  
5.6  
mA  
mA  
mA  
mA  
1, 2  
Average Power Supply Current  
(/CAS before /RAS refresh)  
/RAS cycling,  
/CAS before /RAS  
1, 2  
/RAS = VIL,  
/CAS cycling,  
tPC = Min.  
Average Power Supply Current  
(Fast Page Mode)  
1, 3  
Average Power Supply Current  
(Battery Backup)  
tRC = 125µs,  
/CAS before /RAS  
1, 4, 5  
Notes: 1. ICC Max. is specified as ICC for output open condition.  
2. Address can be changed once or less while /RAS = VIL.  
3. Address can be changed once or less while /CAS = VIH.  
4. VCC - 0.2V VIH 6.5V, - 1.0V VIL 0.2V.  
5. L-version.  
Semiconductor  
MSC23236D/DL  
AC Characteristics (1/2)  
(VCC = 5V ± 10%, Ta = 0°C to +70°C ) Note: 1, 2, 3, 9, 10  
MSC23236D/DL MSC23236D/DL  
-60BS20/DS20  
-70BS20/DS20  
Parameter  
Symbol  
Unit  
Note  
Min.  
110  
40  
-
Max.  
Min.  
130  
45  
-
Max.  
Random Read or Write Cycle Time  
Fast Page Mode Cycle Time  
Access Time from /RAS  
tRC  
tPC  
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ms  
ms  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
-
-
tRAC  
tCAC  
tAA  
60  
70  
4, 5, 6  
Access Time from /CAS  
-
15  
-
20  
4, 5  
4, 6  
4
Access Time from Column Address  
Access Time from /CAS Precharge  
Output Low Impedance Time from /CAS  
/CAS to Data Output Buffer Turn-off Delay Time  
Transition Time  
-
30  
-
35  
tCPA  
tCLZ  
tOFF  
tT  
-
35  
-
40  
0
-
0
-
4
0
15  
0
20  
7
3
50  
3
50  
3
Refresh Period  
tREF  
tREF  
tRP  
-
16  
-
16  
Refresh Period (L-version)  
-
128  
-
128  
/RAS Precharge Time  
40  
60  
60  
15  
10  
15  
60  
5
-
50  
70  
70  
20  
10  
20  
70  
5
-
/RAS Pulse Width  
tRAS  
tRASP  
tRSH  
tCP  
10K  
10K  
/RAS Pulse Width (Fast Page Mode)  
/RAS Hold Time  
100K  
100K  
-
-
/CAS Precharge Time (Fast Page Mode)  
/CAS Pulse Width  
-
-
tCAS  
tCSH  
tCRP  
tRHCP  
tRCD  
tRAD  
tASR  
tRAH  
tASC  
tCAH  
tAR  
10K  
10K  
/CAS Hold Time  
-
-
-
-
/CAS to /RAS Precharge Time  
/RAS Hold Time from /CAS Precharge  
/RAS to /CAS Delay Time  
35  
20  
15  
0
-
40  
20  
15  
0
-
45  
30  
-
50  
35  
-
5
6
/RAS to Column Address Delay Time  
Row Address Set-up Time  
Row Address Hold Time  
10  
0
-
10  
0
-
Column Address Set-up Time  
Column Address Hold Time  
Column Address Hold Time from /RAS  
Column Address to /RAS Lead Time  
Read Command Set-up Time  
Read Command Hold Time  
Read Command Hold Time referenced to /RAS  
-
-
15  
50  
30  
0
-
15  
55  
35  
0
-
-
-
tRAL  
tRCS  
tRCH  
tRRH  
-
-
-
-
0
-
0
-
8
8
0
-
0
-
Semiconductor  
MSC23236D/DL  
AC Characteristics (2/2)  
(VCC = 5V ± 10%, Ta = 0°C to +70°C ) Note: 1, 2, 3, 9, 10  
MSC23236D/DL MSC23236D/DL  
-60BS20/DS20  
-70BS20/DS20  
Parameter  
Symbol  
Unit  
Note  
Min.  
0
Max.  
Min.  
0
Max.  
Write Command Set-up Time  
Write Command Hold Time  
tWCS  
tWCH  
tWCR  
tWP  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
10  
45  
10  
15  
15  
0
10  
50  
10  
20  
20  
0
Write Command Hold Time from /RAS  
Write Command Pulse Width  
Write Command to /RAS Lead Time  
Write Command to /CAS Lead Time  
Data-in Set-up Time  
tRWL  
tCWL  
tDS  
Data-in Hold Time  
tDH  
15  
50  
10  
15  
55  
10  
Data-in Hold Time from /RAS  
/CAS Active Delay Time from /RAS Precharge  
tDHR  
tRPC  
/RAS to /CAS Set-up Time  
(/CAS before /RAS)  
tCSR  
tCHR  
tWRP  
tWRH  
tWTS  
tWTH  
5
-
-
-
-
-
-
5
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
/RAS to /CAS Hold Time  
(/CAS before /RAS)  
10  
10  
10  
10  
10  
10  
10  
10  
10  
10  
/WE to /RAS Precharge Time  
(/CAS before /RAS)  
/WE Hold Time from /RAS  
(/CAS before /RAS)  
/RAS to /WE Set-up Time  
(Test Mode)  
/RAS to /WE Hold Time  
(Test Mode)  
Semiconductor  
MSC23236D/DL  
Notes: 1. A start-up delay of 200µs is required after power-up, followed by a minimum of eight initialization cycles  
(/RAS only refresh or /CAS before /RAS refresh) before proper device operation is achieved.  
2. The AC characteristics assumes tT = 5ns.  
3. VIH(Min.) and VIL(Max.) are reference levels for measuring input timing signals. Transition time (tT) are  
measured between VIH and VIL.  
4. This parameter is measured with a load circuit equivalent to 2TTL loads and 100pF.  
5. Operation within the tRCD(Max.) limit ensures that tRAC(Max.) can be met.  
tRCD(Max.) is specified as a reference point only. If tRCD is greater than the specified tRCD(Max.) limit, then  
the access time is controlled by tCAC  
.
6. Operation within the tRAD(Max.) limit ensures that tRAC(Max.) can be met.  
tRAD(Max.) is specified as a reference point only. If tRAD is greater than the specified tRAD(Max.) limit, then  
the access time is controlled by tAA.  
7. tOFF(Max.) define the time at which the output achieves the open circuit condition and are not referenced  
to output voltage levels.  
8. tRCH or tRRH must be satisfied for a read cycle.  
9. The test mode is initiated by performing a /WE and /CAS before /RAS refresh cycle. This mode is  
latched and remains in effect until the exit cycle is generated. The test mode specified in this data sheet  
is a 2-bit parallel test function. CA0 is not used. In a read cycle, if all internal bits are equal, the DQ pin  
will indicate a high level. If any internal bits are not equal, the DQ pin will indicate a low level.  
The test mode is cleared and the memory device returned to its normal operating state by a /RAS only  
refresh or /CAS before /RAS refresh cycle.  
10. In a test mode read cycle, the value of access time parameters is delayed for 5ns for the specified value.  
These parameters should be specified in test mode cycle by adding the above value to the specified  
value in this data sheet.  

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