XC7SH125GV,125 [NXP]
XC7SH125 - Bus buffer_line driver; 3-state TSOP 5-Pin;型号: | XC7SH125GV,125 |
厂家: | NXP |
描述: | XC7SH125 - Bus buffer_line driver; 3-state TSOP 5-Pin |
文件: | 总14页 (文件大小:76K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
XC7SH125
Bus buffer/line driver; 3-state
Rev. 01 — 4 September 2009
Product data sheet
1. General description
XC7SH125 is a high-speed Si-gate CMOS device. It provides one non-inverting buffer/line
driver with 3-state output. The 3-state output is controlled by the output enable input (OE).
A HIGH at OE causes the output to assume a high-impedance OFF-state.
2. Features
I Symmetrical output impedance
I High noise immunity
I Low power dissipation
I Balanced propagation delays
I SOT353-1, SOT753, SOT886, and SOT891 package options
I ESD protection:
N HBM JESD22-A114E: exceeds 2000 V
N MM JESD22-A115-A: exceeds 200 V
N CDM JESD22-C101C: exceeds 1000 V
I Specified from −40 °C to +125 °C
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range
−40 °C to +125 °C
Name
Description
Version
XC7SH125GW
TSSOP5
plastic thin shrink small outline package;
5 leads; body width 1.25 mm
SOT353-1
XC7SH125GV
XC7SH125GM
−40 °C to +125 °C
−40 °C to +125 °C
SC-74A
XSON6
plastic surface-mounted package; 5 leads
SOT753
plastic extremely thin small outline package; no SOT886
leads; 6 terminals; body 1 × 1.45 × 0.5 mm
XC7SH125GF
−40 °C to +125 °C
XSON6
plastic extremely thin small outline package;
SOT891
no leads; 6 terminals; body 1 × 1 × 0.5 mm
XC7SH125
NXP Semiconductors
Bus buffer/line driver; 3-state
4. Marking
Table 2.
Marking codes
Type number
XC7SH125GW
XC7SH125GV
XC7SH125GM
XC7SH125GF
Marking[1]
fM
f25
fM
fM
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
A
Y
4
2
1
Y
A
2
1
4
OE
EN
OE
mna118
mna119
mna120
Fig 1. Logic symbol
Fig 2. IEC logic symbol
Fig 3. Logic diagram
6. Pinning information
6.1 Pinning
XC7SH125
XC7SH125
OE
A
1
2
3
6
5
4
V
CC
XC7SH125
1
2
3
5
4
OE
A
V
Y
OE
A
1
2
3
6
5
4
V
CC
CC
n.c.
Y
n.c.
Y
GND
GND
GND
001aak124
001aak125
Transparent top view
Transparent top view
001aak123
Fig 4. Pin configuration
SOT353-1 and SOT753
Fig 5. Pin configuration SOT886
Fig 6. Pin configuration SOT891
XC7SH125_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 4 September 2009
2 of 14
XC7SH125
NXP Semiconductors
Bus buffer/line driver; 3-state
6.2 Pin description
Table 3.
Symbol
Pin description
Pin
Description
SOT353-1/SOT753 SOT886/SOT891
OE
A
1
2
3
4
-
1
2
3
4
5
6
output enable input
data input
GND
Y
ground (0 V)
data output
n.c.
VCC
not connected
supply voltage
5
7. Functional description
Table 4.
Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state
Inputs
Output
OE
L
A
L
Y
L
L
H
X
H
Z
H
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
VI
Parameter
Conditions
Min
−0.5
−0.5
−20
-
Max
+7.0
+7.0
-
Unit
V
supply voltage
input voltage
V
[1]
[1]
IIK
input clamping current
output clamping current
output current
VI < −0.5 V
mA
mA
mA
mA
mA
°C
IOK
VO < −0.5 V or VO > VCC + 0.5 V
−0.5 V < VO < VCC + 0.5 V
±20
±25
75
IO
-
ICC
supply current
-
IGND
Tstg
Ptot
ground current
−75
−65
-
-
storage temperature
total power dissipation
+150
250
[2]
Tamb = −40 °C to +125 °C
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP5 and SC-74A packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 packages: above 118 °C the value of Ptot derates linearly with 7.8 mW/K.
XC7SH125_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 4 September 2009
3 of 14
XC7SH125
NXP Semiconductors
Bus buffer/line driver; 3-state
9. Recommended operating conditions
Table 6.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
Min
2.0
0
Typ
Max
5.5
Unit
V
VCC
VI
supply voltage
5.0
input voltage
-
5.5
V
VO
output voltage
0
-
VCC
+125
100
20
V
Tamb
∆t/∆V
ambient temperature
input transition rise and fall rate VCC = 3.3 V ± 0.3 V
VCC = 5.0 V ± 0.5 V
−40
-
+25
°C
-
-
ns/V
ns/V
-
10. Static characteristics
Table 7.
Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 °C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ Max
Min
1.5
2.1
3.85
-
Max
-
Min
1.5
2.1
3.85
-
Max
-
VIH
HIGH-level
input voltage
VCC = 2.0 V
1.5
-
-
-
-
-
-
-
-
V
V
V
V
V
V
VCC = 3.0 V
2.1
-
-
VCC = 5.5 V
3.85
-
-
-
VIL
LOW-level
input voltage
VCC = 2.0 V
-
-
-
0.5
0.9
1.65
0.5
0.9
1.65
0.5
0.9
1.65
VCC = 3.0 V
-
-
VCC = 5.5 V
-
-
VOH
HIGH-level
VI = VIH or VIL
output voltage
IO = −50 µA; VCC = 2.0 V
IO = −50 µA; VCC = 3.0 V
IO = −50 µA; VCC = 4.5 V
IO = −4.0 mA; VCC = 3.0 V
IO = −8.0 mA; VCC = 4.5 V
VI = VIH or VIL
1.9
2.9
2.0
3.0
4.5
-
-
-
-
-
-
1.9
2.9
-
-
-
-
-
1.9
2.9
-
-
-
-
-
V
V
V
V
V
4.4
4.4
4.4
2.58
3.94
2.48
3.8
2.40
3.70
-
VOL
LOW-level
output voltage
IO = 50 µA; VCC = 2.0 V
IO = 50 µA; VCC = 3.0 V
IO = 50 µA; VCC = 4.5 V
IO = 4.0 mA; VCC = 3.0 V
IO = 8.0 mA; VCC = 4.5 V
VI = VCC or GND;
-
-
-
-
-
-
0
0
0
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
V
V
0.1
0.1
0.1
V
0.36
0.36
0.25
0.44
0.44
2.5
0.55
0.55
10
V
-
V
IOZ
II
OFF-state
-
µA
output current VCC = 5.5 V
input leakage VI = 5.5 V or GND;
-
-
-
-
-
0.1
1.0
10
-
-
-
1.0
10
10
-
-
-
2.0
40
10
µA
µA
pF
current
supply current VI = VCC or GND; IO = 0 A;
CC = 5.5 V
VCC = 0 V to 5.5 V
ICC
CI
V
input
1.5
capacitance
XC7SH125_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 4 September 2009
4 of 14
XC7SH125
NXP Semiconductors
Bus buffer/line driver; 3-state
11. Dynamic characteristics
Table 8.
Dynamic characteristics
GND = 0 V; For test circuit see Figure 9.
Symbol Parameter Conditions
25 °C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
[1]
[2]
tpd
propagation A to Y; see Figure 7
delay
VCC = 3.0 V to 3.6 V
CL = 15 pF
CL = 50 pF
-
-
4.7
8.0
1.0
1.0
9.5
1.0
1.0
11.5
14.5
ns
ns
6.6 11.5
13.0
[3]
VCC = 4.5 V to 5.5 V
CL = 15 pF
-
-
3.4
4.8
5.5
7.5
1.0
1.0
6.5
8.5
1.0
1.0
7.0
9.5
ns
ns
CL = 50 pF
[1]
[2]
ten
enable time OE to Y; see Figure 8
VCC = 3.0 V to 3.6 V
CL = 15 pF
-
-
5.0
8.0
1.0
1.0
9.5
1.0
1.0
11.5
14.5
ns
ns
CL = 50 pF
6.9 11.5
13.0
[3]
VCC = 4.5 V to 5.5 V
CL = 15 pF
-
-
3.6
4.9
5.1
7.5
1.0
1.0
6.0
8.5
1.0
1.0
6.5
9.5
ns
ns
CL = 50 pF
[1]
[2]
tdis
disable time OE to Y; see Figure 8
VCC = 3.0 V to 3.6 V
CL = 15 pF
-
-
6.0
9.7
1.0
1.0
11.5
15.0
1.0
1.0
12.5
16.5
ns
ns
CL = 50 pF
8.3 13.2
[3]
[4]
VCC = 4.5 V to 5.5 V
CL = 15 pF
-
-
-
4.1
5.7
9
6.8
8.8
-
1.0
1.0
-
8.0
10.0
-
1.0
1.0
-
8.5
11.0
-
ns
ns
pF
CL = 50 pF
CPD
power
per buffer;
dissipation
CL = 50 pF; f = 1 MHz;
capacitance VI = GND to VCC
[1] tpd is the same as tPLH and tPHL
ten is the same as tPZL and tPZH
tdis is the same as tPLZ and tPHZ
.
.
.
[2] Typical values are measured at VCC = 3.3 V.
[3] Typical values are measured at VCC = 5.0 V.
[4] CPD is used to determine the dynamic power dissipation PD (µW).
PD = CPD × VCC2 × fi + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.
XC7SH125_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 4 September 2009
5 of 14
XC7SH125
NXP Semiconductors
Bus buffer/line driver; 3-state
12. Waveforms
V
I
V
A input
M
GND
t
t
PHL
PLH
V
OH
V
Y output
M
V
mnb153
OL
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 7. Input (A) to output (Y) propagation delays
V
I
OE input
V
M
GND
t
t
PZL
PLZ
V
CC
output
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PHZ
PZH
V
OH
V
Y
output
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
outputs
enabled
outputs
enabled
outputs
disabled
mna644
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 8. Enable and disable times
Table 9.
Type
Measurement points
Input
Output
VM
VM
VX
VOL + 0.3 V
VY
OH − 0.3 V
XC7SH125
0.5VCC
0.5VCC
V
XC7SH125_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 4 September 2009
6 of 14
XC7SH125
NXP Semiconductors
Bus buffer/line driver; 3-state
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
V
CC
CC
V
V
O
I
R
L
S1
G
open
DUT
R
T
C
L
001aad983
Test data is given in Table 10.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 9. Test circuit for measuring switching times
Table 10. Test data
Type
Input
VI
Load
S1 position
tPHL, tPLH
open
tr, tf
CL
RL
tPZH, tPHZ
tPZL, tPLZ
XC7SH125
VCC
≤ 3 ns
15 pF, 50 pF
1 kΩ
GND
VCC
XC7SH125_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 4 September 2009
7 of 14
XC7SH125
NXP Semiconductors
Bus buffer/line driver; 3-state
13. Package outline
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm
SOT353-1
D
E
A
X
c
y
H
v
M
A
E
Z
5
4
A
2
A
(A )
3
A
1
θ
L
L
p
1
3
e
w M
b
p
detail X
e
1
0
1.5
3 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
A
A
A
b
c
D
E
e
e
1
H
L
L
p
UNIT
v
w
y
Z
θ
1
2
3
p
E
max.
0.1
0
1.0
0.8
0.30
0.15
0.25
0.08
2.25
1.85
1.35
1.15
2.25
2.0
0.46
0.21
0.60
0.15
7°
0°
mm
1.1
0.65
1.3
0.15
0.425
0.3
0.1
0.1
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
00-09-01
03-02-19
SOT353-1
MO-203
SC-88A
Fig 10. Package outline SOT353-1 (TSSOP5)
XC7SH125_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 4 September 2009
8 of 14
XC7SH125
NXP Semiconductors
Bus buffer/line driver; 3-state
Plastic surface-mounted package; 5 leads
SOT753
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
c
L
p
1
2
3
detail X
e
b
p
w
M B
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A
b
c
D
E
e
H
L
Q
v
w
y
p
1
p
E
0.100
0.013
0.40
0.25
1.1
0.9
0.26
0.10
3.1
2.7
1.7
1.3
3.0
2.5
0.6
0.2
0.33
0.23
mm
0.95
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
02-04-16
06-03-16
SOT753
SC-74A
Fig 11. Package outline SOT753 (SC-74A)
XC7SH125_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 4 September 2009
9 of 14
XC7SH125
NXP Semiconductors
Bus buffer/line driver; 3-state
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
SOT886
b
1
2
3
4×
(2)
L
L
1
e
6
5
4
e
1
e
1
6×
(2)
A
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
A
1
UNIT
b
D
E
e
e
L
L
1
1
max max
0.25
0.17
1.5
1.4
1.05
0.95
0.35 0.40
0.27 0.32
mm
0.5 0.04
0.6
0.5
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
REFERENCES
JEDEC JEITA
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
04-07-15
04-07-22
SOT886
MO-252
Fig 12. Package outline SOT886 (XSON6)
XC7SH125_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 4 September 2009
10 of 14
XC7SH125
NXP Semiconductors
Bus buffer/line driver; 3-state
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm
SOT891
b
1
2
3
4×
(1)
L
L
1
e
6
5
4
e
1
e
1
6×
(1)
A
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
A
1
UNIT
b
D
E
e
e
L
L
1
1
max max
0.20 1.05 1.05
0.12 0.95 0.95
0.35 0.40
0.27 0.32
mm
0.5 0.04
0.55 0.35
Note
1. Can be visible in some manufacturing processes.
REFERENCES
JEDEC JEITA
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
05-04-06
07-05-15
SOT891
Fig 13. Package outline SOT891 (XSON6)
XC7SH125_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 4 September 2009
11 of 14
XC7SH125
NXP Semiconductors
Bus buffer/line driver; 3-state
14. Abbreviations
Table 11. Abbreviations
Acronym
CMOS
CDM
DUT
Description
Complementary Metal Oxide Semiconductor
Charged Device Model
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
HBM
MM
Machine Model
TTL
Transistor-Transistor Logic
15. Revision history
Table 12. Revision history
Document ID
Release date
Data sheet status
Change
Supersedes
notice
XC7SH125_1
20090904
Product data sheet
-
-
XC7SH125_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 4 September 2009
12 of 14
XC7SH125
NXP Semiconductors
Bus buffer/line driver; 3-state
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
16.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
XC7SH125_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 4 September 2009
13 of 14
XC7SH125
NXP Semiconductors
Bus buffer/line driver; 3-state
18. Contents
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 1
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
7
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
8
9
10
11
12
13
14
15
16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
16.1
16.2
16.3
16.4
17
18
Contact information. . . . . . . . . . . . . . . . . . . . . 13
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 4 September 2009
Document identifier: XC7SH125_1
相关型号:
XC7SH125GW
High-speed Si-gate CMOS device, one non-inverting buffer/line driver with 3-state output
NXP
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