TDA8000T [NXP]
Smart card interface; 智能卡接口
| 型号： | TDA8000T |
| 厂家： | 
NXP |
| 描述： | Smart card interface |
| 文件： | 总24页 (文件大小：220K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA8000; TDA8000T
Smart card interface
1996 Dec 12
Product specification
Supersedes data of 1995 Feb 01
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
FEATURES
APPLICATIONS
• Two protected I/O lines
• Pay TV
• VCC regulation (5 V ±4%, 100 mA max. with controlled
• Telematics
rise and fall times)
• Cashless payment
• VPP generation (12.5, 15 or 21 V ±2.5%, 50 mA max.
programmable by two bits, with controlled rise and fall
times)
• Multipurpose card-readers, etc.
GENERAL DESCRIPTION
• Clock generation (up to 8 MHz)
The TDA8000 is a complete, low-cost analog interface
which can be positioned between a smart card or a
memory card (ISO 7816) and a microcontroller. It is
approved for banking, telecom and pay TV applications.
• Short-circuit, thermal and card extraction protections
• Two voltage supervisors (digital and analog supplies)
• Automatic activation and deactivation sequences via an
independent internal clock
The complete supply, protection and control functions are
realized with only a few external components, which
makes the TDA8000 very attractive for consumer
applications. Application suggestions and support is
available on request (see examples in
• Enhanced ESD protections on card connections
(4 kV min.)
• ISO 7816 approval.
Chapter “Application information”).
QUICK REFERENCE DATA
SYMBOL
VDD
PARAMETER
supply voltage
CONDITIONS
MIN.
6.7
TYP.
MAX.
18
UNIT
−
V
IDD
supply current
idle mode; VDD = 12 V
active modes; unloaded
−
25
32
−
−
mA
mA
V
−
−
Vth2
VCC
ICC
VH
threshold voltage on VSUP
card supply voltage
4.5
4.8
−
4.68
5.2
−100
30
5.0
−
V
card supply current
mA
V
high voltage supply for VPP
programming current
−
−
IPP
read mode; VPP = 5 V
write mode; VPP > 5 V
−
−
−50
−50
500
mA
mA
µs
−
−
tde, tact
Ptot
deactivation/activation cycle
duration
−
−
continuous total power
dissipation
TDA8000; Tamb = +70 °C;
see Fig.10
−
−
0
−
−
−
2
W
W
°C
TDA8000T; Tamb = +70 °C;
see Fig.11
0.92
+70
Tamb
operating ambient temperature
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
SOT117-1
SOT136-1
TDA8000
DIP28
SO28
plastic dual in-line package; 28 leads (600 mil)
TDA8000T
plastic small outline package; 28 leads; body width 7.5 mm
1996 Dec 12
2
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
BLOCK DIAGRAM
V
V
GND
12
DELAY
16
SUP
15
DD
13
17
18
ALARM
ALARM
22
VOLTAGE
SUPERVISOR
MAIN
SUPPLY
CVNC
28
27
26
3
2
4
I/O1(µC)
I/O2(µC)
RSTIN
I/O1
I/O2
RST
PROTECTIONS
AND
ENABLE
TDA8000
9
8
PRES
PRES
19
20
21
OFF
START
WRITE
LOGIC
PROTECTIONS
INTERNAL
CLOCK
14
5
V
CC
V
CC
GENERATOR
23
25
CLKDIV
CLOCK
CIRCUITRY
CLOCK
ENABLE
CLK
CLKOUT
6
7
10
V
PSEL1
PSEL2
PP
V
PP
GENERATOR
OSCILLATOR
1
24
11
MBH810
XTAL
CLKIN
V
H
Fig.1 Block diagram.
3
1996 Dec 12
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
PINNING
SYMBOL PIN
DESCRIPTION
XTAL
I/O2
1
2
3
4
5
6
7
8
9
crystal connection
data line to/from the card
I/O1
data line to/from the card
RST
card reset output
CLK
clock output to the card
PSEL1
PSEL2
PRES
PRES
VPP
programming voltage selection input (see Table 1)
programming voltage selection input (see Table 1)
card presence contact input (active LOW)
card presence contact input (active HIGH)
page
XTAL
I/O2
1
2
28 I/O1(µC)
27 I/O2(µC)
10 card programming voltage output
11 high voltage supply for VPP generation
12 ground
VH
I/O1
RSTIN
3
26
25 CLKOUT
GND
VDD
4
RST
13 positive supply voltage
5
24
23
CLK
CLKIN
VCC
14 card supply output voltage
15 voltage supervisor input
PSEL1
6
CLKDIV
VSUP
DELAY
ALARM
7
22 CVNC
PSEL2
PRES
PRES
16 external capacitor connection for delayed reset timing
TDA8000
TDA8000T
8
21
17 open-collector reset output for the microcontroller (active
HIGH)
WRITE
9
20
19
18
START
OFF
ALARM
18 open-collector reset output for the microcontroller (active
LOW)
V
10
11
PP
V
H
ALARM
OFF
19 interrupt output to the microcontroller (active LOW)
20 microcontroller input for starting session (active LOW)
GND 12
17 ALARM
16 DELAY
START
WRITE
21 control input for applying programming voltage to the card
(active LOW)
V
V
13
14
DD
CC
V
15
SUP
CVNC
22 internally generated 5 V reference, present when VDD is
on; to be decoupled externally (47 nF)
MBH809
CLKDIV
23 input for dividing/not dividing the CLKOUT frequency by
two (active LOW)
CLKIN
24 external clock signal input
CLKOUT
RSTIN
25 clock output to the microcontroller, or another TDA8000
26 card reset input from the microcontroller (active HIGH)
I/O2(µC)
27 data line to/from the microcontroller; must not be left
open-circuit, tie to CVNC if not used
I/O1(µC)
28 data line to/from the microcontroller; must not be left
open-circuit, tie to CVNC if not used
Fig.2 Pin configuration.
1996 Dec 12
4
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
In both events the signal is buffered and enabled.
FUNCTIONAL DESCRIPTION
Power supply
Pin CLKOUT may be used to clock a microcontroller.
The signal (1⁄2fxtal or fxtal if CLKDIV is HIGH) is available
when the circuit is powered up.
The circuit operates within a supply voltage range of
6.7 to 18 V. VDD and GND are the supply pins. All card
contacts remain inactive during power-up or power-down,
provided VDD does not rise or fall too fast (0.5 V/ms typ.).
State diagram
Once activated, the circuit has six possible modes of
operation:
POWER-UP
• Idle
The logic part is powered first and is in the reset condition
until VDD reaches Vth1. The sequencer is blocked until VDD
• Activation
• Read
reaches Vth4 + Vhys4
.
• Write
POWER-DOWN
• Deactivation
• Fault.
When VDD falls below Vth4, an automatic deactivation of
the contacts is performed.
Figure 5 shows how these modes are accessible.
Voltage supervisor
IDLE MODE
This block surveys the 5 V supply of the microcontroller
(VSUP) in order to deliver a defined reset pulse and to avoid
any transients on card contacts during power-up or
After reset, the circuit enters the IDLE state. A minimum
number of circuits are active while waiting for the
microcontroller to start a session:
power-down of VSUP
.
• All card contacts are inactive
The voltage supervisor remains active even if VDD is
powered-down.
• Voltage generators are stopped
• Oscillator is running, providing CLKOUT
• Voltage supervisor is active
POWER-UP
As long as VSUP is below Vth2 + Vhys2 the capacitor CDEL
connected to the pin DELAY, will be discharged. When
,
• Pins I/O1(µC) and I/O2(µC) are high impedance.
VSUP rises to the threshold level, CDEL will be recharged.
ALARM and ALARM remain active, and the sequencer is
The OFF line is HIGH if a card is present (PRES and
PRES active) and LOW if a card is not present.
blocked until the voltage on the pin DELAY reaches Vth3
.
ACTIVATION SEQUENCE
POWER-DOWN (see Fig.3)
From the IDLE mode, the circuit enters the ACTIVATION
mode when the microcontroller sets the START line
(active LOW). The I/O(µC) signals must not be LOW.
The internal circuitry is activated, the internal clock starts
and the following ISO 7816 sequence is performed:
If VSUP falls below Vth2, CDEL will be discharged, ALARM
and ALARM become active, and an automatic deactivation
of the contacts is performed.
Clock circuitry (see Fig.4)
1. VCC rises from 0 to 5 V
2. I/Os are enabled
3. VPP rises from 0 to 5 V
4. No change
The clock signal (CLK) can be applied to the card by two
different methods:
1. Generation by a crystal oscillator: the crystal
(3 to 11 MHz) is connected to pin XTAL. Its frequency
is divided by two.
5. CLK is enabled
6. RST is enabled.
2. Use of a signal frequency already present in the
system and connected to the pin CLKIN (up to 8 MHz).
Pin XTAL has to be connected to GND via a 1 kΩ
resistor. In this event, the CLKOUT signal remains
LOW.
The typical time interval between two steps is 32 µs for the
first two steps and 64 µs for the other three. Timing is
derived from the internal clock (see Fig.6).
1996 Dec 12
5
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
Between steps 3 and 5, a HIGH level on pin RSTIN allows
the CLK signal to be applied to the card. This feature
facilitates a precise count of CLK periods while waiting for
the card to respond to a reset.
DEACTIVATION SEQUENCE (see Fig.8)
When the session is completed, the microcontroller sets
the START line to its HIGH state.
The circuit then executes an automatic deactivation
sequence by counting back the sequencer:
After step 5, RSTIN has no further action on CLK.
After step 6, RST is set to the complementary value of
RSTIN.
1. Card reset (RST falls to LOW)
2. CLK is stopped
3. No change
READ MODE
4. VPP falls to 0 V
When the activation sequence is completed and, after the
card has replied to its Answer-to-Reset, theTDA8000
enters the READ mode. Data is exchanged between the
card and the microcontroller via the I/O lines.
5. I/O1(µC) and I/O2(µC) become high impedance
6. VCC falls to 0 V.
The circuit returns to the IDLE mode on the next rising
edge of the sequencer clock.
When it is required to write to the internal memory of the
card, the circuit is set to the WRITE mode by the
microcontroller.
PROTECTIONS
Cards with EPROM memory require a programming
voltage (VPP).
Main fault conditions are monitored by the circuit:
• Short-circuit on VCC
• Short-circuit on VPP
VPP GENERATION
• Over current on I/Os
The circuit supports cards with VPP of 12.5, 15 or 21 V.
The selection of P is achieved by PSEL1 and PSEL2
according to Table 1.
• Card extraction during transaction
• Overheating problem.
When one of these fault conditions is detected, the circuit
pulls the interrupt line OFF to its active LOW state and
returns to the FAULT mode.
Table 1 Card programming voltage selection
PROGRAMMING
PSEL1
PSEL2
VOLTAGE P
FAULT MODE (see Fig.9)
LOW
LOW
HIGH
HIGH
LOW
HIGH
LOW
HIGH
5
12.5
15
When a fault condition is written to the microcontroller via
the OFF line, the circuit initiates a deactivation sequence.
21
After the deactivation sequence has been completed, the
OFF line is reset to its HIGH state when the microcontroller
has reset the START line HIGH, except if the fault
condition was due to a card extraction.
In order to respect the ISO7816 slopes, the circuit
generates VPP by charging and discharging an internal
capacitor. The voltage on this capacitor is then amplified
by a power stage gain of 5, powered via an external supply
pin VH [30 V (max.)].
Note
The two other causes of emergency deactivation (Power
failure detected on VDD or VSUP) do not act upon OFF.
WRITE MODE (see Fig.7)
When the microcontroller sets the WRITE line (active
LOW), the circuit enters the WRITE mode. VPP rises from
5 V to the selected value with a typical slew rate of 1 V/µs.
When the write operation is completed, the microcontroller
returns the WRITE line to its HIGH state, and VPP falls
back to 5 V with the same slew rate.
WRITE has no action outside a session.
1996 Dec 12
6
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
V
V
+ V
hys2
th2
th2
V
SUP
V
th3
V
DELAY
t
d
ALARM
MGG818
Fig.3 ALARM and DELAY as a function of VSUP (CDEL fixes the pulse width).
ENABLE
ENCLK
CLK
CLKOUT
CLKDIV
÷ 2
OSC
INPUT
CLKIN
INPUT
MGG819
XTAL
Fig.4 Clock circuitry.
ACTIVATION
IDLE
PDOWN
FAULT
WRITE
READ
DEACTIVATION
MGG820
Fig.5 State diagram.
1996 Dec 12
7
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
PRES
OFF
t
act
START
INTERNAL CLOCK
SEQUENCER CLOCK
V
CC
I/O
V
PP
t
d(clk)
CLK
INTERNAL
ENABLE RESET
RSTIN
RST
t
3
t
RST
t
5
MGG821
1
2
3
4
5
6
Fig.6 Activation sequence.
START (LOW)
(+5 V)
V
CC
WRITE
(P)
(+5 V)
V
(0 V)
PP
CLK
RST (HIGH)
MGG822
Fig.7 Read/Write; Read mode.
8
1996 Dec 12
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
t
de
START
OFF (HIGH)
INTERNAL CLOCK
SEQUENCER CLOCK
V
CC
I/O
V
(+5 V)
PP
CLK
ENABLE RESET
RESET-IN
RST
INTERNAL
6
5
4
3
2
1
MGG823
Fig.8 Deactivation sequence after a normal session.
START
PRES
OFF
INTERNAL CLOCK
SEQUENCER CLOCK
V
CC
I/O
V
PP
CLK
ENABLE RESET
RESET-IN
INTERNAL
RST
6
5
4
3
2
1
MGG824
Fig.9 Deactivation after a card extraction during write mode.
9
1996 Dec 12
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VDD
PARAMETER
CONDITIONS
MIN.
−0.3
MAX.
+18
UNIT
supply voltage
V
Vx1
voltage on pins PSEL1, PSEL2, PRES,
PRES, WRITE, START, OFF,
ALARM and RSTIN
−0.3
VDD
V
VH
voltage on pin VH
−0.3
−0.3
−0.3
−0.3
−0.3
+30
VH
V
V
V
V
V
VPP
VSUP
Vx2
Vx3
voltage on pin VPP
voltage on pin VSUP
+12
VSUP
+6.0
voltage on pins ALARM and DELAY
voltage on pins XTAL, I/O1(µC), I/O2(µC),
CLKIN, CLKOUT, CLKDIV and CVNC
Vx4
Ptot
voltage on pins I/O1, I/O2, RST,
CLK and VCC
duration < 1 ms
−0.3
−
+7.0
2
V
continuous total power dissipation
TDA8000; Tamb = +70 °C;
note 1; see Fig.10
W
W
TDA8000T; Tamb = +70 °C;
−
0.92
note 1; see Fig.11
Tstg
Ves
storage temperature
−55
−4
+150
+4
°C
electrostatic voltage on pins I/O1, I/O2, VCC
VPP, RST and CLK
,
kV
electrostatic voltage on other pins
−2
+2
kV
Note
1. Ptot = VDD × (IDD(unloaded) + ∑Isignals) + ICC × (VDD − VCC) + max.{(VH − VPP) × IPP(read) + (VH − VPP) × IPP(write)
}
+ VH × IH(unloaded) + VSUP × ISUP + (VDD − CVNC) × ICVNC.
Where ‘signals’ means all signal pins used, excluding the supply pins.
1996 Dec 12
10
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
MBE256
MBE255
4
3
handbook, halfpage
handbook, halfpage
P
tot
P
tot
(W)
(W)
3
2
2
1
0
1
0
50
0
50
100
150
( C)
50
0
50
100
150
( C)
o
o
T
T
amb
amb
Fig.10 Power derating curve (DIP28).
Fig.11 Power derating curve (SO28).
HANDLING
Each pin withstands the ESD test according to MIL-STD-883C class 3 for card contacts, class 2 for the remaining.
Method 3015 (HBM 1500 Ω, 100 pF) 3 pulses positive and 3 pulses negative; on each pin referenced to ground.
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
VALUE
UNIT
thermal resistance from junction to ambient in free air
SOT117-1
SOT136-1
30
70
K/W
K/W
1996 Dec 12
11
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
CHARACTERISTICS
VDD = 12 V; VH = 25 V; VSUP = 5 V; fxtal = 7.16 MHz or fCLKIN = 3.58 MHz; Tamb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
VDD
supply voltage
6.7
16
−
18
30
36
38
V
IDD
supply current
idle mode; VDD = 8 V
idle mode; VDD = 18 V
active mode; unloaded
22
28
32
3.0
mA
mA
mA
V
20
26
Vth1
threshold voltage for power-on
reset
1.5
4.0
Vth4
threshold voltage on VDD (falling)
hysteresis on Vth4
6.0
50
−
−
6.5
V
Vhys4
200
mV
Voltage supervisor
VSUP
ISUP
Vth2
supply voltage for the supervisor
−
5
−
V
input current on VSUP
−
1.6
−
2
mA
V
threshold voltage on VSUP (falling)
hysteresis on Vth2
4.5
10
4.68
80
Vhys2
Vth3
−
mV
V
threshold voltage on DELAY
output current on DELAY
2.35
−4
6
−
2.65
−2.5
−
IDEL
pin grounded (charge)
VDEL = 4 V (discharge)
−
µA
mA
V
−
VDEL
voltage on pin DELAY
−
−
3.5
ALARM, ALARM (open-collector outputs)
IOH
VOL
IOL
HIGH level output current on pin
ALARM
VOH = 5 V
IOL = 2 mA
VOL = 0 V
IOH = −2 mA
−
−
−
−
−
−
−
25
0.4
−25
−
µA
V
LOW level output voltage on pin
ALARM
LOW level output current on pin
ALARM
µA
V
VOH
HIGH level output voltage on pin
ALARM
V
SUP − 1
td
delay between VSUP and ALARM
ALARM pulse width
CDEL = 47 nF; see Fig.3
CDEL = 47 nF
−
−
−
10
65
µs
tpulse
30
ms
Interrupt line OFF (open-collector)
IOH
HIGH level output current
LOW level output voltage
VOH = 5 V
IOL = 1 mA
−
−
−
−
25
µA
VOL
0.4
V
Logic inputs (RSTIN, START, WRITE, CLKDIV, PSEL1, PSEL2, PRES, PRES); note 1
VIL
VIH
IIL
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
−
−
−
−
−
0.8
−
V
1.5
−
V
VIL = 0 V
VIH = 5 V
−20
20
µA
µA
IIH
−
1996 Dec 12
12
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Reset output to the card (RST)
VIDLE
VOL
output voltage in IDLE mode
−
−
−
−
−
−
−
−
0.4
V
LOW level output voltage
HIGH level output voltage
IOL = 200 µA
−
0.45
VCC
VCC
2
V
VOH
IOH = −200 µA
IOH = −10 µA
4.0
V
V
−
−
−
CC − 0.7
V
tRST
tr
delay between RSTIN and RST
RST enabled; see Fig.6
CL = 330 pF
µs
µs
µs
rise time
fall time
1
tf
CL = 330 pF
1
Clock output to card (CLK)
VIDLE
VOL
output voltage in IDLE mode
−
−
−
−
−
−
−
−
−
−
0.4
V
LOW level output voltage
HIGH level output voltage
IOL = 200 µA
0.4
V
VOH
IOH = −200 µA
IOH = −20 µA
2.4
VCC + 0.3
VCC + 0.3
VCC + 0.3
18
V
0.7VCC
V
IOH = −10 µA
V
−
−
CC − 0.7
V
tr
tf
δ
rise time
fall time
CL = 30 pF; note 2
CL = 30 pF; note 2
ns
ns
%
18
duty factor
CL = 30 pF; (XTAL or
CLKIN used); note 2
45
55
∆δ/∆θ
thermal drift on duty factor
DIP and SO packages
−
−0.07
−
%/K
Card programming voltage (VPP
)
P
selected voltage
output voltage
see Table 1
idle mode
read mode
VPP
−
−
−
−
−
−
−
0.4
V
V
CC − 4%
VCC + 4%
P + 2.5%(3)
−50
V
write mode; IPP < 50 mA P − 2.5%(3)
V
IPP
output current
slew rate
read mode
write mode
−
−
−
mA
mA
mA
−50
write mode; VPP
−400
short-circuited to GND
SR
up or down
0.80
1.0
1.20
V/µs
High-voltage input (VH)
VH
IH
input voltage
−
−
−
30
3
V
input current at VH
idle mode
2
mA
active mode; unloaded;
WRITE = 0
P = 5 V
3
5
6
8
−
−
−
−
−
−
7
mA
mA
mA
mA
V
P = 12.5 V
P = 15 V
P = 21 V
10
11
13
2.2
VH − VPP voltage drop
1996 Dec 12
13
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Card supply voltage (VCC
)
VCC
output voltage
idle mode
−
−
−
0.4
V
V
active mode;
ICC < 100 mA
4.80
5.20
ICC
SR
output current
slew rate
−
−
−
−100
−400
1.20
mA
V
CC connected to GND
−
mA
up or down
0.80
1.0
5.0
−
V/µs
5 V reference output (CVNC)
VCVNC output voltage at CVNC
Crystal connection (XTAL)
ICVNC < −15 mA
4.5
5.5
V
Rxtal(neg)
negative resistance at crystal
3 MHz < fi < 11 MHz;
note 4
−
−300
Ω
Vxtal
fxtal
DC voltage at crystal
3
3
−
−
4
V
crystal resonant frequency
11
MHz
External clock input (CLKIN)
fext
VIL
VIH
IIL
frequency at CLKIN
note 2
0
−
−
−
−
−
−
8
MHz
V
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
input capacitance
0
0.8
5
1.5
−
V
VIL = 0 V
VIH = 2 V
−20
20
5
µA
µA
pF
IIH
−
CI
−
Clock output (CLKOUT)
fCLKOUT frequency on CLKOUT
VOL
1
−
−
−
−
−
−
8
MHz
V
LOW level output voltage
HIGH level output voltage
IOL = 1 mA
−
0.4
−
VOH
VOH = −200 µA
VOH = −10 µA
CL = 30 pF; note 2
3
V
4
−
V
tr, tf
rise and fall times
duty factor
−
25
55
ns
%
δ
CLKDIV = 0;
45
CL = 30 pF; note 2
CLKDIV = 1;
40
−
60
%
CL = 30 pF; note 2
∆δ/∆θ
thermal drift on duty factor
DIP and SO packages
−
−0.1
−
%/C
1996 Dec 12
14
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Data lines [I/O1, I/O2, I/O1(µC), I/O2(µC)]; note 5
VOH
HIGH level output voltage on I/O
4.5 < VSUP < 5.5;
4.5 < VI/O(µC) < 5.5;
4
−
−
VCC + 0.2
V
I
OH = −20 µA
4.5 < VSUP < 5.5;
4.5 < VI/O(µC) < 5.5;
IOH = −200 µA
2.4
−
V
VOL
IIL
LOW level output voltage on I/O
II/O = 1 mA;
I/O(µC) grounded
−
−
−
4
−
−
−
−
−
−
65
mV
µA
mA
V
LOW level input current on I/O(µC) I/O(µC) grounded;
−500
−5
II/O = 0
I/O(µC) grounded;
I/O connected to VCC
VOH
VOL
IIL
HIGH level output voltage on
I/O(µC)
4.5 < VI/O < 5.5
VSUP + 0.2
70
LOW level output voltage on
I/O(µC)
II/O(µC) = 1 mA;
I/O grounded
mV
LOW level input current on I/O
I/O grounded; II/O(µC) = 0
−
−
−
−
−500
−5
µA
I/O grounded; I/O(µC)
mA
connected to VSUP
VIDLE
ZIDLE
voltage on I/O outside a session
−
−
−
0.4
V
impedance on I/O(µC) outside a
10
−
MΩ
session
Rpu
internal pull-up resistance between
I/O and VCC
17
20
23
1
kΩ
µs
tr, tf
rise and fall times
Ci = Co = 30 pF
−
−
Protections
Tsd
shut-down local temperature
shut-down current at VCC
shut-down current at VPP
shut-down current at I/O
−
135
−
−
°C
ICC(sd)
IPP(sd)
II/O(sd)
−175
−90
3
−230
−140
5
mA
mA
mA
−
from I/O to I/O(µC)
−
Timing
tact
activation sequence duration
deactivation sequence duration
see Fig.6
see Fig.8
see Fig.6
250
250
−
−
−
−
500
500
140
µs
µs
µs
tde
t3
start of the window for sending
CLK to the card
1996 Dec 12
15
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
SYMBOL
PARAMETER
CONDITIONS
MIN.
160
TYP.
MAX.
UNIT
t5
end of the window for sending CLK see Fig.6
to the card
−
−
−
−
µs
tst
maximum pulse width on START
before VCC starts rising
−
−
30
2
µs
µs
td(clk)
delay between RSTIN and CLK
see Fig.6
Notes
1. START, WRITE, CLKDIV and PRES are active LOW; RSTIN and PRES are active HIGH.
t1
2. The transition time and duty factor definitions are shown in Fig.12; δ =
.
--------------
t1 + t2
3. P is the card programming voltage set by pins PSEL1 and PSEL2.
4. This condition ensures correct start-up of the oscillator with crystals having series resistance up to 100 Ω.
5. The path between I/O and I/O(µC) is as follows (see Fig.13):
a) Clamp to VCC
.
b) 20 kΩ pull-up resistor to VCC; thus VOH on I/O.
c) Two opposite npn transistors with sensing pnp transistor.
d) Clamp to VSUP; thus VOH on I/O(µC).
e) The base current of the npn transistor is decreasing when their collector current increases. This means the
voltage drop is very low for small currents and becomes maximum for some mA. Thus VOL on I/O and I/O(µC),
current limits, and high impedance feature. The output current from I/O and I/O(µC) when the line is open-circuit
is the sum of the pull-up current and the base currents.
t
t
f
r
V
OH
90%
90%
1.5 V
10%
10%
V
OL
MBH856
t
t
2
1
Fig.12 Definition of transition times.
1996 Dec 12
16
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
INTERNAL PIN CONFIGURATION
V
SUP
100
µA
XTAL
100
µA
V
CC
100
I/O1(µC)
µA
V
CC
100
µA
100
µA
I/O2(µC)
20 kΩ
5 V
I/O2
I/O1
as PSEL1
RSTIN
V
CLKOUT
V
CC
CC
5 kΩ
100 Ω
5 V
20 kΩ
7 kΩ
RST
1.5 V
V
CLKIN
TDA8000
DD
V
CC
VCC
µA
400
10 kΩ
CLKDIV
CVNC
as PSEL1
50 Ω
CLK
1350
Ω
WRITE
START
OFF
as PSEL1
as PSEL1
650
Ω
20
µA
1.25 V
PSEL1
ALARM
V
SUP
V
H
210
Ω
V
SUP
PSEL2
PRES
PRES
ALARM
DELAY
as PSEL1
as PSEL1
as PSEL1
100
µA
2.5 V
2.5
µA
10 kΩ
10 kΩ
2.5 V
V
PP
2.5
kΩ
V
H
V
DD
GND
625
Ω
250
Ω
V
DD
20
µA
100
µA
20
µA
V
V
SUP
CC
1.25
kΩ
4690
Ω
1.25 V
1.25
kΩ
5310
Ω
MBE254
Fig.13 Internal pin configuration.
17
1996 Dec 12
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
APPLICATION INFORMATION
5 V
12 V
47 nF
V
22 µF
CC
10 µF
V
V
DELAY
GND
SUP
DD
ALARM
RST
CVNC
VOLTAGE
SUPERVISOR
MAIN
SUPPLY
ALARM
100 nF
I/O1(µC)
I/O2(µC)
RSTIN
I/O1
I/O2
RST
PROTECTIONS
ENABLE
CVNG
PORT 1
PRES
PRES
TDA8000
LOGIC
OFF
START
WRITE
PROTECTIONS
V
INT 1
CC
V
CC
C1
C2
C5
C6
GENERATOR
INTERNAL
CLOCK
5.6 V
CLKDIV
CLK
CLOCK
CIRCUITRY
CLOCK
ENABLE
CLKOUT
C7
C8
C3
C4
80C51
MICRO-
CONTROLLER
P
V
V
SEL1
PP
CARD SOCKET
PP
GENERATOR
P
SEL2
OSC
MGG825
V
H
XTAL
1 kΩ
CLKIN
3.58 MHz
25 V
Fig.14 Typical application within a consumer product.
18
1996 Dec 12
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
(1)
12 V 25 V
100 nF
V
RST
INT1
V
CVNC
V
V
H
DD
ALARM ALARM
OFF
SUP
DD
PRES
PRES
START
V
C1
WRITE
RSTIN
CC
SDA
SCL
PORT
1
2
I C
C2
C3
C4
C5
RST
CLK
I/O1(µC)
I/O2(µC)
PORT
COM
12 V
TDA8000
P
SEL1
P
10
µF
SEL2
80C51
MICRO-
CLKDIV
CVNC
CONTROLLER
25 V
GND
V
C6
C7
10
µF
PP
XTAL1
XTAL2
CLKOUT
I/O1
I/O2
C8
CARD
SOCKET
GND
DELAY
47 nF
GND
CLKIN
XTAL
MGG826
7.16 MHz
(1) If pin VH is not connected to 25 V, it should be connected to VDD
.
Fig.15 Application in a remote card reader; the microcontroller is clocked and powered by the TDA8000 interface
is achieved via the I2C-bus.
1996 Dec 12
19
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
PACKAGE OUTLINES
handbook, full pagewidth
DIP28: plastic dual in-line package; 28 leads (600 mil)
SOT117-1
D
M
E
A
2
A
L
A
1
c
e
w M
Z
b
1
(e )
1
b
M
H
28
15
pin 1 index
E
1
14
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
max.
A
A
Z
(1)
(1)
1
2
UNIT
mm
b
b
c
D
E
e
e
L
M
M
w
1
1
E
H
min.
max.
max.
1.7
1.3
0.53
0.38
0.32
0.23
36.0
35.0
14.1
13.7
3.9
3.4
15.80
15.24
17.15
15.90
5.1
0.51
4.0
2.54
0.10
15.24
0.60
0.25
0.01
1.7
0.013
0.009
0.066
0.051
0.020
0.014
1.41
1.34
0.56
0.54
0.15
0.13
0.62
0.60
0.68
0.63
inches
0.20
0.020
0.16
0.067
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-01-14
SOT117-1
051G05
MO-015AH
1996 Dec 12
20
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
SO28: plastic small outline package; 28 leads; body width 7.5 mm
SOT136-1
D
E
A
X
c
y
H
v
M
A
E
Z
28
15
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
14
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
18.1
17.7
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
mm
2.65
1.27
0.050
1.4
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.71
0.014 0.009 0.69
0.30
0.29
0.42
0.39
0.043 0.043
0.016 0.039
0.035
0.016
inches 0.10
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
91-08-13
95-01-24
SOT136-1
075E06
MS-013AE
1996 Dec 12
21
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
A modified wave soldering technique is recommended
using two solder waves (dual-wave), in which a turbulent
wave with high upward pressure is followed by a smooth
laminar wave. Using a mildly-activated flux eliminates the
need for removal of corrosive residues in most
applications.
SOLDERING
Plastic dual in-line packages
BY DIP OR WAVE
The maximum permissible temperature of the solder is
260 °C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.
BY SOLDER PASTE REFLOW
Reflow soldering requires the solder paste (a suspension
of fine solder particles, flux and binding agent) to be
applied to the substrate by screen printing, stencilling or
pressure-syringe dispensing before device placement.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt, infrared, and
vapour-phase reflow. Dwell times vary between 50 and
300 s according to method. Typical reflow temperatures
range from 215 to 250 °C.
REPAIRING SOLDERED JOINTS
Apply a low voltage soldering iron below the seating plane
(or not more than 2 mm above it). If its temperature is
below 300 °C, it must not be in contact for more than 10 s;
if between 300 and 400 °C, for not more than 5 s.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 min at 45 °C.
REPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING
IRON OR PULSE-HEATED SOLDER TOOL)
Plastic small outline packages
Fix the component by first soldering two, diagonally
opposite, end pins. Apply the heating tool to the flat part of
the pin only. Contact time must be limited to 10 s at up to
300 °C. When using proper tools, all other pins can be
soldered in one operation within 2 to 5 s at between 270
and 320 °C. (Pulse-heated soldering is not recommended
for SO packages.)
BY WAVE
During placement and before soldering, the component
must be fixed with a droplet of adhesive. After curing the
adhesive, the component can be soldered. The adhesive
can be applied by screen printing, pin transfer or syringe
dispensing.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder bath is
10 s, if allowed to cool to less than 150 °C within 6 s.
Typical dwell time is 4 s at 250 °C.
For pulse-heated solder tool (resistance) soldering of VSO
packages, solder is applied to the substrate by dipping or
by an extra thick tin/lead plating before package
placement.
1996 Dec 12
22
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1996 Dec 12
23
Philips Semiconductors – a worldwide company
Argentina: see South America
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,
Tel. +31 40 27 82785, Fax. +31 40 27 88399
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Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,
220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773
Philippines: Philips Semiconductors Philippines Inc.,
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Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
Belgium: see The Netherlands
Brazil: see South America
Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
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Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,
51 James Bourchier Blvd., 1407 SOFIA,
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Portugal: see Spain
Romania: see Italy
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. +1 800 234 7381
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 247 9145, Fax. +7 095 247 9144
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Slovakia: see Austria
Slovenia: see Italy
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,
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Hungary: see Austria
India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd.
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Ireland: Newstead, Clonskeagh, DUBLIN 14,
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Tel. +90 212 279 2770, Fax. +90 212 282 6707
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,
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Tel. +81 3 3740 5130, Fax. +81 3 3740 5077
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. +82 2 709 1412, Fax. +82 2 709 1415
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. +60 3 750 5214, Fax. +60 3 757 4880
Uruguay: see South America
Vietnam: see Singapore
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. +9-5 800 234 7381
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
Middle East: see Italy
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Internet: http://www.semiconductors.philips.com
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1996
SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
537021/1200/04/pp24
Date of release: 1996 Dec 12
Document order number: 9397 750 01383
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