SAA5244 [NXP]
Integrated VIP and teletext decoder IVT1.1; 集成贵宾和图文电视解码器IVT1.1
| 型号： | SAA5244 |
| 厂家： | 
NXP |
| 描述： | Integrated VIP and teletext decoder IVT1.1 |
| 文件： | 总32页 (文件大小：197K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
SAA5244A
Integrated VIP and teletext decoder
(IVT1.1)
March 1992
Product specification
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
FEATURES
• Complete teletext decoder including page memory in a
single 40-pin DIL package
• Single +5 V power supply
• Digital data slicer and display clock phase-locked loop
reduces peripheral components to a minimum
• Both video and scan related synchronization modes are
supported
DESCRIPTION
The Integrated VIP and Teletext (IVT1.1) is a teletext
decoder (contained within a single-chip package) for
decoding 625-line based World System Teletext
transmissions. The teletext decoder hardware is based on
a reduced function version of the device SAA5246
(IVT1.0).
• On board single page memory including extension
packets for FASTEXT
• Single page acquisition system
• RGB interface to standard colour decoder ICs, push-pull
output drive
The Video Input Processor (VIP) section of the device
uses mixed analog and digital designs for the data slicer
and the display clock phase-locked loop functions. As a
result the number of external components is greatly
reduced and no critical or adjustable components are
required. A single page static RAM is incorporated in the
device thereby giving a genuine single-chip teletext
decoder device.
• Data capture performance similar to SAA5231 (VIP2)
• Simple software control via I2C-bus
• Option for five national languages
• 32 supplementary characters for on-screen displays
• Optional storage of packet 24 in the display memory
• Page links in packets 27 and 8/30 are Hamming
decoded
• Separate text and video signal quality detectors,
625/525 video status and language version all readable
via I2C-bus
• Automatic ODD/EVEN output control with manual
override
• Control of display PLL free-run and rolling header via
I2C-bus
• VCS to SCS mode for stable 525 line status display
ORDERING INFORMATION
PACKAGE
EXTENDED TYPE
NUMBER
PINS
40
PIN POSITION
MATERIAL
plastic
CODE
SAA5244AP
DIL
SOT129(1)
SOT205A(2)
SAA5244AGP
44
QFP
plastic
Notes
1. SOT129-1; 1996 December 16.
2. SOT205-1; 1996 December 16.
March 1992
2
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
QUICK REFERENCE DATA
SYMBOL
PARAMETER
positive supply voltage
MIN.
TYP.
MAX.
UNIT
VDD
IDD
4.5
−
5
5.5
148
0.6
1.4
−
V
supply current
74
mA
V
Vsyn
Vvid
sync amplitude
0.1
0.7
−
0.3
1
video amplitude
V
fXTAL
Tamb
crystal frequency
27
−
MHz
operating ambient temperature range
−20
70
°C
March 1992
3
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
Y
COR RGBREF RGB ODD / EVEN
BLAN
19
23
21
18
15-17 22
DISPLAY
PAGE
MEMORY
DATA
SLICER
AND
TELETEXT
ACQUISITION
AND
CLOCK
DECODING
REGENERATOR
25
24
SDA
SCL
2
I C-BUS
INTERFACE
DCVBS
1
V
DD
5
6
10
V
V
SS
DD
SAA5244A
14
20
ANALOG
TO
DIGITAL
CONVERTER
V
SS
TIMING
CHAIN
REF
DISPLAY
CLOCK
PHASE
LOCKED
LOOP
2
3
INPUT
CLAMP
AND SYNC
SEPARATOR
OSCOUT
OSCIN
CRYSTAL
OSCILLATOR
4
7
9
8
11
13
12
MLA228 - 1
OSCGND
BLACK IREF CVBS POL VCR / FFB STTV / LFB
Fig.1 Block diagram for SOT129 (DIL40) package.
4
March 1992
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
PINNING
SYMBOL
VDD
SOT129 SOT205A
DESCRIPTION
1
2
3
4
5
−
6
7
8
18
19
20
21
22
−
+5 V supply
OSCOUT
OSCIN
OSCGND
VSS
27 MHz crystal oscillator output
27 MHz crystal oscillator input
0 V crystal oscillator ground
0 V ground
REF−
negative reference voltage for the ADC. The pin should be connected to 0 V
positive reference voltage for the ADC. The pin should be connected to +5 V
video black level storage pin, connected to ground via a 100 nF capacitor
REF+
23
24
25
BLACK
CVBS
composite video input pin. A positive-going 1 V (peak-to-peak) input is required,
connected via a 100 nF capacitor
IREF
9
26
27
28
29
reference current input pin, connected to ground via a 27 kΩ resistor
+5 V supply
VDD
10
11
12
POL
STTV/LFB/FFB polarity selection pin
STTV/LFB
sync to TV output pin/line flyback input pin. Function controlled by an internal
register bit (scan sync mode)
VCR/FFB
13
32
PLL time constant switch/field flyback input pin. Function controlled by an
internal register bit (scan sync mode)
VSS
R
14
15
16
17
18
19
20
21
33
34
35
36
37
38
39
40
0 V ground
dot rate character output of the RED colour information
dot rate character output of the GREEN colour information
dot rate character output of the BLUE colour information
input DC voltage to define the output high level on the RGB pins
dot rate fast blanking output
G
B
RGBREF
BLAN
VSS
COR
0 V ground
programmable output to provide contrast reduction of the TV picture for mixed
text and picture displays or when viewing newsflash/subtitle pages; open drain
output
ODD/EVEN
22
23
24
25
−
41
42
43
44
25 Hz output synchronized with the CVBS input’s field sync pulses to produce a
non-interlaced display by adjustment of the vertical deflection currents
Y
dot rate character output of teletext foreground colour information open drain
output
serial clock input for the I2C-bus. It can still be driven during power-down of the
device
serial data port for the I2C-bus; open drain output. It can still be driven during
power-down of the device
SCL
SDA
n.c.
i.c.
4 to 7
30, 31
not connected
26 to 40 1 to 3
8 to 17
internally connected. Must be left open-circuit in application
March 1992
5
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
handbook, halfpage
V
1
2
40
39
38
37
36
35
DD
OSCOUT
OSCIN
3
4
OSCGND
V
5
SS
REF
BLACK
CVBS
IREF
6
7
34
33
32
31
30
29
28
27
26
i.c.
8
9
V
10
DD
SAA5244A
POL 11
STTV / LFB 12
13
14
15
16
17
VCR / FFB
V
SS
R
G
B
25 SDA
24 SCL
RGBREF 18
BLAN 19
23 Y
22 ODD / EVEN
21 COR
V
20
SS
MLA035 - 3
Fig.2 Pin configuration; SOT129 (DIL40).
March 1992
6
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
index
corner
1
33
32
31
30
29
28
27
26
25
24
23
V
SS
2
VCR / FFB
n.c.
i.c.
3
4
5
n.c.
STTV / LFB
POL
n.c.
6
SAA5244A
7
8
V
DD
IREF
9
CVBS
BLACK
REF
i.c.
10
11
MLA227 - 2
Fig.3 Pin configuration; SOT205A (QFPL44).
March 1992
7
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134)
SYMBOL
VDD
PARAMETER
MIN.
MAX.
UNIT
supply voltage (all supplies)
input voltage (any input)
−0.3
−0.3
−0.3
−
6.5
V
VI
VDD+0.5
VDD+0.5
±10
V
VO
output voltage (any output)
output current (each output)
DC input or output diode current
operating ambient temperature range
storage temperature range
V
IO
mA
mA
°C
°C
IIOK
Tamb
Tstg
Vstat
−
±20
−20
−55
70
125
electrostatic handling
human body model (note 1)
−2000
2000
V
Note
1. The human body model ESD simulation is equivalent to discharging a 100 pF capacitor through a 1.5 kΩ resistor;
this produces a single discharge transient. Reference Philips Semiconductors test method UZW-B0/FQ-A302
(compatible with MIL-STD method 3015.7).
Failure Rate
The failure rate at Tamb = 55 °C will be a maximum of 1000 FITS (1 FIT = 1 x 10−9 failures per hour).
March 1992
8
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
CHARACTERISTICS
VDD = 5 V ± 10%; Tamb = −20 to +70 °C, unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
VDD
IDD
supply voltage range (VDD−VSS
)
4.5
5
5.5
V
total supply current
−
74
148
mA
Inputs
CVBS
Vsyn
tsyn
sync amplitude
0.1
0.3
0
0.6
V
delay from CVBS to TCS
output from STTV buffer
(nominal video, average of
leading/trailing edge)
−150
150
ns
tsyd
change in sync delay between
all black and all white video
input at nominal levels
0
−
25
ns
V
Vvid(p-p)
video input amplitude
(peak-to-peak)
0.7
1
1.4
display PLL catching range
source impedance
±7
−
−
−
−
−
%
Ω
Zsrc
CI
250
10
input capacitance
−
pF
IREF
Rg
resistor to ground
−
27
−
kΩ
POL
VIL
VIH
ILI
input voltage LOW
input voltage HIGH
input leakage current
input capacitance
−0.3
2.0
−10
−
−
−
−
−
0.8
V
VDD+0.5
10
V
VI = 0 to VDD
µA
pF
CI
10
LFB
VIL
VIH
ILI
input voltage LOW
input voltage HIGH
input leakage current
input current
−0.3
2.0
−10
−1
−
0.8
V
−
VDD+0.5
V
VI = 0 to VDD
note 1
−
10
1
µA
mA
ns
II
−
tLFB
delay between LFB front edge
and input video line sync
−
250
−
VCR/FFB
VIL
VIH
ILI
input voltage LOW
input voltage HIGH
input leakage current
input current
−0.3
2.0
−10
−1
−
−
−
−
0.8
V
VDD+.5
10
V
VI = 0 to VDD
note 1
µA
mA
II
1
March 1992
9
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Inputs
RGBREF (NOTE 2)
VI
input voltage
−0.3
−
−
−
VDD+0.5
10
V
ILI
input leakage current
DC current
VI = 0 to VDD
−10
µA
mA
IDC
−
10
SCL
VIL
VIH
ILI
input voltage LOW
input voltage HIGH
input leakage current
clock frequency
input rise time
−0.3
3.0
−10
0
−
−
−
−
−
−
−
1.5
V
VDD+0.5
V
VI = 0 to VDD
10
100
2
µA
kHz
µs
µs
pF
fSCL
tr
10% to 90%
90% to 10%
−
tf
input fall time
−
2
CI
input capacitance
−
10
Inputs/outputs
CRYSTAL OSCILLATOR (OSCIN; OSCOUT)
fXTAL
Gv
crystal frequency
−
27
−
−
MHz
−
small signal voltage gain
mutual conductance
input capacitance
3.5
1.5
−
−
Gm
Cl
f = 100 kHz
−
−
mA/V
pF
−
10
5
CFB
feedback capacitance
−
−
pF
BLACK
Cblk
ILI
storage capacitor to ground
input leakage current
−
100
−
nF
VI = 0 to VDD
−10
−
10
µA
SDA
VIL
VIH
ILI
Cl
input voltage LOW
input voltage HIGH
input leakage current
input capacitance
input rise time
−0.3
3.0
−10
−
−
−
−
−
−
−
−
−
−
1.5
VDD+0.5
10
V
V
VI = 0 to VDD
µA
pF
µs
µs
V
10
tr
10% to 90%
90% to 10%
IOL = 3 mA
3 to 1 V
−
2
tf
input fall time
−
2
VOL
tf
output voltage LOW
output fall time
0
0.5
200
400
−
ns
pF
CL
load capacitance
−
March 1992
10
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
SYMBOL
Outputs
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
STTV
Gstt
gain of STTV relative to video
input
0.9
1.0
1.1
Vtcs
TCS amplitude
0.2
0.3
0.45
0.15
V
V
VDCs
DC shift between TCS output
and nominal video output
−
−
IO
output drive current
load capacitance
−
−
−
−
3.0
mA
pF
CL
100
R, G AND B
VOL
VOH
output voltage LOW
output voltage HIGH
IOL = 2 mA
0
−
0.2
V
V
IOH = −1.6 mA;
RGBREF ≤
RGBREF
−0.25 V
RGBREF RGBREF
+0.25 V
VDD−2 V
Zo
CL
IDC
tr
output impedance
load capacitance
DC current
−
−
−
−
−
−
−
−
−
−
200
50
Ω
pF
mA
ns
ns
−3.3
20
output rise time
output fall time
10% to 90%
90% to 10%
tf
20
BLAN
VOL
output voltage LOW
output voltage HIGH
IOL = 1.6 mA
0
−
−
0.4
V
V
VOH
IOH = −0.2 mA;
1.1
−
VDD = 4.5 V
VOH
output voltage HIGH
IOH = 0 mA;
VDD = 5.5 V
−
−
2.8
V
VOH
CL
tr
allowed voltage at pin
load capacitance
output rise time
with external pull-up
−
−
−
−
−
−
−
−
VDD
50
V
pF
ns
ns
10% to 90%
90% to 10%
20
tf
output fall time
20
ODD/EVEN
VOL
VOH
CL
tr
output voltage LOW
output voltage HIGH
load capacitance
output rise time
IOL = 1.6 mA
0
−
−
−
−
−
0.4
VDD
120
50
V
IOH = −1.6 mA
V
−
−
−
DD−0.4
V
pF
ns
ns
0.6 to 2.2 V
2.2 to 0.6 V
tf
output fall time
50
March 1992
11
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
SYMBOL
Outputs
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
COR AND Y (OPEN DRAIN)
VOH
VOL
CL
pull-up voltage at pin
−
0
−
−
−
−
−
−
VDD
V
output voltage LOW
load capacitance
output fall time
IOL = 5 mA
1.0
25
50
V
pF
ns
tf
load resistor of
1.2 kΩ to VDD
measured between
DD −0.5 and 1.5 V
VI = 0 to VDD
;
V
ILO
output leakage current
−10
−
−
10
20
µA
TSK
skew delay between display
outputs R, G, B, COR, Y and
BLAN
−
ns
Timing
I2C-BUS
tLOW
clock LOW period
clock HIGH period
data set-up time
data hold time
4
−
−
−
−
−
−
−
−
−
−
µs
µs
ns
ns
µs
tHIGH
4
tSU;DAT
tHD;DAT
tSU;STO
250
170
4
set-up time from clock HIGH
to STOP
tBUF
START set-up time following a
STOP
4
−
−
µs
tHD;STA
tSU;STA
START hold time
4
4
−
−
−
−
µs
µs
START set-up time following
clock LOW-to-HIGH transition
Notes to the characteristics
1. This current is the maximum allowed into the inputs when line and field flyback signals are connected to these inputs.
Series current limiting resistors must be used to limit the input currents to ± 1 mA.
2. RGBREF is the positive supply for the RGB output pins and it must be able to source the IOH current from the R, G
and B pins. The leakage specification on RGBREF only applies when there is no current load on the RGB pins.
March 1992
12
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in
_white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
0
0
0
4.66
64 µs
64 µs
LSP
(Line Sync Pulse)
2.33
32 34.33
EP
(Equalizing Pulse)
64 µs
27.33
32
59.33
BP
(Broad Pulse)
[1]
621
(308)
623
(310)
624
(311)
625
(312)
622
(309)
1
314 (1)
1
2
315 (2)
2
3
316 (3)
3
4
5
6
7
TCS interlaced
309
310
309
311
310
312
311
313
312
317 (4)
318 (5)
319 (6)
320 (7)
TCS interlaced
308
4
5
6
7
TCS non-interlaced
MLA037 - 2
[2]
[1] LSP, EP and BP are combined to give TCS as shown below. All timings measured from falling edge of LSP.
[2] Line numbers placed in the middle of the line. Equivalent count numbers in brackets.
ahdnbok,uflapegwidt
Fig.4 Composite sync waveforms.
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
LSP
(TCS)
0
0
4.66
64 µs
40 µs
R, G, B, Y
(1)
display period
(a) LINE RATE
16.67
56.67 µs
lines 42 to 291 inclusive (and 355 to 604 inclusive interlaced)
R, G, B, Y
(1)
display period
(b) FIELD RATE
312
0
41
291
line numbers
MLA662 - 1
(1) also BLAN in character and box blanking
Fig.5 Display output timing (a) line rate (b) field rate.
SDA
t
t
f
t
BUF
LOW
SCL
SDA
t
HIGH
t
t
HD;STA
r
t
HD;DAT
t
SU;DAT
MBC764
t
SU;STA
t
SU;STO
Fig.6 I2C-bus timing.
14
March 1992
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in
_white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
FIRST FIELD START (EVEN)
621
(308)
623
(310)
624
(311)
625
(312)
622
(309)
1
2
3
4
5
6
7
TCS interlaced
ODD/EVEN output
(normal sync mode)
2 µs
ODD/EVEN output
(normal sync mode
when VCS to SCS
mode active)
48 µs
ODD/EVEN output
(slave sync mode)
31 µs
SECOND FIELD START (ODD)
314 (1) 315 (2) 316 (3)
313
317 (4)
318 (5)
319 (6)
320 (7)
309
310
311
312
TCS interlaced
ODD/EVEN output
(normal sync mode)
2 µs
ODD/EVEN output
(normal sync mode
when VCS to SCS
mode active)
16 µs
ODD/EVEN output
(slave sync mode)
31 µs
MBA073 - 4
Line numbers placed in the middle of the line. Equivalent count numbers in brackets.
Fig.7 ODD/EVEN timing.
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
APPLICATION INFORMATION
V
DD
40
39
38
37
36
35
34
33
32
31
30
29
28
27
25
25
24
23
22
21
1
2
3
OSCOUT
OSCIN
C3
C2
C1
L1
C4
1 nF
4.7 µH
15 p
10 p 100 nF
R1
3.3
kΩ
OSCGND
4
X1
27 MHz, 3rd Overtone
V
V
5
SS
100 nF
REF+
i.c.
6
DD
C7 100 nF
BLACK
V
SS
V
SS
7
CVBS
8
V
C8
100
nF
SS
100 nF
IREF
9
SAA5244A
R17 27 kΩ
V
10
11
12
13
14
15
16
17
18
19
20
DD
POL
STTV / LFB
V
DDD
VCR / FFB
LK2
LK1
V
SS
R
SDA
(1)
R9
G
R10
(1)
(1)
SCL
B
Y
RGBREF
V
SS
ODD / EVEN
BLAN
V
COR
SS
2.7 k Ω
2.7 kΩ
MLA054 - 5
V
DD
V
DD
(1) Value dependent on application.
Fig.8 Application diagram.
16
March 1992
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
SAA5244A page memory organization
The organization of the page memory is shown in Fig.9. The device provides an additional row as compared with first
generation decoders; this brings the display format up to 40 characters by 25 rows. Rows 0 to 23 form the teletext page;
row 24 is available for software generated status messages and FLOF/FASTEXT prompt information.
fixed character
written by IVT hardware
alphanumerics white for normal
alphanumerics green when looking
for display page
8 characters
always rolling
(time)
7 characters
for status
ROW
7
1
24
8
0
1
2
3
4
24 characters from page header
rolling when display page looked for
MAIN PAGE DISPLAY AREA
5
to
20
21
22
23
24
25
PACKET X / 22
PACKET X / 23
PACKET X / 24 STORED HERE IF R0D7 = 1
14
10
10 bytes for
received
14 bytes
free for use
MBA274
page information
by microcontroller
Fig.9 Basic page memory organization.
Row 0:
Row 0 is for the page header. The first seven columns (0
to 6) are free for status messages. The eighth is an
alphanumeric white or green control character, written
automatically by SAA5244A to give a green rolling header
when a page is being looked for. The last eight characters
are for rolling time.
ROW
PACKET X / 24 if R0D7 = 0
PACKET X / 27 / 0
0
1
2
PACKETS 8 / 30 / 0 to 15
Row 25:
MBA275 - 2
The first 10 bytes of row 25 contain control data relating to
the received page as shown in Table 1. The remaining 14
bytes are free for use by the microcomputer.
Fig.10 Organization of the extension memory.
March 1992
17
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
Table 1 Row 25 received control data format
D0
D1
D2
D3
D4
D5
D6
D7
PU0
PU1
PU2
PU3
PT0
PT1
PT2
PT3
MU0
MU1
MU2
MU3
MT0
MT1
MT2
C4
HU0
HU1
HU2
HU3
HT0
HT1
C5
C7
C11
C12
C13
C14
MAG0
MAG1
MAG2
0
0
C8
0
C9
0
C6
C10
0
HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER FOUND
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PBLF
0
0
Column
Where:
0
1
2
3
4
5
6
7
8
9
Page number
MAG
magazine
page units
page tens
PU
PT
PBLF
page being looked for
FOUND
HAM.ER
Page sub-code
MU
LOW for page has been found
Hamming error in corresponding byte
minutes units
minutes tens
MT
HU
hours units
HT
hours tens
C4-C14
transmitted control bits.
March 1992
18
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
Register maps
SAA5244A mode registers R0 to R11 are shown in Table 2. R0 to R10 are WRITE only; R11 is READ/WRITE.
Register map (R3), for page requests, is shown in detail in Table 3.
Table 2 Register map
REGISTER
D7
X24
D6
D5
D4
D3
D2
D1
D0
Adv.
0
FREE
RUN PLL ODD/
EVEN
AUTO
DISABLE
HDR
ROLL
−
DISABLE
ODD/
EVEN
−
R11/R11B
SELECT
control
POS
Mode
1
2
3
VCS TO
SCS
−
−
−
−
ACQ
ON/OFF
−
DEW/
FULL
FIELD
TCS
ON
T1
T0
Page
request
address
−
−
−
−
−
−
−
TB
START
START
START
COLUMN COLUMN COLUMN
SC2
SC1
SC0
Page
request
data
PRD4
PRD3
PRD2
PRD1
PRD0
−
−
−
−
−
Display
control
(normal)
5
6
BKGND
OUT
BKGND
IN
COR
OUT
COR
IN
TEXT
OUT
TEXT
IN
PON
OUT
PON
IN
Display
control
BKGND
OUT
BKGND
IN
COR
OUT
COR
IN
TEXT
OUT
TEXT
IN
PON
OUT
PON
IN
(newsflash
/subtitle)
Display
mode
7
STATUS CURSOR REVEAL BOTTOM DOUBLE BOX
BOX
1-23
BOX
0
TOP
ON
ON
HALF
HEIGHT 24
−
−
−
−
−
−
−
−
Cursor
row
9
SUPPL.
BLAST
CLEAR
MEM.
A0
R4
R3
R2
R1
R0
Cursor
column
10
11
11B
SUPPL.
ROW 24 ROW 0
SUPPL.
C5
D5
C4
D4
C3
D3
C2
D2
C1
D1
C0
D0
Cursor
data
−
D6
Device
status
625/525
SYNC
ROM
VER R4
ROM
VER R3
ROM
VER R2
ROM
VER R1
ROM
VER R0
TEXT
SIGNAL
VCS
SIGNAL
QUALITY QUALITY
Notes to Table 2
1. ‘− ‘ indicates these bits are inactive and must be written to logic 0 for future compatibility.
2. All bits in registers R0 to R10 are cleared to logic 0 on power-up except bits D0 to D1 of registers R1, R5 and R6
which are set to logic 1.
3. All memory is cleared to ‘space’ (00100000) on power-up, except row 0 column 7 chapter 0, which is ‘alpha’ white
(00000111) as the acquisition circuit is enabled but the page is on hold.
4. TB must be set to logic 0 for normal operation.
5. The I2C slave address is 0010001
March 1992
19
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
REGISTER DESCRIPTION
R0 ADVANCED CONTROL - auto increments to Register 1
R11/R11B
SELECT
Selects reading of R11 or R11B
DISABLE
ODD/EVEN
Forces ODD/EVEN output LOW when logic 1
Disables green rolling header and time
DISABLE HDR
ROLL
AUTO ODD/EVEN
FREE RUN PLL
X24 POS
When set forces ODD/EVEN low if any TV picture displayed, if DISABLE ODD/EVEN = 0
Will force the PLL to free run in all conditions
Automatic display of FASTEXT prompt row when logic 1
R1 MODE - auto increments to Register 2
T0, T1
Interlace/non-interlace 312/313 line control (see Table 4)
TCS ON
Text composite sync or direct sync select
DEW/FULL FIELD
ACQ ON/OFF
VCS TO SCS
Field-flyback or full channel mode
Acquisition circuits turned off when logic 1
When logic 1 enables display of messages with 60 Hz input signal
R2 PAGE REQUEST ADDRESS - auto increments to Register 3
COL SC0 - SC2
TB
Point to start column for page request data (see Table 3)
Must be logic 0 for normal operation
R3 PAGE REQUEST DATA - does not auto increment (see Table 3)
R5 NORMAL DISPLAY CONTROL - auto increments to Register 6
R6 NEWSFLASH/SUBTITLE DISPLAY CONTROL - auto increments to Register 7
PON
Picture on
TEXT
COR
Text on
Contrast reduction on
Background colour on
BKGND
These functions have IN and OUT referring to inside and outside the boxing function respectively.
R7 DISPLAY MODE - does not auto increment
BOX ON 0
Boxing function allowed on Row 0
Boxing function allowed on Row 1-23
Boxing function allowed on Row 24
To display double height text
BOX ON 1-23
BOX ON 24
DOUBLE HEIGHT
BOTTOM HALF
REVEAL ON
CURSOR ON
STATUS TOP
To select bottom half of page when DOUBLE HEIGHT = 1
To reveal concealed text
To display cursor
Row 25 displayed above or below the main text
March 1992
20
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
R9 CURSOR ROW - auto increments to Register 10
R0 to R4
A0
Active row for data written to or read from memory via the I2C-bus
Selects display memory page (when = 0) or extension packet memory (when = 1)
CLEAR MEM.
When set to 1, clears the display memory.
This bit is automatically reset
SUPPL. BLAST
When set to 1, column 4b and 5b (of Table 6) are mapped into 4 and 5 respectively, replacing
blast-through alphanumerics in graphics mode
R10 CURSOR COLUMN - auto increments to Register 11 or 11B
C0 to C5
Active column for data written to or read from memory via the I2C-bus
SUPPL. ROW 0
When set to 1, column 4b and 5b (of Table 6) are mapped into columns 6 and 7 respectively,
just for row 0 columns 0 to 7
SUPPL. ROW 24
When set to 1, column 4b and 5b (of Table 6) are mapped into columns 6 and 7 respectively
just for row 24
R11 CURSOR DATA - does not auto increment
D0 to D6
Data read from/written to memory via I2C, at location pointed to by R9 and R10.
This location automatically increments each time R11 is accessed
R11B DEVICE STATUS - does not auto increment
VCS SIGNAL
QUALITY
Indicates that the video signal quality is good and PLL is phase locked to input video when = 1
TEXT SIGNAL
QUALITY
If a good teletext signal is being received when = 1
Indicated language/ROM variant. For Western European = 01000
If the input video is a 525 line signal when = 1
ROM VER R0 to
R4
625/525 SYNC
March 1992
21
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
Table 3 Register map for page requests (R3)
START
COLUMN
PRD4
PRD3
PRD2
PRD1
PRD0
0
1
2
3
4
5
6
Do care
Magazine
Do care
HOLD
PT3
PU3
X
MAG2
MAG1
MAG0
PT0
Page tens
Do care
PT2
PU2
X
PT1
PU1
HT1
HU1
MT1
MU1
Page units
Do care
PU0
HT0
Hours tens
Do care
Hours units
Do care
HU3
X
HU2
MT2
MU2
HU0
MT0
MU0
Minutes tens
Do care
Minutes units
MU3
Notes to Table 3
1. Abbreviations are as for Table 1 except for DO CARE bits.
2. When the DO CARE bit is set to logic 1 this means the corresponding digit is to be taken into account for page
requests. If the DO CARE bit is set to logic 0 the digit is ignored. This allows, for example, ‘normal’ or ‘timed page’
selection.
3. If HOLD is set LOW, the page is held and not updated.
4. Columns auto-increment on successive I2C-bus transmission bytes.
Table 4 Interlace/non-interlace 312/313 line control (T0 and T1)
T1
T0
RESULT
0
0
1
1
0
1
0
1
interlaced 312.5/312.5 lines
non-interlaced 312/313 lines (note 1)
non-interlaced 312/312 lines (note 1)
scan-locked
Note to Table 4
1. Reverts to interlaced mode if a newsflash or subtitle is being displayed.
March 1992
22
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
Table 5 Crystal characteristics
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
Crystal (27 MHz, 3rd overtone)
C1
C0
CL
Rr
series capacitance
parallel capacitance
−
−
−
−
−
−
−
−
1.7
5.2
20
−
−
pF
pF
pF
Ω
−
load capacitance
resonant resistance
series resistance
ageing
−
50
−
R1
Xa
Xj
20
−
Ω
±5
±25
±25
10−6/yr
10−6
10−6
adjustment tolerance
drift
−
Xd
−
SAA5244A
1
2
CRYSTAL
OSCILLATOR
1 nF
15 p
10 p 100 nF
4.7 µH
3
4
27 MHz
3.3 kΩ
MLA036 - 5
Fig.11 Crystal oscillator application diagram.
CLOCK SYSTEMS
Crystal oscillator
The crystal is a conventional 2-pin design operating at
27 MHz. It is capable of oscillating with both fundamental
and third overtone mode crystals. External components
should be used to suppress the fundamental output of
the third overtone, as shown in Fig.11. The crystal
characteristics are given in Table 5.
March 1992
23
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
national option characters as indicated in Table 8 with
reference to their table position in the basic character
matrix illustrated in Table 7. The SAA5244A automatically
decodes transmission bits C12 to C14. Table 6 illustrates
the character matrices.
Character sets
The WST specification allows the selection of national
character sets via the page header transmission bits, C12
to C14. The basic 96 character sets differ only in 13
MLA663
alphanumerics or
blast-through
alphanumerics
character
alphanumerics and
graphics 'space'
character
alphanumerics
character
1011010
alphanumerics
character
1111111
0000010
0001001
contiguous
graphics character
0110111
separated
graphics character
0110111
separated
graphics character
1111111
contiguous
graphics character
1111111
background
colour
display
colour
=
=
Fig.12 Character format.
March 1992
24
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
Table 6 SAA5244P/A character data input decoding
b
b
b
B
I
T
S
7
1
1
1
0
0
0
0
0
0
1
6
5
b
0
0
1
1
1
0
1
1
1
0
AVAILABLE AS
NATIONAL OPTIONS
ONLY
0
1
0
0
1
1
0
1
0
1
b
b
b
3 2
4
1
column
1
2
3
3a
4
4b
5
5b
6
6a
7a
0
2a
7
r
o
w
alpha -
numerics
black
graphics
black
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
1
0
1
0
1
0
1
0
1
0
1
2
3
alpha -
numerics
red
graphics
red
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
alpha -
numerics
green
graphics
green
alpha -
numerics
yellow
graphics
yellow
alpha -
numerics
blue
graphics
blue
4
5
6
7
8
9
alpha -
numerics
magenta
graphics
magenta
alpha -
numerics
cyan
graphics
cyan
alpha -
numerics
white
graphics
white
conceal
display
flash
contiguous
graphics
steady
separated
graphics
end box
start box
0
1
0
1
0
1
10
11
ESC
black
back -
ground
normal
hight
12
13
14
15
new
back -
ground
double
height
hold
graphics
SO
SI
release
graphics
MBA266 - 1
ko,fulapgwedhit
Notes to Table 6 - For character version number (01000) see Register 11B
1. * These control characters are reserved for compatibility with other data codes.
2. ** These control characters are presumed before each row begins.
3. + Columns 4b and 5b can only be accessed when supplementary character bits are set (see Registers 9 and 10).
4. Control characters shown in columns 0 and 1 are normally displayed as spaces.
5. Characters may be referred to by column and row, For example 2/5 refers to %.
March 1992
25
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
6. Black represents displayed colour. White represents background.
7. Character rectangle shown as follows:
8. The SAA5244A national option characters are illustrated in Table 8.
9. Characters 4b/11, 4b/12, 5b/10, 5b/11 and 5b/12 are special characters for combining with character 4b/10.
10. National option characters will be developed according to the setting of control bits C12 to C14. These will be mapped
into the basic code table into positions shown in Table 8.
11. Columns 4b and 5b are mapped into 4 and 5 respectively (replacing blast-through alphanumerics in the graphics
mode) when enabled by R9 bit D7 set to 1.
12. Columns 4b and 5b are mapped into columns 6 and 7 respectively when enabled by R10 bit D6 (row 0 columns 0
to 7) and R10 bit D7 (row 24) set to 1.
13. Columns 2a, 3a, 6a and 7a are displayed in graphics mode.
March 1992
26
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in
_white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
2/0
2/1
2/2
2/3
2/4
2/5
2/6
2/7
2/8
3/0
3/1
3/2
3/3
3/4
3/5
3/6
3/7
3/8
4/0
4/1
4/2
4/3
4/4
4/5
4/6
4/7
4/8
5/0
5/1
5/2
5/3
5/4
5/5
5/6
5/7
5/8
6/0
6/1
6/2
6/3
6/4
6/5
6/6
6/7
6/8
7/0
7/1
7/2
7/3
7/4
7/5
7/6
7/7
7/8
NC
NC
2/9
3/9
4/9
5/9
6/9
7/9
2/10
2/11
2/12
2/13
2/14
2/15
3/10
3/11
3/12
3/13
3/14
3/15
4/10
4/11
4/12
4/13
4/14
4/15
5/10
6/10
6/11
6/12
6/13
7/10
7/11
5/11
NC
NC
NC
NC
5/12
NC
7/12
NC
5/13
NC
7/13
NC
5/14
NC
7/14
NC
5/15
NC
6/15
7/15
MLA630
Where: NC = national option character position.
g
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
Table 8 SAA5244A national option character set
n
(1)
CHARACTER POSITION (COLUMN / ROW)
PHCB
LANGUAGE
C12 C13 C14 2 / 3 2 / 4 4 / 0 5 / 11 5 / 12 5 / 13 5 / 14 5 / 15 6 / 0 7 / 11 7 / 12 7 / 13 7 / 14
ENGLISH
GERMAN
SWEDISH
ITALIAN
0
0
0
0
1
0
0
1
1
0
0
1
0
1
0
FRENCH
MLA664
(1) PHCB are the Page Header Control Bits. Other combinations default to English.
March 1992
28
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
PACKAGE OUTLINES
DIP40: plastic dual in-line package; 40 leads (600 mil)
SOT129-1
D
M
E
A
2
A
L
A
1
c
e
w M
Z
b
1
(e )
1
b
M
H
40
21
pin 1 index
E
1
20
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
A
A
(1)
(1)
Z
1
2
w
UNIT
mm
b
b
c
D
E
e
e
L
M
M
1
1
E
H
max.
min.
max.
max.
1.70
1.14
0.53
0.38
0.36
0.23
52.50
51.50
14.1
13.7
3.60
3.05
15.80
15.24
17.42
15.90
4.7
0.51
4.0
2.54
0.10
15.24
0.60
0.254
0.01
2.25
0.067
0.045
0.021
0.015
0.014
0.009
2.067
2.028
0.56
0.54
0.14
0.12
0.62
0.60
0.69
0.63
inches
0.19
0.020
0.16
0.089
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-01-14
SOT129-1
051G08
MO-015AJ
March 1992
29
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
QFP44: plastic quad flat package; 44 leads (lead length 2.35 mm); body 14 x 14 x 2.2 mm
SOT205-1
y
X
A
33
23
Z
34
22
E
e
A
H
2
E
E
A
(A )
3
A
1
w M
p
θ
b
L
p
pin 1 index
L
44
12
detail X
1
11
Z
v
M
D
A
e
w M
b
p
D
B
H
v
M
B
D
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.
7o
0o
0.25 2.3
0.05 2.1
0.50 0.25 14.1 14.1
0.35 0.14 13.9 13.9
19.2 19.2
18.2 18.2
2.0
1.2
2.4
1.8
2.4
1.8
mm
1
2.60
0.25
2.35
0.3 0.15 0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-02-04
97-08-01
SOT205-1
133E01A
March 1992
30
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary from
50 to 300 seconds depending on heating method. Typical
reflow temperatures range from 215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheat for 45 minutes at 45 °C.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
WAVE SOLDERING
Wave soldering is not recommended for QFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
DIP
SOLDERING BY DIPPING OR BY WAVE
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
If wave soldering cannot be avoided, the following
conditions must be observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
• The footprint must be at an angle of 45° to the board
direction and must incorporate solder thieves
downstream and at the side corners.
Even with these conditions, do not consider wave
soldering the following packages: QFP52 (SOT379-1),
QFP100 (SOT317-1), QFP100 (SOT317-2),
QFP100 (SOT382-1) or QFP160 (SOT322-1).
REPAIRING SOLDERED JOINTS
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured. Maximum permissible solder
temperature is 260 °C, and maximum duration of package
immersion in solder is 10 seconds, if cooled to less than
150 °C within 6 seconds. Typical dwell time is 4 seconds
at 250 °C.
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
QFP
REFLOW SOLDERING
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Reflow soldering techniques are suitable for all QFP
packages.
REPAIRING SOLDERED JOINTS
The choice of heating method may be influenced by larger
plastic QFP packages (44 leads, or more). If infrared or
vapour phase heating is used and the large packages are
not absolutely dry (less than 0.1% moisture content by
weight), vaporization of the small amount of moisture in
them can cause cracking of the plastic body. For more
information, refer to the Drypack chapter in our “Quality
Reference Handbook” (order code 9397 750 00192).
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
March 1992
31
Philips Semiconductors
Product specification
Integrated VIP and teletext decoder
(IVT1.1)
SAA5244A
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
March 1992
32
相关型号：
©2020 ICPDF网 联系我们和版权申明