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SA56615-27D [NXP]

IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, 1.50 MM, PLASTIC, SOT-23, SOT-25, SO-5, Power Management Circuit;
SA56615-27D
型号： SA56615-27D
厂家： NXP    NXP
描述：

IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, 1.50 MM, PLASTIC, SOT-23, SOT-25, SO-5, Power Management Circuit

光电二极管
文件： 总23页 (文件大小：244K)
中文：  中文翻译
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INTEGRATED CIRCUITS  
SA56615-XX; SA56616-XX  
CMOS system reset with adjustable  
delay time  
Product data  
2003 Oct 15  
Supersedes data of 2002 Mar 25  
Philips  
Semiconductors  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
GENERAL DESCRIPTION  
The SA56616-XX and SA56615-XX CMOS system resets have low  
consumption current of typically 1.0 µA and high precision detection  
voltage within ±2%. The delay time is adjusted by an external  
capacitor working in conjunction with the on-chip delay network. The  
SA56615-XX and SA56616-XX have different output configurations  
to accommodate a wide variety of microprocessors and logic  
devices. The SA56615-XX incorporates a low side open-drain  
output topology which requires a pull-up resistor to V , while the  
DD  
SA56616-XX incorporates an active push-pull totem pole output  
topology comprised of complimentary P-channel and N-channel  
FETs.  
The resets operate over a wide operating supply voltage range from  
0.7 V to 10 V. Reset detection voltages are available at 0.9 V, 1.8 V,  
1.9 V, 2.0 V, 2.7 V, 2.8 V, 2.9 V, 3.0 V, 3.1 V, 4.2 V, 4.3 V, 4.4 V,  
4.5 V, 4.6 V and 4.7 V. Other thresholds are offered upon request at  
100 mV increments from 0.9 V to 6.0 V. The device comes in the  
small outline 5-lead package (SOP003).  
FEATURES  
APPLICATIONS  
• Super low supply current: typically 1.0 µA (V = V + 1 V)  
• Microprocessor and logic circuit reset  
DD  
S
• Operating supply voltage range: 0.7 V to 10 V  
• High precision detection voltage: ±2%  
• Battery voltage level detection  
• Battery backup and switching circuits  
• Adjustable time delay circuits  
• Detection voltage: 0.9 V, 1.8 V, 1.9 V, 2.0 V, 2.7 V, 2.8 V, 2.9 V,  
3.0 V, 3.1 V, 4.2 V, 4.3 V, 4.4 V, 4.5 V, 4.6 V, and 4.7 V  
• Other detection threshold voltages available at 100 mV steps from  
0.9 V to 6.0 V  
• User adjustable reset delay time  
• Versatile output configurations:  
– SA56615-XX: open-drain  
– SA56616-XX: N-channel/P-channel push-pull  
SIMPLIFIED SYSTEM DIAGRAMS  
V
V
DD  
DD  
V
V
DD  
DD  
2
2
R
PU  
V
V
IN  
C
OUT  
RESET  
C
OUT  
RESET  
LOGIC  
SYSTEM  
LOGIC  
SYSTEM  
IN  
D
D
5
1
5
1
SA56615-XX  
SA56616-XX  
3
3
GND  
GND  
SL01596  
SL01597  
Figure 1. SA56615-XX simplified system diagram.  
Figure 2. SA56616-XX simplified system diagram.  
2
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
ORDERING INFORMATION  
PACKAGE  
TYPE NUMBER  
TEMPERATURE  
RANGE  
DESCRIPTION  
VERSION  
SA56615-XXD  
SA56616-XXD  
NOTE:  
plastic small outline package; 5 leads (see dimensional drawing)  
plastic small outline package; 5 leads (see dimensional drawing)  
SOP003  
SOP003  
–40 to +85 °C  
–40 to +85 °C  
The device has 15 voltage output options, indicated by the XX on  
the ‘Type number’.  
XX  
09  
18  
19  
20  
27  
28  
29  
30  
31  
42  
43  
44  
45  
46  
47  
VOLTAGE (Typical)  
0.9 V  
1.8 V  
1.9 V  
2.0 V  
2.7 V  
2.8 V  
2.9 V  
3.0 V  
3.1 V  
4.2 V  
4.3 V  
4.4 V  
4.5 V  
4.6 V  
4.7 V  
PIN CONFIGURATION  
PIN DESCRIPTION  
PIN  
1
SYMBOL  
DESCRIPTION  
Output. RESET Active-LOW.  
Power supply voltage.  
Ground. Negative supply.  
No connection.  
OUT  
OUT  
1
2
3
5
4
C
D
2
V
DD  
SA56615-XX  
SA56616-XX  
V
DD  
3
GND  
N/C  
4
GND  
N/C  
5
C
Time delay pin. Delay adjusted by capacitor  
to ground.  
D
SL01595  
Figure 3. Pin configuration.  
3
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
MAXIMUM RATINGS  
SYMBOL  
PARAMETER  
MIN.  
MAX.  
+12  
12  
UNIT  
V
V
Power supply voltage  
Output voltage  
–
DD(max)  
OUT  
SA56615-XX  
SA56616-XX  
V
V
+ 0.3  
V
V
SS  
– 0.3  
12  
V
SS  
I
Output current  
–
70  
mA  
V
OUT  
V
C
pin input voltage  
V
SS  
– 0.3  
V
+ 0.3  
i(CD)  
D
DD  
T
Ambient operating temperature  
Storage temperature  
–40  
85  
°C  
°C  
mW  
amb  
T
stg  
–40  
–
125  
150  
P
Power dissipation  
ELECTRICAL CHARACTERISTICS  
T
amb  
= 25 °C, unless otherwise specified.  
SYMBOL  
PARAMETER  
Hysteresis voltage  
CONDITIONS  
MIN.  
TYP.  
× 0.05  
MAX.  
UNIT  
V
V
hys  
V
× 0.03  
V
S
V
× 0.07  
S
S
V /∆T  
S
Detection voltage temperature  
coefficient  
–40 °C ≤ T  
≤ 85 °C  
–
±0.01  
–
%/°C  
amb  
I
I
I
I
Supply current 1  
Supply current 2  
Output current 1  
Output current 2  
V
V
= (V ) – 0.13 V  
–
–
4
8
3.6  
–
µA  
µA  
SS1  
DD  
SL  
= (V ) + 2.0 V  
1.2  
0.05  
2.0  
SS2  
DD  
SL  
Nch: V = 0.05 V; V = 0.7 V  
0.01  
1.0  
mA  
mA  
OUT1  
OUT2  
DS  
DD  
V
DD  
V
DD  
= 1.5 V; Nch: V = 0.05 V;  
–
DS  
= 1.5 V  
I
Output current 3  
V
= 4.5 V; Pch: V = –2.1 V  
1.0  
2.0  
–
mA  
OUT3  
DD  
DS  
(Note 1)  
V
Delay threshold voltage  
Delay output current 1  
Delay output current 2  
Minimum supply voltage 1  
Minimum supply voltage 2  
V
V
V
V
V
= (V ) × 1.1 V  
V
DD  
× 0.4  
V
DD  
× 0.5  
V
DD  
× 0.6  
V
µA  
µA  
V
TCD  
CD1  
CD2  
DD  
SL  
I
I
= 0.1 V; V = 0.7 V  
2
200  
–
30  
800  
0.55  
0.65  
1.0  
–
–
DS  
DD  
= 0.5 V; V = 0.7 V  
–
DS  
DD  
V
≤ 0.1 V; T = 25 °C  
amb  
0.70  
0.80  
2.0  
DDL1  
DDL2  
OUT  
OUT  
V
≤ 0.1 V; –40 °C ≤ T  
≤ 85 °C  
–
V
amb  
R
Delay C Pin Resistance  
0.5  
–
MΩ  
µA  
D
D
I
Output leakage current  
V
DD  
= 10 V; V = 10 V; V = 10 V  
0.1  
LEAK  
CD  
DS  
NOTE:  
1. Output current 3 is SA56616-XX CMOS push-pull configuration only.  
4
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
TYPICAL PERFORMANCE CURVES  
NOTE: Typical characteristics for SA56616-09  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
2.0  
1.5  
1.0  
0.5  
0
0.70  
0.75  
0.80  
0.85  
0.90  
0.95  
1.00  
0
2
4
6
8
10  
INPUT VOLTAGE (V)  
TEMPERATURE (°C)  
SL01743  
SL01744  
Figure 4. Output voltage versus input voltage.  
Figure 5. Consumption current versus input voltage.  
0.40  
1000  
V
= 0.5 V  
DS  
0.35  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
100  
10  
1
0.1  
0.0001  
0
0.2  
0.4  
0.6  
0.8  
1.0  
0.001  
0.01  
(µF)  
0.1  
1
INPUT VOLTAGE (V)  
C
D
SL01745  
SL01746  
Figure 6. C pin output current versus input voltage.  
Figure 7. Delay time versus C .  
D
D
1.00  
80  
70  
60  
0.95  
0.90  
50  
40  
30  
0.85  
20  
10  
0.80  
–40  
0
–40  
–20  
0
20  
40  
60  
80  
100  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01747  
SL01748  
Figure 8. Detection voltage versus temperature.  
Figure 9. Hysteresis voltage versus temperature.  
5
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
TYPICAL PERFORMANCE CURVES (continued)  
NOTE: Typical characteristics for SA56616-09  
0.20  
1.0  
0.8  
0.6  
0.15  
0.10  
0.4  
0.05  
0.2  
0.0  
0.00  
–40  
–20  
0
20  
40  
60  
80  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01749  
SL01750  
Figure 10. Output current 1 versus temperature.  
Figure 11. Output current 2 versus temperature.  
5.0  
0.60  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
0.55  
0.50  
0.45  
0.40  
0.35  
0.30  
0.25  
0.20  
–40  
–40  
–20  
0
20  
40  
60  
80  
100  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01751  
SL01752  
Figure 12. Output current 3 versus temperature.  
Figure 13. C pin threshold voltage versus temperature.  
D
0.40  
0.35  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
–40  
–20  
0
20  
40  
60  
80  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01753  
SL01754  
Figure 14. C pin output current 1 versus temperature.  
Figure 15. C pin output current 2 versus temperature.  
D
D
6
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
TYPICAL PERFORMANCE CURVES (continued)  
NOTE: Typical characteristics for SA56616-28  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
1.0  
1.5  
2.0  
2.5  
3.0  
0
2
4
6
8
10  
INPUT VOLTAGE (V)  
INPUT VOLTAGE (V)  
SL01755  
SL01756  
Figure 16. Output voltage versus input voltage.  
Figure 17. Consumption current versus input voltage.  
4.0  
1000  
V
= 0.5 V  
DS  
3.0  
2.0  
100  
10  
1.0  
0.0  
1
0.1  
0.0001  
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
0.001  
0.01  
(µF)  
0.1  
1
INPUT VOLTAGE (V)  
C
D
SL01757  
SL01758  
Figure 18. C pin output current versus input voltage.  
Figure 19. Delay time versus C .  
D
D
200  
3.00  
180  
160  
140  
2.90  
2.80  
120  
100  
2.70  
80  
2.60  
–40  
–20  
0
20  
40  
60  
80  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01759  
SL01760  
Figure 20. Detection voltage versus temperature.  
Figure 21. Hysteresis voltage versus temperature.  
7
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
TYPICAL PERFORMANCE CURVES (continued)  
NOTE: Typical characteristics for SA56616-28  
0.20  
8.0  
7.0  
6.0  
5.0  
4.0  
3.0  
2.0  
1.0  
0.0  
0.15  
0.10  
0.05  
0.00  
–40  
–20  
0
20  
40  
60  
80  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01761  
SL01762  
Figure 22. Output current 1 versus temperature.  
Figure 23. Output current 2 versus temperature.  
1.80  
5.0  
1.70  
1.60  
1.50  
4.0  
3.0  
2.0  
1.0  
0.0  
1.40  
1.30  
1.20  
–40  
–40  
–20  
0
20  
40  
60  
80  
100  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01763  
SL01764  
Figure 24. Output current 3 versus temperature.  
Figure 25. C pin threshold voltage versus temperature.  
D
100  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
80  
60  
40  
20  
–40  
–20  
0
20  
40  
60  
80  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01765  
SL01766  
Figure 26. C pin output current 1 versus temperature.  
Figure 27. C pin output current 2 versus temperature.  
D
D
8
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
TYPICAL PERFORMANCE CURVES (continued)  
NOTE: Typical characteristics for SA56616-46  
5.0  
4.5  
4.0  
3.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
1.0  
0.5  
0.0  
0.0  
1
2
3
4
5
0
2
4
6
8
10  
INPUT VOLTAGE (V)  
INPUT VOLTAGE (V)  
SL01767  
SL01768  
Figure 28. Output voltage versus input voltage.  
Figure 29. Consumption current versus input voltage.  
1000  
6.0  
V
= 0.5 V  
DS  
5.0  
100  
10  
4.0  
3.0  
2.0  
1
1.0  
0.0  
0.1  
0.0001  
0
1
2
3
4
5
0.001  
0.01  
(µF)  
0.1  
1
INPUT VOLTAGE (V)  
C
D
SL01769  
SL01770  
Figure 30. C pin output current versus input voltage.  
Figure 31. Delay time versus C .  
D
D
300  
5.0  
280  
260  
4.8  
4.6  
240  
220  
200  
4.4  
180  
160  
4.2  
–40  
–20  
0
20  
40  
60  
80  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01771  
SL01772  
Figure 32. Detection voltage versus temperature.  
Figure 33. Hysteresis voltage versus temperature.  
9
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
TYPICAL PERFORMANCE CURVES (continued)  
NOTE: Typical characteristics for SA56616-46  
0.20  
8.0  
7.0  
6.0  
5.0  
4.0  
3.0  
2.0  
1.0  
0.0  
0.15  
0.10  
0.05  
0.00  
–40  
–20  
0
20  
40  
60  
80  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01773  
SL01774  
Figure 34. Output current 1 versus temperature.  
Figure 35. Output current 2 versus temperature.  
2.80  
8.0  
7.0  
6.0  
5.0  
4.0  
3.0  
2.0  
1.0  
0.0  
2.75  
2.70  
2.65  
2.60  
–40  
–20  
0
20  
40  
60  
80  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01775  
SL01776  
Figure 36. Output current 3 versus temperature.  
Figure 37. C pin threshold voltage versus temperature.  
D
2.5  
2.0  
1.5  
100  
80  
60  
1.0  
40  
0.5  
0.0  
20  
–40  
–20  
0
20  
40  
60  
80  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01777  
SL01778  
Figure 38. C pin output current 1 versus temperature.  
Figure 39. C pin output current 2 versus temperature.  
D
D
10  
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
TYPICAL PERFORMANCE CURVES (continued)  
NOTE: Typical characteristics for SA56615-09  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
2.0  
1.5  
1.0  
0.5  
0
0
0.2  
0.4  
0.6  
0.8  
1.0  
0
2
4
6
8
10  
INPUT VOLTAGE (V)  
TEMPERATURE (°C)  
SL01779  
SL01780  
Figure 40. Output voltage versus input voltage.  
Figure 41. Consumption current versus input voltage.  
0.40  
1000  
V
= 0.5 V  
DS  
0.35  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
100  
10  
1
0.1  
0.0001  
0
0.2  
0.4  
0.6  
0.8  
1.0  
0.001  
0.01  
(µF)  
0.1  
1
INPUT VOLTAGE (V)  
C
D
SL01781  
SL01782  
Figure 42. C pin output current versus input voltage.  
Figure 43. Delay time versus C .  
D
D
1.00  
80  
70  
60  
0.95  
0.90  
50  
40  
30  
0.85  
20  
10  
0.80  
–40  
0
–40  
–20  
0
20  
40  
60  
80  
100  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01783  
SL01784  
Figure 44. Detection voltage versus temperature.  
Figure 45. Hysteresis voltage versus temperature.  
11  
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
TYPICAL PERFORMANCE CURVES (continued)  
NOTE: Typical characteristics for SA56615-09  
0.20  
1.0  
0.8  
0.6  
0.15  
0.10  
0.4  
0.05  
0.2  
0.0  
0.00  
–40  
–20  
0
20  
40  
60  
80  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01785  
SL01786  
Figure 46. Output current 1 versus temperature.  
Figure 47. Output current 2 versus temperature.  
0.60  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
0.55  
0.50  
0.45  
0.40  
0.35  
0.30  
0.25  
0.20  
–40  
–20  
0
20  
40  
60  
80  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01787  
SL01788  
Figure 48. C pin threshold voltage versus temperature.  
Figure 49. C pin output current 1 versus temperature.  
D
D
0.40  
0.35  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
SL01789  
Figure 50. C pin output current 2 versus temperature.  
D
12  
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
TYPICAL PERFORMANCE CURVES (continued)  
NOTE: Typical characteristics for SA56615-28  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
0.0  
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
0
2
4
6
8
10  
INPUT VOLTAGE (V)  
INPUT VOLTAGE (V)  
SL01790  
SL01791  
Figure 51. Output voltage versus input voltage.  
Figure 52. Consumption current versus input voltage.  
4.0  
1000  
V
= 0.5 V  
DS  
3.0  
2.0  
100  
10  
1.0  
0.0  
1
0.1  
0.0001  
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
0.001  
0.01  
(µF)  
0.1  
1
INPUT VOLTAGE (V)  
C
D
SL01792  
SL01793  
Figure 53. C pin output current versus input voltage.  
Figure 54. Delay time versus C .  
D
D
200  
3.00  
180  
160  
140  
2.90  
2.80  
120  
100  
2.70  
80  
2.60  
–40  
–20  
0
20  
40  
60  
80  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01794  
SL01795  
Figure 55. Detection voltage versus temperature.  
Figure 56. Hysteresis voltage versus temperature.  
13  
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
TYPICAL PERFORMANCE CURVES (continued)  
NOTE: Typical characteristics for SA56615-28  
0.20  
8.0  
7.0  
6.0  
5.0  
4.0  
3.0  
2.0  
1.0  
0.0  
0.15  
0.10  
0.05  
0.00  
–40  
–20  
0
20  
40  
60  
80  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01796  
SL01797  
Figure 57. Output current 1 versus temperature.  
Figure 58. Output current 2 versus temperature.  
1.80  
100  
1.70  
1.60  
1.50  
80  
60  
1.40  
1.30  
40  
20  
1.20  
–40  
–20  
0
20  
40  
60  
80  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01798  
SL01799  
Figure 59. C pin threshold voltage versus temperature.  
Figure 60. C pin output current 1 versus temperature.  
D
D
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
SL01800  
Figure 61. C pin output current 2 versus temperature.  
D
14  
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
TYPICAL PERFORMANCE CURVES (continued)  
NOTE: Typical characteristics for SA56615-46  
5.0  
4.5  
4.0  
3.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
1.0  
0.5  
0.0  
0.0  
0
1
2
3
4
5
0
2
4
6
8
10  
INPUT VOLTAGE (V)  
INPUT VOLTAGE (V)  
SL01801  
SL01802  
Figure 62. Output voltage versus input voltage.  
Figure 63. Consumption current versus input voltage.  
1000  
6.0  
V
= 0.5 V  
DS  
5.0  
100  
10  
4.0  
3.0  
2.0  
1
1.0  
0.0  
0.1  
0.0001  
0
1
2
3
4
5
0.001  
0.01  
(µF)  
0.1  
1
INPUT VOLTAGE (V)  
C
D
SL01803  
SL01804  
Figure 64. C pin output current versus input voltage.  
Figure 65. Delay time versus C .  
D
D
300  
5.0  
280  
260  
4.8  
4.6  
240  
220  
200  
4.4  
180  
160  
4.2  
–40  
–20  
0
20  
40  
60  
80  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01805  
SL01806  
Figure 66. Detection voltage versus temperature.  
Figure 67. Hysteresis voltage versus temperature.  
15  
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
TYPICAL PERFORMANCE CURVES (continued)  
NOTE: Typical characteristics for SA56615-46  
0.20  
8.0  
7.0  
6.0  
5.0  
4.0  
3.0  
2.0  
1.0  
0.0  
0.15  
0.10  
0.05  
0.00  
–40  
–20  
0
20  
40  
60  
80  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01807  
SL01808  
Figure 68. Output current 1 versus temperature.  
Figure 69. Output current 2 versus temperature.  
2.80  
100  
2.75  
2.70  
80  
60  
40  
20  
2.65  
2.60  
–40  
–20  
0
20  
40  
60  
80  
100  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SL01809  
SL01810  
Figure 70. C pin threshold voltage versus temperature.  
Figure 71. C pin output current 1 versus temperature.  
D
D
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
–40  
–20  
0
20  
40  
60  
80  
100  
TEMPERATURE (°C)  
SL01811  
Figure 72. C pin output current 2 versus temperature.  
D
16  
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
output of the comparator to go HIGH. This switches the N-channel  
FET (M3) to an active ON state, pulling its output (drain) to a low  
voltage state. The output of M3 is connected to the internal resistor,  
TECHNICAL DISCUSSION  
The SA56616-XX and SA56615-XX are CMOS devices designed to  
monitor the system’s power source and provide a system reset  
function in the event the supply voltage sags below an acceptable  
level for the system to reliably operate. The SA56616-XX and  
SA56615-XX generate a compatible reset signal for a wide variety  
of microprocessors and logic systems. They can operate up to  
10 volts. The series includes several versions providing high  
precision reset threshold levels of 0.9, 1.8, 1.9, 2.0, 2.7, 2.8, 2.9,  
3.0, 3.1, 4.2, 4.3, 4.4, 4.5, 4.6, and 4.7 V. The reset threshold  
R , the time delay pin C , and the input of the inverting amplifier.  
D
D
The output level of the C pin will rise to the level of V  
by the  
D
TCD  
time constant formed by internal R to V and external C to  
D
DD  
D
ground. The output of the inverting amplifier will then be pulled to a  
LOW state. This causes the high side FET M1 of the totem-pole  
output stage to turn off while simultaneously turning the low side  
N-channel FET M2 to an active ON state, pulling the output to a low  
voltage state.  
incorporates a typical hysteresis of (V × 0.05) volts to prevent  
S
erratic resets from being generated. The SA56616-XX and  
SA56615-XX operate at very low supply currents, typically 1.2 µA,  
while offering high precision of threshold detection, typically ±2%.  
They have an on-chip reset time delay which is adjusted by an  
external capacitor.  
The device adheres to true input/output logic protocol. The output  
goes to a low voltage state when the input is LOW (below V ) and  
SL  
the output goes HIGH when the input is HIGH (above V ).  
SH  
The low side N-channel FET (M4) establishes threshold hysteresis  
by turning ON whenever the threshold comparator output goes to a  
The SA56616-XX and SA56615-XX offer different output options;  
one or the other may be preferred depending on the system criteria.  
The SA56616-XX (Figure 2) incorporates an active push-pull,  
Totem-pole output topology comprised of complimentary P-channel  
and N-channel FETs. A P-channel is on the high supply side and  
HIGH state (when V sags to or below the V level). With M4 in the  
DD  
SL  
ON state, additional current flows through resistors R1 and R2 which  
causes the inverting input of the threshold comparator to be pulled  
even lower. For the comparator to reverse its output polarity and turn  
OFF M4, the V source voltage must overcome this additional  
DD  
when ON pulls the output to or near the V supply voltage from  
DD  
pull-down voltage on the comparator’s inverting input. The differential  
voltage required to do this establishes the hysteresis voltage of the  
which output source current can be obtained. A complimentary  
N-channel FET is on the low supply side or ground side, and  
actively pulls the output LOW or to ground with the capability of  
sinking current into the output. When connecting the SA56616-XX to  
a system, the user should be aware of the effect of supplying source  
current from the output of the SA56616-XX on the system. The  
SA56615-XX (Figure 1) incorporates a low side N-channel  
sensed threshold voltage. Typically, this is (V × 0.5) volts.  
S
When the V voltage sags and is at or below the Detection  
DD  
Threshold (V ), the device will assert a Reset Low output at or very  
SL  
near ground potential. As the V voltage rises from (V < V ) to  
DD  
DD  
SL  
V
SH  
or higher, the reset is released and the output follows V  
.
DD  
Conversely, decreases in V from (V > V ) to V or lower  
DD  
DD  
SL  
SL  
open-drain topology, which requires an external pull-up to V  
.
DD  
cause the output to be pulled to ground.  
Though this may be regarded as a disadvantage, it is an advantage  
in many sensitive applications because the open-drain output can  
not source reset current to a microprocessor when both are  
operated from a common supply. For this reason, the SA56615-XX  
offers a safe interconnect to a wide variety of microprocessors.  
Hysteresis Voltage = Release Voltage – Detection Threshold Voltage  
V
hys  
= V – V  
SH SL  
where:  
Figure 73 and Figure 74 are the functional block diagrams of the  
SA56615-XX and SA56616-XX, respectively. The only difference  
between them is the output configuration. The internal reference is  
typically 0.8 V over the operating temperature range. The reference  
voltage is connected to the non-inverting input of the threshold  
comparator while the inverting input monitors the supply voltage  
through a resistor divider network made up of R1, R2, and R3. The  
output threshold comparator drives the time delay/inverting amplifier  
network and, in turn, the totem-pole output stage.  
V
V
= V + V  
= V  
(R1 + R2)/R2  
REF  
SH  
SL  
SL  
hys  
= V  
(R1 + R2 + R3)/(R2 +R3)  
REF  
When V drops below the minimum operating voltage, typically  
less than 0.95 volts, the output is undefined and output reset low  
assertion is not guaranteed. At this level of V the output will try to  
rise to V  
DD  
DD  
.
DD  
The V  
voltage is typically 0.8 V. The devices are fabricated using  
REF  
a high resistance CMOS process and utilize high resistance R1, R2,  
and R3 values requiring very small amounts of current. This  
combination achieves very efficient low power performance over the  
full temperature.  
When the supply voltage sags to the threshold detection voltage, the  
resistor divider network supplies a voltage to the inverting input of  
the threshold comparator which is less than V , causing the  
REF  
17  
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
Equivalent circuit diagrams  
V
2
V
2
DD  
DD  
M1  
R1  
R2  
R1  
R2  
R
R
D
D
1
OUT  
1
OUT  
M2  
M2  
V
V
REF  
REF  
M4  
M4  
M3  
M3  
R3  
R3  
3
3
GND  
GND  
5
5
C
C
D
D
SL01598  
SL01599  
Figure 73. SA56615-XX equivalent circuit.  
Figure 74. SA56616-XX equivalent circuit.  
18  
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
TIMING DIAGRAM  
The Timing Diagram shown in Figure 75 depicts the operation of the  
device. Letters A – K on the TIME axis indicate specific events.  
E–F: Between “E” and “F”, V starts rising.  
DD  
F–G: At “F”, V rises to V . Once again, the IC initiates the  
DD  
SH  
A: At “A”, V begins to increase. Initially, the V  
voltage  
reset delay timer and V starts to rise until the delay pin threshold  
TCD  
DD  
OUT  
increases but abruptly decreases when V reaches the level  
level is reached and the IC releases the hold on the V  
reset. At  
DD  
OUT  
(approximately 0.8 V) that activates the internal bias circuitry and  
RESET is asserted.  
“G”, the reset output V  
goes to V  
.
DD  
OUT  
G–H: Between “G” and “H”, V  
follow V . As long V  
DD DD  
OUT  
B: At “B”, V reaches the high side threshold level, V . At this  
remains above V , no reset signal will be triggered. Before V  
SH DD  
DD  
SH  
point the reset delay timer is initiated and V  
, delay pin threshold  
falls to the V threshold, it begins to rise, causing V  
to follow it.  
TCD  
SH  
OUT  
voltage begins to rise. V increases to its nominal operating level  
At “H” V returns to its nominal operating level.  
DD  
DD  
without releasing the reset.  
J: At “J” V falls until the V threshold point is reached. At this  
DD  
SL  
C: At “C”, the delay pin threshold voltage is reached, and the IC  
level, a RESET signal is generated and V  
goes LOW.  
OUT  
releases the hold on the V  
reset. The reset output voltage goes  
OUT  
K: At “K”, the V voltage has decreased until normal internal circuit  
DD  
to V  
.
DD  
bias is unable to maintain a V  
reset. As a result, V  
may rise  
OUT  
OUT  
D–E: At “D”, V begins to fall, causing the reset output to follow.  
to less than 0.8 V. As V decreases further, V  
reset also  
DD  
DD  
OUT  
V
DD  
continues to fall until the V , low side detection threshold level  
decreases to zero.  
SL  
is reached at “E”. This causes the a reset signal to be generated  
(V reset goes LOW).  
OUT  
V
SH  
V
SL  
V
hys  
V
DD  
V
C
PIN  
D
THRESHOLD  
VOLTAGE  
V
V
TCD  
TCD  
(V  
)
THCD  
OUT  
t
D
t
D
V
A
B
C
D
E
F
G
H
J
K
t
SL01600  
Figure 75. Timing diagram.  
19  
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
APPLICATION INFORMATION  
The SA56615-XX differs from the SA56616-XX in that it requires a  
+5 V  
V
OUT  
(RESET) pull-up resistor from pin 1 to V . Typical value for  
V
DD  
DD  
R
, the pull-up resistor, is 470 kΩ.  
2
PU  
470 kΩ  
V
The reset delay time is the duration measured from the time V  
IN  
DD  
C
OUT  
D
5
1
SA56615-XX  
exceeds the upper detection threshold (V ) and when reset  
SH  
release occurs (V  
or RESET goes HIGH).  
OUT  
C
D
3
Figures 76 and 77 show typical application circuits for the  
SA56615-XX and SA56616-XX in which the delay time is externally  
GND  
adjusted by a capacitor connected from C (pin 5) to ground. The  
D
delay time may be varied from 150 ns to 1 second with the  
appropriate external capacitor. Typical capacitor value is from  
V
+2.0 V  
SH  
INPUT VOLTAGE  
100 pF to 1 µF. Refer to “Delay time versus C ” in Typical  
D
Performance Curves for the various detection threshold voltages.  
0.7 V  
GND  
100%  
The delay time is approximated by  
t
D
1.2 × R × C  
D D  
50%  
OUTPUT VOLTAGE  
where:  
GND  
SL01601  
R
C
is C pin resistance (typically 1 MΩ)  
is the external delay time capacitor  
D
D
D
Figure 78. SA56615-XX delay time, t test circuit and diagram.  
D
The C (delay pin) threshold voltage, V  
is typically 0.5 × V  
.
D
TCD  
DD  
Figures 78 and 79 show the test circuits that are used to measure  
the reset delay time of the SA56615-XX and SA56616-XX  
V
DD  
2
respectively. The delay diagrams indicate how the measurement is  
to be made. The input voltage, V is switched from V + 2.0 V to  
V
IN  
IN  
SH  
C
OUT  
D
0.7 V. The delay time is measured from the falling edge of V to  
5
1
SA56616-XX  
IN  
where the C (delay pin) threshold voltage is 0.5 × V  
.
D
DD  
C
D
3
GND  
V
DD  
V
DD  
V
+2.0 V  
SH  
2
R
PU  
INPUT VOLTAGE  
0.7 V  
V
C
OUT  
RESET  
LOGIC  
SYSTEM  
IN  
D
5
1
SA56615-XX  
GND  
100%  
50%  
3
OUTPUT VOLTAGE  
GND  
GND  
SL01602  
Figure 79. SA56616-XX delay time, t test circuit and diagram.  
D
SL01596  
Figure 76. SA56615-XX application circuit.  
V
DD  
V
DD  
2
V
C
OUT  
RESET  
LOGIC  
SYSTEM  
IN  
D
5
1
SA56616-XX  
3
GND  
SL01597  
Figure 77. SA56616-XX application circuit.  
20  
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
PACKING METHOD  
The SA56615-XX and SA56616-XX are packed in reels, as shown in Figure 80.  
GUARD  
BAND  
TAPE  
TAPE DETAIL  
REEL  
ASSEMBLY  
COVER TAPE  
CARRIER TAPE  
BARCODE  
LABEL  
BOX  
SL01305  
Figure 80. Tape and reel packing method.  
21  
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
Plastic small outline package; 5 leads; body width 1.6 mm  
SOP003  
22  
2003 Oct 15  
Philips Semiconductors  
Product data  
SA56615-XX;  
SA56616-XX  
CMOS system reset with adjustable delay time  
REVISION HISTORY  
Rev  
Date  
Description  
_2  
20031015  
Product data (9397 750 12182). ECN 853-2332 30324 dated 09 September 2003.  
Supersedes data of 2002 Mar 25 (9397 750 10152).  
Modifications:  
• Change package outline version to SOP003 in Ordering information table and Package outline sections.  
_1  
20020325  
Product data (9397 750 10152). ECN 853-2332 27919 dated 25 March 2002.  
Data sheet status  
Product  
status  
Definitions  
[1]  
Level  
Data sheet status  
[2] [3]  
I
Objective data  
Development  
This data sheet contains data from the objective specification for product development.  
Philips Semiconductors reserves the right to change the specification in any manner without notice.  
II  
Preliminary data  
Qualification  
Production  
This data sheet contains data from the preliminary specification. Supplementary data will be published  
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in  
order to improve the design and supply the best possible product.  
III  
Product data  
This data sheet contains data from the product specification. Philips Semiconductors reserves the  
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant  
changes will be communicated via a Customer Product/Process Change Notification (CPCN).  
[1] Please consult the most recently issued data sheet before initiating or completing a design.  
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL  
http://www.semiconductors.philips.com.  
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see  
the relevant data sheet or data handbook.  
Limitingvaluesdefinition— Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting  
values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given  
in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no  
representation or warranty that such applications will be suitable for the specified use without further testing or modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be  
expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree  
to fully indemnify Philips Semiconductors for any damages resulting from such application.  
Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described  
or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated  
viaaCustomerProduct/ProcessChangeNotification(CPCN).PhilipsSemiconductorsassumesnoresponsibilityorliabilityfortheuseofanyoftheseproducts,conveys  
nolicenseortitleunderanypatent, copyright, ormaskworkrighttotheseproducts, andmakesnorepresentationsorwarrantiesthattheseproductsarefreefrompatent,  
copyright, or mask work right infringement, unless otherwise specified.  
Koninklijke Philips Electronics N.V. 2003  
Contact information  
All rights reserved. Printed in U.S.A.  
For additional information please visit  
http://www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
Date of release: 10-03  
9397 750 12182  
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Philips  
Semiconductors  

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