PSMN3R5-80ES [NXP]
N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK; N沟道80 V，在I2PAK 3.5 mΩ的标准电平MOSFET
| 型号： | PSMN3R5-80ES |
| 厂家： | 
NXP |
| 描述： | N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK |
| 文件： | 总15页 (文件大小：229K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PSMN3R5-80ES
K
A
I2P
N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK
Rev. 02 — 19 April 2011
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel MOSFET in I2PAK package qualified to 175C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits
High efficiency due to low switching
Suitable for standard level gate drive
and conduction losses
1.3 Applications
DC-to-DC converters
Load switch
Motor control
Server power supplies
1.4 Quick reference data
Table 1.
Symbol
VDS
Quick reference data
Parameter
Conditions
Min Typ Max Unit
drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C
-
-
-
-
80
V
A
[1]
ID
drain current
Tmb = 25 °C; VGS = 10 V;
see Figure 1
120
Ptot
Tj
total power
dissipation
Tmb = 25 °C; see Figure 2
-
-
-
338
W
junction temperature
-55
175 °C
Static characteristics
RDSon drain-source on-state VGS = 10 V; ID = 25 A;
resistance Tj = 100 °C; see Figure 12
GS = 10 V; ID = 25 A;
-
-
5
3
5.8
3.5
mΩ
[2]
V
mΩ
Tj = 25 °C; see Figure 13
Dynamic characteristics
QGD
gate-drain charge
total gate charge
VGS = 10 V; ID = 75 A;
-
-
27
-
-
nC
nC
VDS = 40 V; see Figure 14;
QG(tot)
139
see Figure 15
Avalanche ruggedness
EDS(AL)S
non-repetitive
drain-source
avalanche energy
V
GS = 10 V; Tj(init) = 25 °C;
-
-
676 mJ
ID = 120 A; Vsup ≤ 80 V;
RGS = 50 Ω; unclamped
PSMN3R5-80ES
NXP Semiconductors
N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK
[1] Continuous current is limited by package.
[2] Measured 3 mm from package.
2. Pinning information
Table 2.
Pinning information
Symbol Description
Pin
1
Simplified outline
Graphic symbol
G
D
S
D
gate
mb
D
S
2
drain
source
drain
3
G
mb
mbb076
1
2 3
SOT226 (I2PAK)
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name
Description
Version
PSMN3R5-80ES
I2PAK
plastic single-ended package (I2PAK); TO-262
SOT226
PSMN3R5-80ES
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 19 April 2011
2 of 15
PSMN3R5-80ES
NXP Semiconductors
N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
Parameter
Conditions
Min
Max
80
Unit
V
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
Tj ≥ 25 °C; Tj ≤ 175 °C
Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ
-
VDGR
VGS
-
80
V
-20
20
V
[1]
[1]
ID
VGS = 10 V; Tmb = 100 °C; see Figure 1
VGS = 10 V; Tmb = 25 °C; see Figure 1
-
-
-
120
120
803
A
A
IDM
peak drain current
pulsed; tp ≤ 10 µs; Tmb = 25 °C;
A
see Figure 3
Ptot
Tstg
Tj
total power dissipation
storage temperature
Tmb = 25 °C; see Figure 2
-
338
175
175
260
W
-55
-55
-
°C
°C
°C
junction temperature
Tsld(M)
peak soldering temperature
Source-drain diode
[1]
IS
source current
peak source current
Tmb = 25 °C
-
-
120
803
A
A
ISM
pulsed; tp ≤ 10 µs; Tmb = 25 °C
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source
avalanche energy
VGS = 10 V; Tj(init) = 25 °C; ID = 120 A;
Vsup ≤ 80 V; RGS = 50 Ω; unclamped
-
676
mJ
[1] Continuous current is limited by package.
03aa16
003aaf615
120
240
ID
(A)
P
(%)
der
180
80
120
(1)
40
60
0
0
0
50
100
150
Tmb ( C)
200
0
50
100
150
200
°
T
mb
(°C)
Fig 1. Continuous drain current as a function of
mounting base temperature
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
PSMN3R5-80ES
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 19 April 2011
3 of 15
PSMN3R5-80ES
NXP Semiconductors
N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK
003aaf614
103
ID
Limit RDSon = VDS / ID
t =10
p
s
μ
(A)
102
100
s
μ
10
1
DC
1 ms
10 ms
100 ms
10-1
10-1
1
10
102
103
V DS (V)
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
PSMN3R5-80ES
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 19 April 2011
4 of 15
PSMN3R5-80ES
NXP Semiconductors
N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Thermal characteristics
Parameter
Conditions
Min
Typ
Max
Unit
thermal resistance from junction to
mounting base
see Figure 4
-
0.22
0.44
K/W
Rth(j-a)
thermal resistance from junction to
ambient
Vertical in free air
-
60
-
K/W
003aaf613
1
Z
th(j-mb)
(K/W)
δ = 0.5
10-1
0.2
0.1
0.05
0.02
tp
δ =
10-2
P
T
single shot
t
tp
T
10-3
10-6
10-5
10-4
10-3
10-2
10-1
1
t
(s)
p
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration
PSMN3R5-80ES
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 19 April 2011
5 of 15
PSMN3R5-80ES
NXP Semiconductors
N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK
6. Characteristics
Table 6.
Symbol
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
Static characteristics
V(BR)DSS drain-source breakdown
voltage
ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 250 µA; VGS = 0 V; Tj = 25 °C
73
80
1
-
-
-
-
-
-
V
V
V
VGS(th)
gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 10
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 10
-
-
4.6
4
V
V
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 10; see Figure 11
2
3
IDSS
drain leakage current
gate leakage current
VDS = 80 V; VGS = 0 V; Tj = 25 °C
VDS = 80 V; VGS = 0 V; Tj = 175 °C
VGS = -20 V; VDS = 0 V; Tj = 25 °C
VGS = 20 V; VDS = 0 V; Tj = 25 °C
-
-
-
-
-
0.02
10
µA
µA
nA
nA
mΩ
-
500
100
100
8.4
IGSS
-
-
RDSon
drain-source on-state
resistance
VGS = 10 V; ID = 25 A; Tj = 175 °C;
see Figure 12
7.2
VGS = 10 V; ID = 25 A; Tj = 100 °C;
see Figure 12
-
-
-
5
5.8
3.5
-
mΩ
mΩ
Ω
[1]
VGS = 10 V; ID = 25 A; Tj = 25 °C;
3
see Figure 13
RG
internal gate resistance (AC)
f = 1 MHz
0.9
Dynamic characteristics
QG(tot)
total gate charge
ID = 0 A; VDS = 0 V; VGS = 10 V
-
-
-
-
135
139
51
-
-
-
-
nC
nC
nC
nC
ID = 75 A; VDS = 40 V; VGS = 10 V;
see Figure 14; see Figure 15
QGS
gate-source charge
QGS(th)
pre-threshold gate-source
charge
30
QGS(th-pl)
post-threshold gate-source
charge
-
21
-
nC
QGD
gate-drain charge
-
-
27
-
-
nC
V
VGS(pl)
gate-source plateau voltage
ID = 25 A; VDS = 40 V;
5.8
see Figure 14; see Figure 15
Ciss
Coss
Crss
td(on)
tr
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
VDS = 40 V; VGS = 0 V; f = 1 MHz;
Tj = 25 °C; see Figure 16
-
-
-
-
-
-
-
9961
847
401
41
-
-
-
-
-
-
-
pF
pF
pF
ns
ns
ns
ns
VDS = 40 V; RL = 0.53 Ω;
VGS = 10 V; RG(ext) = 10 Ω; ID = 75 A
43
td(off)
tf
turn-off delay time
fall time
109
44
PSMN3R5-80ES
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 19 April 2011
6 of 15
PSMN3R5-80ES
NXP Semiconductors
N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK
Table 6.
Symbol
Characteristics …continued
Parameter
Conditions
Min
Typ
Max
Unit
Source-drain diode
VSD
source-drain voltage
IS = 25 A; VGS = 0 V; Tj = 25 °C;
see Figure 17
-
0.8
1.2
V
trr
reverse recovery time
recovered charge
IS = 25 A; dIS/dt = 100 A/µs;
VGS = 0 V; VDS = 20 V
-
-
63
-
-
ns
Qr
121
nC
[1] Measured 3 mm from package.
003aaf602
003aaf603
250
75
g
fs
(S)
I
D
(A)
200
50
150
100
50
25
T = 175
j
C
°
T = 25
C
°
j
0
0
0
20
40
60
80
0
2
4
6
V
(V)
GS
I
(A)
D
Fig 5. Forward transconductance as a function of
drain current; typical values
Fig 6. Transfer characteristics: drain current as a
function of gate-source voltage; typical values
003aaf604
003aaf606
30
16000
R
(m
DSon
C
(pF)
)
Ω
C
iss
25
20
15
10
5
12000
C
rss
8000
4000
0
0
0
5
10
15
20
10-1
1
10
102
(V)
V
GS
V
(V)
GS
Fig 7. Drain-source on-state resistance as a function
of gate-source voltage; typical values
Fig 8. Input and reverse transfer capacitances as a
function of gate-source voltage; typical values
PSMN3R5-80ES
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 19 April 2011
7 of 15
PSMN3R5-80ES
NXP Semiconductors
N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK
003aad280
003aad685
5
160
5.5
5
6
8
10
V
GS(th)
(V)
I
D
(A)
4
3
2
1
0
max
120
typ
4.5
80
40
0
min
V
(V) = 4
GS
0
0.5
1
1.5
2
−60
0
60
120
180
V
DS
(V)
T (°C)
j
Fig 9. Output characteristics: drain current as a
function of drain-source voltage; typical values
Fig 10. Gate-source threshold voltage as a function of
junction temperature
03aa35
003aaf608
−1
10
3
I
D
a
(A)
min
typ
max
−2
−3
−4
−5
−6
10
2.4
10
10
10
10
1.8
1.2
0.6
0
0
2
4
6
-60
0
60
120
180
T ( C)
°
j
V
GS
(V)
Fig 11. Sub-threshold drain current as a function of
gate-source voltage
Fig 12. Normailzed drain-source on-state resistance
factor as a function of junction temperature
PSMN3R5-80ES
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 19 April 2011
8 of 15
PSMN3R5-80ES
NXP Semiconductors
N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK
003aaf612
15
V
DS
R
DSon
(mΩ)
12.5
I
D
V
(V) = 4.5
GS
10
7.5
5
V
GS(pl)
V
GS(th)
V
GS
Q
GS1
Q
GS2
5.5
Q
GS
Q
GD
6.0
2.5
0
Q
G(tot)
20.0
003aaa508
0
10
20
30
40
I (A)
D
Fig 13. Drain-source on-state resistance as a function
of drain current; typical values
Fig 14. Gate charge waveform definitions
003aaf609
003aaf610
10
105
C
(pF)
V
(V)
GS
40V 64V
104
103
102
10
C
7.5
iss
V
= 16V
DS
5
2.5
0
C
oss
C
rss
0
40
80
120
160
(nC)
10-1
1
10
102
V
(V)
Q
DS
G
Fig 15. Gate-source voltage as a function of gate
charge; typical values
Fig 16. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
PSMN3R5-80ES
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 19 April 2011
9 of 15
PSMN3R5-80ES
NXP Semiconductors
N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK
003aaf611
25
I
S
(A)
20
15
10
5
T = 175
j
C
T = 25 C
°
j
°
0
0
0.25
0.5
0.75
1
V
(V)
SD
Fig 17. Source current as a function of source-drain voltage; typical values
PSMN3R5-80ES
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 19 April 2011
10 of 15
PSMN3R5-80ES
NXP Semiconductors
N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK
7. Package outline
Plastic single-ended package (I2PAK); low-profile 3-lead TO-262
SOT226
A
A
1
E
D
1
mounting
base
D
L
1
Q
b
1
L
1
e
2
3
b
c
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
D
max
D
1
A
1
b
c
E
UNIT
A
b
e
L
L
Q
1
1
4.5
4.1
1.40
1.27
0.85
0.60
1.3
1.0
0.7
0.4
1.6
1.2
10.3
9.7
15.0
13.5
3.30
2.79
2.6
2.2
mm
11
2.54
REFERENCES
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
JEDEC
JEITA
06-02-14
09-08-25
SOT226
TO-262
Fig 18. Package outline SOT226 (I2PAK)
PSMN3R5-80ES
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 19 April 2011
11 of 15
PSMN3R5-80ES
NXP Semiconductors
N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK
8. Revision history
Table 7.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PSMN3R5-80ES v.2
Modifications:
20110419
Product data sheet
-
PSMN3R5-80ES v.1
• Status changed from objective to product.
• Various changes to content.
PSMN3R5-80ES v.1
20101224
Objective data sheet
-
-
PSMN3R5-80ES
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 19 April 2011
12 of 15
PSMN3R5-80ES
NXP Semiconductors
N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK
9. Legal information
9.1 Data sheet status
Document status [1] [2]
Product status [3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product
status information is available on the Internet at URL http://www.nxp.com.
Right to make changes — NXP Semiconductors reserves the right to make
9.2 Definitions
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Preview — The document is a preview version only. The document is still
subject to formal approval, which may result in modifications or additions.
NXP Semiconductors does not give any representations or warranties as to
the accuracy or completeness of information included herein and shall have
no liability for the consequences of use of such information.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
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representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
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data sheet shall define the specification of the product as agreed between
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Product data sheet.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
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Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
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damage, costs or problem which is based on any weakness or default in the
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the products or of the application or use by customer’s third party
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contract or any other legal theory.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
PSMN3R5-80ES
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 19 April 2011
13 of 15
PSMN3R5-80ES
NXP Semiconductors
N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK
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standard warranty and NXP Semiconductors’ product specifications.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
9.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Export control — This document as well as the item(s) described herein may
be subject to export control regulations. Export might require a prior
authorization from national authorities.
Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,
FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,
ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,
QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,
TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
HD Radio and HD Radio logo — are trademarks of iBiquity Digital
Corporation.
non-automotive qualified products in automotive equipment or applications.
10. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
PSMN3R5-80ES
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 19 April 2011
14 of 15
PSMN3R5-80ES
NXP Semiconductors
N-channel 80 V, 3.5 mΩ standard level MOSFET in I2PAK
11. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
General description . . . . . . . . . . . . . . . . . . . . . .1
Features and benefits. . . . . . . . . . . . . . . . . . . . .1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Quick reference data . . . . . . . . . . . . . . . . . . . . .1
1.1
1.2
1.3
1.4
2
3
4
5
6
7
8
Pinning information. . . . . . . . . . . . . . . . . . . . . . .2
Ordering information. . . . . . . . . . . . . . . . . . . . . .2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
Thermal characteristics . . . . . . . . . . . . . . . . . . .5
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .6
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .11
Revision history. . . . . . . . . . . . . . . . . . . . . . . . .12
9
Legal information. . . . . . . . . . . . . . . . . . . . . . . .13
Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .14
9.1
9.2
9.3
9.4
10
Contact information. . . . . . . . . . . . . . . . . . . . . .14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 19 April 2011
Document identifier: PSMN3R5-80ES
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