PHD3055ET/R [NXP]

TRANSISTOR 10.3 A, 60 V, 0.15 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-252, PLASTIC, SC-63, DPAK-3, FET General Purpose Power;
PHD3055ET/R
型号: PHD3055ET/R
厂家: NXP    NXP
描述:

TRANSISTOR 10.3 A, 60 V, 0.15 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-252, PLASTIC, SC-63, DPAK-3, FET General Purpose Power

晶体 晶体管 功率场效应晶体管 开关 脉冲
文件: 总7页 (文件大小:76K)
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Philips Semiconductors  
Product specification  
PowerMOS transistor  
PHD3055E  
GENERAL DESCRIPTION  
QUICK REFERENCE DATA  
N-channel enhancement mode  
field-effect power transistor in a  
plastic envelope suitable for surface  
mounting featuring high avalanche  
energy capability, stable blocking  
voltage, fast switching and high  
thermalcycling performance withlow  
thermal resistance. Intended for use  
in Switched Mode Power Supplies  
(SMPS), motor control circuits and  
SYMBOL  
PARAMETER  
MAX.  
UNIT  
VDS  
ID  
Drain-source voltage  
Drain current (DC)  
Total power dissipation  
Drain-source on-state resistance  
60  
12  
V
A
W
Ptot  
50  
RDS(ON)  
0.15  
general  
purpose  
switching  
applications.  
PINNING - SOT428  
PIN CONFIGURATION  
SYMBOL  
PIN  
1
DESCRIPTION  
tab  
d
gate  
2
drain  
source  
g
3
2
s
tab drain  
1
3
LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134)  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
ID  
Continuous drain current  
Tmb = 25 ˚C; VGS = 10 V  
Tmb = 100 ˚C; VGS = 10 V  
Tmb = 25 ˚C  
-
-
-
-
-
-
-
12  
9
A
A
IDM  
PD  
Pulsed drain current  
Total dissipation  
48  
A
Tmb = 25 ˚C  
50  
W
PD/Tmb Linear derating factor  
Tmb > 25 ˚C  
0.33  
± 30  
25  
W/K  
V
VGS  
EAS  
Gate-source voltage  
Single pulse avalanche  
energy  
V
DD 50 V; starting Tj = 25˚C; RGS = 50 ;  
VGS = 10 V  
DD 50 V; starting Tj = 25˚C; RGS = 50 ;  
VGS = 10 V  
mJ  
IAS  
Peak avalanche current  
V
-
6
A
Tj, Tstg  
Operating junction and  
storage temperature range  
- 55  
175  
˚C  
THERMAL RESISTANCES  
SYMBOL PARAMETER  
CONDITIONS  
TYP.  
MAX.  
UNIT  
Rth j-mb  
Thermal resistance junction to  
-
3
K/W  
mounting base  
Rth j-a  
Thermal resistance junction to  
ambient  
pcb mounted, minimum  
footprint  
50  
-
K/W  
September 1997  
1
Rev 1.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
PHD3055E  
ELECTRICAL CHARACTERISTICS  
Tj = 25 ˚C unless otherwise specified  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
V(BR)DSS  
Drain-source breakdown  
voltage  
VGS = 0 V; ID = 0.25 mA  
60  
-
-
-
-
V
V(BR)DSS  
Tj  
/
Drain-source breakdown  
voltage temperature coefficient  
Drain-source on resistance  
Gate threshold voltage  
Forward transconductance  
Drain-source leakage current  
VDS = VGS; ID = 0.25 mA  
0.08  
V/K  
RDS(ON)  
VGS(TO)  
gfs  
VGS = 10 V; ID = 6 A  
VDS = VGS; ID = 0.25 mA  
VDS = 50 V; ID = 6 A  
VDS = 60 V; VGS = 0 V  
VDS = 48 V; VGS = 0 V; Tj = 150 ˚C  
VGS = ±30 V; VDS = 0 V  
-
2.0  
2.4  
-
-
-
0.1  
3.0  
4.0  
0.1  
1
0.15  
4.0  
-
25  
250  
100  
V
S
µA  
µA  
nA  
IDSS  
IGSS  
Gate-source leakage current  
10  
Qg(tot)  
Qgs  
Qgd  
Total gate charge  
Gate-source charge  
Gate-drain (Miller) charge  
ID = 10 A; VDD = 48 V; VGS = 10 V  
-
-
-
10  
2
5.6  
12  
3
7
nC  
nC  
nC  
td(on)  
tr  
td(off)  
tf  
Turn-on delay time  
Turn-on rise time  
Turn-off delay time  
Turn-off fall time  
VDD = 30 V; ID = 10 A;  
RG = 24 ; RD = 2.7 Ω  
-
-
-
-
8
-
-
-
-
ns  
ns  
ns  
ns  
55  
25  
22  
Ld  
Ls  
Internal drain inductance  
Internal source inductance  
Measured from tab to centre of die  
Measured from source lead solder  
point to source bond pad  
-
-
3.5  
7.5  
-
-
nH  
nH  
Ciss  
Coss  
Crss  
Input capacitance  
Output capacitance  
Feedback capacitance  
VGS = 0 V; VDS = 25 V; f = 1 MHz  
-
-
-
220  
108  
48  
-
-
-
pF  
pF  
pF  
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS  
Tj = 25 ˚C unless otherwise specified  
SYMBOL PARAMETER  
CONDITIONS  
MIN. TYP. MAX. UNIT  
IS  
Continuous source current  
Tmb = 25˚C  
-
-
12  
A
(body diode)  
ISM  
Pulsed source current (body  
diode)  
Diode forward voltage  
Tmb = 25˚C  
-
-
48  
A
VSD  
trr  
IS = 10 A; VGS = 0 V  
-
-
-
1.5  
-
V
Reverse recovery time  
IS = 10 A; VGS = 0 V;  
dI/dt = 100 A/µs  
38  
ns  
Qrr  
Reverse recovery charge  
-
0.1  
-
µC  
September 1997  
2
Rev 1.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
PHD3055E  
Normalised Power Derating  
Zth j-mb, Transient Thermal Impedance (K/W)  
PD%  
120  
10  
1
110  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
0.5  
0.2  
0.1  
0.05  
0.1  
0.01  
0.02  
t
p
t
p
P
D =  
D
T
0
t
T
0
20  
40  
60  
80  
Tmb /  
100 120 140 160 180  
C
10us  
1ms  
100us 10ms  
tp, pulse widtht (s)  
1us  
0.1s  
1s  
10s  
Fig.1. Normalised power dissipation.  
PD% = 100 PD/PD 25 ˚C = f(Tmb)  
Fig.4. Transient thermal impedance.  
Zth j-mb = f(t); parameter D = tp/T  
Normalised Current Derating  
ID%  
7 V  
ID, Drain current (Amps)  
120  
110  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
15  
10  
5
Tj = 25 C  
10 V  
6.5 V  
6 V  
5.5 V  
5 V  
VGS = 4.5 V  
0
0
20  
40  
60  
80  
100 120 140 160 180  
0
5
10  
15  
20  
25  
30  
VDS, Drain-Source voltage (Volts)  
Tmb /  
C
Fig.2. Normalised continuous drain current.  
ID% = 100 ID/ID 25 ˚C = f(Tmb); conditions: VGS 10 V  
Fig.5. Typical output characteristics.  
ID = f(VDS); parameter VGS  
ID, Drain current (Amps)  
RDS(on), Drain-Source on resistance (Ohms)  
100  
10  
1
0.4  
0.3  
0.2  
0.1  
0
6 V  
7 V  
5.5 V  
6.5 V  
tp = 10 us  
RDS(ON) = VDS/ID  
100 us  
1 ms  
DC  
10 ms  
100 ms  
10 V  
VGS = 15 V  
Tj = 25 C  
0.1  
0
5
10  
15  
20  
1
10  
100  
1000  
VDS, Drain-source voltage (Volts)  
ID, Drain current (Amps)  
Fig.3. Safe operating area. Tmb = 25 ˚C  
ID & IDM = f(VDS); IDM single pulse; parameter tp  
Fig.6. Typical on-state resistance.  
RDS(ON) = f(ID); parameter VGS  
September 1997  
3
Rev 1.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
PHD3055E  
VGS(TO) / V  
Tj = 175 C  
ID, Drain current (Amps)  
15  
max.  
VDS = 30 V  
4
3
2
1
0
Tj = 25 C  
typ.  
10  
min.  
5
0
-60  
-20  
20  
60  
Tj /  
100  
140  
180  
0
2
4
6
8
10  
VGS, Gate-source voltage (Volts)  
C
Fig.7. Typical transfer characteristics.  
ID = f(VGS); parameter Tj  
Fig.10. Gate threshold voltage.  
VGS(TO) = f(Tj); conditions: ID = 0.25 mA; VDS = VGS  
SUB-THRESHOLD CONDUCTION  
ID / A  
gfs, Transconductance (S)  
VDD = 30 V  
1E-01  
1E-02  
1E-03  
1E-04  
1E-05  
1E-06  
4
3
2
1
0
Tj = 25 C  
Tj = 175 C  
2 %  
typ  
98 %  
0
1
2
3
4
0
5
10  
15  
ID, Drain current (Amps)  
VGS / V  
Fig.8. Typical transconductance.  
gfs = f(ID); parameter Tj  
Fig.11. Sub-threshold drain current.  
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS  
a
Ciss, Coss, Crss, Junction capacitances (pF)  
Normalised RDS(ON) = f(Tj)  
2.0  
1.5  
1.0  
0.5  
0
1000  
100  
10  
Ciss  
Coss  
Crss  
-60  
-20  
20  
60  
Tj /  
100  
140  
180  
1
10  
100  
VDS, Drain-source voltage (Volts)  
C
Fig.9. Normalised drain-source on-state resistance.  
a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 10 A; VGS = 10 V  
Fig.12. Typical capacitances, Ciss, Coss, Crss.  
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz  
September 1997  
4
Rev 1.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
PHD3055E  
VGS, Gate-Source voltage (Volts)  
15  
48 V  
IF, Source-drain diode current (Amps)  
VGS = 0 V  
20  
15  
10  
5
ID = 10 A  
Tj = 25 C  
VDS = 30 V  
Tj = 25 C  
Tj = 175 C  
10  
5
0
0
0
5
10  
15  
0
0.5  
1
1.5  
Qg, Gate charge (nC)  
VSDS, Source-drain voltage (Volts)  
Fig.13. Typical turn-on gate-charge characteristics.  
VGS = f(QG); parameter VDS  
Fig.16. Source-Drain diode characteristic.  
IF = f(VSDS); parameter Tj  
EAS, Normalised unclamped inductive energy (%)  
Switching times (ns)  
1000  
100  
10  
120  
VDD = 30 V  
VGS = 10 V  
RD = 2.7 Ohms  
ID = 10 A  
Tj = 25 C  
110  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
tr  
td(off)  
tf  
td(on)  
1
0
20  
40  
60  
80  
100  
20  
40  
60  
80  
100 120 140 160 180  
RG, Gate resistance (Ohms)  
Starting Tj ( C)  
Fig.14. Typical switching times.  
td(on), tr, td(off), tf = f(RG)  
Fig.17. Normalised unclamped inductive energy.  
EAS% = f(Tj)  
Normalised Drain-source breakdown voltage  
V(BR)DSS @ Tj  
1.15  
1.1  
VDD  
V(BR)DSS @ 25 C  
+
L
1.05  
1
VDS  
-
VGS  
-ID/100  
T.U.T.  
0
0.95  
0.9  
R 01  
RGS  
shunt  
0.85  
-100  
-50  
0
50  
100  
150  
Tj, Junction temperature (C)  
Fig.18. Unclamped inductive test circuit.  
Fig.15. Normalised drain-source breakdown voltage.  
V(BR)DSS/V(BR)DSS 25 ˚C = f(Tj)  
EAS = 0.5 LID2 V(BR)DSS/(V(BR)DSS VDD  
)
September 1997  
5
Rev 1.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
PHD3055E  
MECHANICAL DATA  
Dimensions in mm : Net Mass: 1.4 g  
seating plane  
1.1  
2.38 max  
0.93 max  
5.4  
6.73 max  
tab  
4 min  
4.6  
6.22 max  
0.5 min  
10.4 max  
0.5  
2
0.3  
0.5  
3
1
0.8 max  
(x2)  
2.285 (x2)  
Fig.19. SOT428 : centre pin connected to mounting base.  
MOUNTING INSTRUCTIONS  
Dimensions in mm  
7.0  
7.0  
2.15  
2.5  
1.5  
4.57  
Fig.20. SOT428 : soldering pattern for surface mounting.  
Notes  
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent  
damage to MOS gate oxide.  
2. Epoxy meets UL94 V0 at 1/8".  
September 1997  
6
Rev 1.000  
Philips Semiconductors  
Product specification  
PowerMOS transistor  
PHD3055E  
DEFINITIONS  
Data sheet status  
Objective specification  
This data sheet contains target or goal specifications for product development.  
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.  
Product specification  
This data sheet contains final product specifications.  
Limiting values  
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and  
operation of the device at these or at any other conditions above those given in the Characteristics sections of  
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
Philips Electronics N.V. 1998  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the  
copyright owner.  
The information presented in this document does not form part of any quotation or contract, it is believed to be  
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any  
consequence of its use. Publication thereof does not convey nor imply any license under patent or other  
industrial or intellectual property rights.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices or systems where malfunction of these  
products can be reasonably expected to result in personal injury. Philips customers using or selling these products  
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting  
from such improper use or sale.  
September 1997  
7
Rev 1.000  

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