PCK2002PLPW [NXP]

533 MHz PCI-X clock buffer; 533 MHz的PCI-X时钟缓冲器
PCK2002PLPW
型号: PCK2002PLPW
厂家: NXP    NXP
描述:

533 MHz PCI-X clock buffer
533 MHz的PCI-X时钟缓冲器

PC 时钟
文件: 总8页 (文件大小:63K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
PCK2002PL  
533 MHz PCI-X clock buffer  
Product data  
2002 Oct 10  
Supersedes data of 2002 Mar 15  
Philips  
Semiconductors  
Philips Semiconductors  
Product data  
533 MHz PCI-X clock buffer  
PCK2002PL  
FEATURES  
PIN CONFIGURATION  
General purpose and PCI-X 1:4 clock buffer  
BUF_OUT3  
BUF_OUT2  
8
7
6
5
1
8-pin TSSOP 3.1 × 4.4 mm package  
Same form, fit, and function as CDCV304  
See PCK2001P for 3.1 × 3.1 mm TSSOP-8 package  
See PCK2001 or PCK2002 for 48-pin 1:18 buffer part  
See PCK2001M ro PCK2002M for 28-pin 1:10 buffer part  
See PCK2001R for 16-pin 1:6 buffer part  
Operating frequency: 0 – 533 MHz  
BUF_IN  
OE  
2
3
4
V
BUF_OUT0  
DD  
V
BUF_OUT1  
SS  
TOP VIEW  
SA00569  
PIN DESCRIPTION  
Part-to-part skew < 500 ps  
PIN  
NUMBER  
I/O  
TYPE  
SYMBOL  
BUF_IN  
FUNCTION  
Low output skew: <200 ps  
3.3 V operation  
1
Input  
Buffered clock input  
ESD classification testing is done to JEDEC Standard JESD22.  
BUF_OUT  
(0–3)  
3, 5, 7, 8  
Output  
Buffered clock outputs  
Protection exceeds 2000 V to HBM per method A114.  
6
2
4
Input  
Input  
Input  
V
3.3 V supply  
Output Enable  
Ground  
DD  
OE  
DESCRIPTION  
The PCK2002PL is a 1–4 fanout buffer used as a high-performance,  
low skew, general purpose and PCI-X clock buffer. It distributes one  
V
SS  
input clock (BUF_IN) signal to four output clocks (BUF_OUT ).  
n
QUICK REFERENCE DATA  
SYMBOL  
PARAMETER  
CONDITIONS  
= 3.3 V, C = 25 pF  
TYPICAL  
UNIT  
t
t
Propagation delay  
2.9  
2.8  
PLH  
PHL  
V
ns  
CC  
L
BUF_IN to BUF_OUT  
Rise time  
n
t
r
V
CC  
V
CC  
V
CC  
= 3.3 V, C = 10 pF, 0.2V to 0.6V  
450  
400  
50  
ps  
ps  
µA  
L
DD  
DD  
DD  
t
f
Fall time  
= 3.3 V, C = 10 pF, 0.6V to 0.2V  
L DD  
I
Total supply current  
= 3.6 V  
CC  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE  
ORDER CODE  
DRAWING NUMBER  
8-Pin Plastic TSSOP  
–40 to +85 °C  
PCK2002PLPW  
SOT530-1  
2
2002 Oct 10  
Philips Semiconductors  
Product data  
533 MHz PCI-X clock buffer  
PCK2002PL  
FUNCTION TABLE  
OE  
L
BUF_IN  
BUF_OUTn  
X
L
L
L
H
H
H
H
1, 2  
ABSOLUTE MAXIMUM RATINGS  
In accordance with the Absolute Maximum Rating System (IEC 134).  
Voltages are referenced to V (V = 0 V).  
SS  
SS  
LIMITS  
SYMBOL  
PARAMETER  
CONDITION  
UNIT  
MIN  
–0.5  
MAX  
+4.3  
–50  
V
I
DC 3.3 V supply voltage  
DC input diode current  
DC input voltage  
V
mA  
V
DD  
V < 0  
I
IK  
V
I
Note 2  
–0.5  
V + 0.5  
DD  
I
DC output diode current  
DC output voltage  
V
O
> V or V < 0  
±50  
+ 0.5  
DD  
mA  
V
OK  
DD  
O
V
O
Note 2  
–0.5  
V
I
O
DC output source or sink current  
Storage temperature range  
V
O
0 to V  
±50  
mA  
°C  
DD  
T
stg  
–65  
+150  
Power dissipation per package  
plastic medium-shrink SO (SSOP)  
For temperature range: 0 to +70 °C  
above +55 °C derate linearly with 11.3 mW/K  
P
tot  
850  
mW  
NOTES:  
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the  
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to  
absolute-maximum-rated conditions for extended periods may affect device reliability.  
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
RECOMMENDED OPERATING CONDITIONS  
LIMITS  
SYMBOL  
PARAMETER  
CONDITIONS  
UNIT  
MIN  
3.0  
20  
0
MAX  
3.6  
V
DD  
DC 3.3V supply voltage  
V
pF  
V
C
Capacitive load  
30  
L
V
I
DC input voltage range  
V
DD  
V
DD  
V
O
DC output voltage range  
0
V
T
amb  
Operating ambient temperature range in free air  
–40  
+85  
°C  
3
2002 Oct 10  
Philips Semiconductors  
Product data  
533 MHz PCI-X clock buffer  
PCK2002PL  
DC CHARACTERISTICS  
LIMITS  
= –40 to +85 °C  
TEST CONDITIONS  
OTHER  
SYMBOL  
PARAMETER  
T
UNIT  
amb  
V
(V)  
MIN  
MAX  
+ 0.3  
DD  
DD  
V
IH  
HIGH level input voltage  
LOW level input voltage  
3.0 to 3.6  
3.0 to 3.6  
3.0 to 3.6  
3.0  
2.0  
V
V
V
V
IL  
V
SS  
DD  
– 0.3  
0.8  
I
= –1 mA  
= –24 mA  
= –12 mA  
V
– 0.2  
V
OH  
V
OH  
Output HIGH voltage  
Output LOW voltage  
I
2.0  
V
OH  
OH  
3.0  
I
2.4  
V
3.0 to 3.6  
3.0  
I
OL  
= 1 mA  
0.2  
0.8  
0.55  
V
V
OL  
I
OL  
I
OL  
= 24 mA  
= 12 mA  
V
3.0  
V
3.0  
V
OUT  
= 1 V  
–50  
mA  
mA  
mA  
mA  
µA  
µA  
I
Output HIGH current  
Output LOW current  
OH  
3.3  
V
V
= 1.65 V  
= 2.0 V  
–150  
OUT  
3.0  
V
OUT  
60  
I
OL  
3.3  
= 1.65 V  
150  
±5  
OUT  
±I  
I
Input leakage current  
3.6  
V = V or GND  
I
DD  
I
Quiescent supply current  
3.6  
V = V or GND  
I = 0  
O
100  
CC  
I
DD  
4
2002 Oct 10  
Philips Semiconductors  
Product data  
533 MHz PCI-X clock buffer  
PCK2002PL  
AC CHARACTERISTICS  
LIMITS  
= –40 to +85 °C  
TEST CONDITIONS  
NOTES  
T
amb  
SYMBOL  
PARAMETER  
UNIT  
6
MIN  
6.0  
6.0  
2.9  
3.0  
2.15  
2.5  
1.8  
1.8  
TYP  
MAX  
T
CLK HIGH time  
2
3
2
3
4
4
5
5
1
1
ns  
ns  
H
66 MHz  
T
CLK LOW time  
L
T
H
CLK HIGH time  
ns  
140 MHz  
T
L
CLK LOW time  
ns  
T
Output rise slew rate  
Output fall slew rate  
Buffer LH propagation delay  
Buffer HL propagation delay  
Bus CLK skew  
3.3  
3.3  
2.9  
2.8  
4.1  
4.4  
3.4  
3.4  
200  
500  
V/ns  
V/ns  
ns  
R
T
F
T
PLH  
PHL  
SKW  
T
ns  
T
ps  
T
Device to device skew  
ps  
DDSKW  
NOTES:  
1. CLK skew is only valid for equal loading of all outputs.  
2. T is measured at 0.5 V as shown in Figure 2.  
H
DD  
3. T is measured at 0.35 V as shown in Figure 2.  
L
DD  
4. T and T are measured as a transition through the threshold region 0.2 V to 0.6 V and 0.6 V to 0.2 V .  
R
F
DD  
DD  
DD  
DD  
5. Input edge rate for these tests must be faster than 1 V/ns.  
6. All typical values are at V = 3.3 V and T = 25 °C.  
CC  
amb  
AC WAVEFORMS  
TEST CIRCUIT  
V
= 50% V  
M
DD  
C = 10 pF  
L
V
V
DD  
DD  
V
OL  
and V are the typical output voltage drop that occur with the  
OH  
output load.  
140  
V
DD  
V
V
O
I
PULSE  
GENERATOR  
BUF_IN  
INPUT  
V
V
M
D.U.T.  
M
t
R
T
C
L
t
140 Ω  
PLH  
PHL  
0.6 V  
0.2 V  
0.6 V  
0.2 V  
DD  
DD  
V
V
M
M
DD  
DD  
BUF_OUT  
SW00813  
T
T
F
R
Figure 3. Load circuitry for switching times  
SW00811  
Figure 1. Load circuitry for switching times.  
t
p
t
h
0.5 V  
DD  
0.4 V  
0.35 V  
DD  
DD  
t
l
SW00812  
Figure 2. Buffer Output clock  
5
2002 Oct 10  
Philips Semiconductors  
Product data  
533 MHz PCI-X clock buffer  
PCK2002PL  
TSSOP8: plastic thin shrink small outline; 8 leads; body width 4.4 mm  
SOT530-1  
6
2002 Oct 10  
Philips Semiconductors  
Product data  
533 MHz PCI-X clock buffer  
PCK2002PL  
REVISION HISTORY  
Rev  
Date  
Description  
_3  
2002 Oct 10  
Product data (9397 750 10537); third version supersedes Product data second  
version, 2002 Mar 15.  
Engineering Change Notice: 853-2243 29056 (2002 Oct 09).  
Modifications:  
Update and change to Operating Frequency values.  
_2  
2002 Mar 15  
Product data, second version  
Engineering Change Notice: 853-2256 27859 (date: 2002 Mar 15).  
7
2002 Oct 10  
Philips Semiconductors  
Product data  
533 MHz PCI-X clock buffer  
PCK2002PL  
Data sheet status  
Product  
status  
Definitions  
[1]  
Level  
Data sheet status  
[2] [3]  
I
Objective data  
Development  
Qualification  
This data sheet contains data from the objective specification for product development.  
Philips Semiconductors reserves the right to change the specification in any manner without notice.  
II  
Preliminary data  
Product data  
This data sheet contains data from the preliminary specification. Supplementary data will be published  
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in  
order to improve the design and supply the best possible product.  
III  
Production  
This data sheet contains data from the product specification. Philips Semiconductors reserves the  
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant  
changes will be communicated via a Customer Product/Process Change Notification (CPCN).  
[1] Please consult the most recently issued data sheet before initiating or completing a design.  
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL  
http://www.semiconductors.philips.com.  
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see  
the relevant data sheet or data handbook.  
LimitingvaluesdefinitionLimiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting  
values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given  
in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no  
representation or warranty that such applications will be suitable for the specified use without further testing or modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be  
expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree  
to fully indemnify Philips Semiconductors for any damages resulting from such application.  
Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described  
or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated  
viaaCustomerProduct/ProcessChangeNotification(CPCN).PhilipsSemiconductorsassumesnoresponsibilityorliabilityfortheuseofanyoftheseproducts,conveys  
nolicenseortitleunderanypatent, copyright, ormaskworkrighttotheseproducts, andmakesnorepresentationsorwarrantiesthattheseproductsarefreefrompatent,  
copyright, or mask work right infringement, unless otherwise specified.  
Koninklijke Philips Electronics N.V. 2002  
Contact information  
All rights reserved. Printed in U.S.A.  
For additional information please visit  
http://www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
Date of release: 10-02  
9397 750 10537  
For sales offices addresses send e-mail to:  
sales.addresses@www.semiconductors.philips.com.  
Document order number:  
Philips  
Semiconductors  

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