PCF8575TS/1,112 [NXP]
PCF8575 - Remote 16-bit I/O expander for I2C-bus SSOP2 24-Pin;
| 型号： | PCF8575TS/1,112 |
| 厂家： | 
NXP |
| 描述： | PCF8575 - Remote 16-bit I/O expander for I2C-bus SSOP2 24-Pin PC 光电二极管 外围集成电路 |
| 文件： | 总24页 (文件大小：116K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
PCF8575
Remote 16-bit I/O expander for
I2C-bus
1999 Apr 07
Product specification
Supersedes data of 1999 Feb 25
File under Integrated Circuits, IC12
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
CONTENTS
1
2
3
4
5
6
FEATURES
GENERAL DESCRIPTION
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
CHARACTERISTICS OF THE I2C-BUS
6.1
6.2
6.3
6.4
Bit transfer
START and STOP conditions
System configuration
Acknowledge
7
FUNCTIONAL DESCRIPTION
7.1
7.2
7.3
7.4
7.5
Quasi-bidirectional I/Os
Addressing
Reading from a port (input mode)
Writing to the port (output mode)
Interrupt
8
LIMITING VALUES
9
HANDLING
10
11
12
13
14
14.1
CHARACTERISTICS
I2C-BUS TIMING CHARACTERISTICS
DEVICE PROTECTION
PACKAGE OUTLINE
SOLDERING
Introduction to soldering surface mount
packages
14.2
14.3
14.4
14.5
Reflow soldering
Wave soldering
Manual soldering
Suitability of surface mount IC packages for
wave and reflow soldering methods
15
16
17
DEFINITIONS
LIFE SUPPORT APPLICATIONS
PURCHASE OF PHILIPS I2C COMPONENTS
1999 Apr 07
2
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
1
FEATURES
• Operating supply voltage 2.5 to 5.5 V
• Low standby current consumption of 10 µA maximum
• I2C-bus to parallel port expander
• 400 kbits/s FAST I2C-bus
The device consists of a 16-bit quasi-bidirectional port and
an I2C-bus interface. The PCF8575 has a low current
consumption and includes latched outputs with high
current drive capability for directly driving LEDs. It also
possesses an interrupt line (INT) which can be connected
to the interrupt logic of the microcontroller. By sending an
interrupt signal on this line, the remote I/O can inform the
microcontroller if there is incoming data on its ports without
having to communicate via the I2C-bus. This means that
the PCF8575 is an I2C-bus slave transmitter/receiver.
• Open-drain interrupt output
• 16-bit remote I/O port for the I2C-bus
• Compatible with most microcontrollers
• Latched outputs with high current drive capability for
directly driving LEDs
• Address by 3 hardware address pins for use of up to
8 devices
• SSOP24 package.
Every data transmission from the PCF8575 must consist
of an even number of bytes, the first byte will be referred
to as P07 to P00 and the second byte as P17 to P10.
The third will be referred to as P07 to P00 and so on.
2
GENERAL DESCRIPTION
The PCF8575 is a silicon CMOS circuit. It provides general
purpose remote I/O expansion for most microcontroller
families via the two-line bidirectional bus (I2C-bus).
3
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
PCF8575TS
SSOP24
plastic shrink small outline package; 24 leads; body width 5.3 mm
SOT340-1
1999 Apr 07
3
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
4
BLOCK DIAGRAM
INT
1
INTERRUPT
LOGIC
LP FILTER
PCF8575
21
2
A0
A1
A2
3
22
23
P00 to P07
4 to 11
SCL
SDA
2
INPUT
FILTER
I C-BUS
SHIFT
REGISTER
I/O
PORT
CONTROL
16 BITS
P10 to P17
13 to 20
WRITE pulse
READ pulse
24
12
V
DD
POWER-ON
RESET
V
SS
MGL537
Fig.1 Block diagram.
1999 Apr 07
4
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
5
PINNING
SYMBOL
PIN
DESCRIPTION
INT
1
2
interrupt output (active LOW)
address input 1
A1
A2
3
address input 2
P00
P01
P02
P03
P04
P05
P06
P07
VSS
P10
P11
P12
P13
P14
P15
P16
P17
A0
4
quasi-bidirectional I/O 00
quasi-bidirectional I/O 01
quasi-bidirectional I/O 02
quasi-bidirectional I/O 03
quasi-bidirectional I/O 04
quasi-bidirectional I/O 05
quasi-bidirectional I/O 06
quasi-bidirectional I/O 07
supply ground
handbook, halfpage
INT
A1
1
2
3
4
5
6
7
8
9
24 V
DD
5
23 SDA
22 SCL
21 A0
6
A2
7
8
P00
P01
P02
P03
P04
P05
9
20 P17
19 P16
18 P15
17 P14
16 P13
15 P12
14 P11
13 P10
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
PCF8575
quasi-bidirectional I/O 10
quasi-bidirectional I/O 11
quasi-bidirectional I/O 12
quasi-bidirectional I/O 13
quasi-bidirectional I/O 14
quasi-bidirectional I/O 15
quasi-bidirectional I/O 16
quasi-bidirectional I/O 17
address input 0
P06 10
P07 11
V
12
SS
MGL538
SCL
SDA
VDD
serial clock line input
serial data line input/output
supply voltage
Fig.2 Pin configuration.
1999 Apr 07
5
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
CHARACTERISTICS OF THE I2C-BUS
6.4
Acknowledge
6
The I2C-bus is for bidirectional, 2-line communication
between different ICs or modules. The two lines are a
serial data line (SDA) and a serial clock line (SCL). Both
lines must be connected to a positive supply via a pull-up
resistor when connected to the output stages of a device.
Data transfer may be initiated only when the bus is not
busy.
The number of data bytes transferred between the START
and the STOP conditions from transmitter to receiver is not
limited. Each byte of eight bits is followed by one
acknowledge bit. The transmitter must release the SDA
line before the receiver can send an acknowledge bit.
A slave receiver which is addressed must generate an
acknowledge after the reception of each byte. Also a
master must generate an acknowledge after the reception
of each byte that has been clocked out of the slave
transmitter. The device that acknowledges has to pull
down the SDA line during the acknowledge clock pulse, so
that the SDA line is stable LOW during the HIGH period of
the acknowledge related clock pulse, set-up and hold
times must be taken into account.
6.1
Bit transfer
One data bit is transferred during each clock pulse.
The data on the SDA line must remain stable during the
HIGH period of the clock pulse as changes in the data line
at this time will be interpreted as control signals
(see Fig.3).
A master receiver must signal an end of data to the
transmitter by not generating an acknowledge after the
last byte that has been clocked out of the slave. This is
done by the master receiver by holding the SDA line HIGH.
In this event the transmitter must release the data line to
enable the master to generate a STOP condition.
6.2
START and STOP conditions
Both data and clock lines remain HIGH when the bus is not
busy. A HIGH-to-LOW transition of the data line, while the
clock is HIGH is defined as the START condition (S).
A LOW-to-HIGH transition of the data line while the clock
is HIGH is defined as the STOP condition P (see Fig.4).
6.3
System configuration
A device generating a message is a ‘transmitter’, a device
receiving the message is the ‘receiver’. The device that
controls the message is the ‘master’ and the devices which
are controlled by the master are the ‘slaves’ (see Fig.5).
SDA
SCL
data line
stable;
data valid
change
of data
allowed
MBC621
Fig.3 Bit transfer.
1999 Apr 07
6
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
SDA
SDA
SCL
SCL
S
P
STOP condition
START condition
MBC622
Fig.4 Definition of START and STOP conditions.
SDA
SCL
MASTER
TRANSMITTER /
RECEIVER
SLAVE
TRANSMITTER /
RECEIVER
MASTER
TRANSMITTER /
RECEIVER
SLAVE
RECEIVER
MASTER
TRANSMITTER
MBA605
Fig.5 System configuration.
DATA OUTPUT
BY TRANSMITTER
not acknowledge
DATA OUTPUT
BY RECEIVER
acknowledge
8
SCL FROM
MASTER
1
2
9
S
clock pulse for
acknowledgement
START
condition
MGL539
Fig.6 Acknowledgment on the I2C-bus.
1999 Apr 07
7
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
7
FUNCTIONAL DESCRIPTION
Quasi-bidirectional I/Os
7.1
The PCF8575’s 16 ports (see Fig.7) are entirely independent and can be used either as input or output ports. Input data
is transferred from the ports to the microcontroller in the READ mode (see Fig.10). Output data is transmitted to the ports
in the WRITE mode (see Fig.9).
This quasi-bidirectional I/O can be used as an input or output without the use of a control signal for data direction.
At power-on the I/Os are HIGH. In this mode only a current source (IOH) to VDD is active. An additional strong pull-up to
VDD (IOHt) allows fast rising edges into heavily loaded outputs. These devices turn on when an output is written HIGH,
and are switched off by the negative edge of SCL. The I/Os should be HIGH before being used as inputs. After power-on
as all the I/Os are set HIGH all of them can be used as input. Any change in setting of the I/Os as either inputs or outputs
can be done with the write mode. Warning: If a HIGH is applied to an I/O which has been written earlier to LOW, a large
current (IOL) will flow to VSS. (see Characteristics note 3).
V
d
DD
I
write pulse
OH
100
µA
I
OHt
data from
shift register
D
Q
FF
P00 to P07
P10 to 17
C
I
I
OL
S
power-on
reset
V
SS
D
C
Q
FF
I
read pulse
S
to interrupt
logic
data to
shift register
MGL540
Fig.7 Simplified schematic diagram of each I/O.
7.2
Addressing
Figures 8, 9 and 10 show the address and timing diagrams. Before any data is transmitted or received the master must
send the address of the receiver via the SDA line. The first byte transmitted after the START condition carries the address
of the slave device and the read/write bit. The address of the slave device must not be changed between the START and
the STOP conditions. The PCF8575 acts as a slave receiver or a slave transmitter.
slave address
handbook, halfpage
S
0
1
0
0
A2 A1 A0 R/W
A
MGL541
Fig.8 Byte containing the slave address and the R/W bits.
8
1999 Apr 07
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ahdnbok,uflapegwidt
Integral multiples of two bytes
SCL
SDA
1
0
2
3
4
5
6
7
8
slave address (PCF8575)
data to port 0
data to port 1
S
1
0
0
A2 A1 A0
0
A
P07 P06
1
P00
A
P17
P10
A
acknowledge
from slave
start condition
acknowledge P05
from slave
acknowledge
from slave
R/W
WRITE TO
PORT
Data A0 and
B0 valid
DATA OUTPUT
FROM PORT
t
pv
P05 OUTPUT
VOLTAGE
I
P05 PULL-UP
OUTPUT CURRENT
OHt
I
OH
INT
t
MGL542
ir
Fig.9 WRITE mode (output).
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g
SCL
SDA
S
0
1
0
0
A2 A1 A0
1
A
P07 P06 P05 P04 P03 P02 P01 P00
A
P17
P10
A
P07
P00
A
P17
P10
1
P
acknowledge
from receiver
acknowledge
from receiver
non acknowledge
from receiver
R/W acknowledge
from slave
acknowledge
from receiver
READ FROM PORT
DATA INTO PORT
P07 to P00
P17 to P10
P07 to P00
P17 to P10
P07 to P00
P17 to P10
t
t
h
su
INT
MGL543
t
t
t
ir
iv
ir
A LOW-to-HIGH transition of SDA, while SCL is HIGH is defined as the STOP condition (P). Transfer of data can be stopped at any moment by a STOP condition. When this occurs, data present
at the latest acknowledge phase is valid (output mode). Input data is lost.
Fig.10 READ mode (input).
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
7.3
Reading from a port (input mode)
7.5
Interrupt
All ports programmed as input should be set to logic 1.
To read, the master (microcontroller) first addresses the
slave device after it receives the interrupt. By setting the
last bit of the byte containing the slave address to logic 1
the read mode is entered. The data bytes that follow on the
SDA are the values on the ports.
The PCF8575 provides an open-drain interrupt (INT)
which can be fed to a corresponding input of the
microcontroller (see Figs 9, 10 and 12). This gives these
chips a kind of a master function which can initiate an
action elsewhere in the system.
An interrupt is generated by any rising or falling edge of the
port inputs. After time tiv the signal INT is valid.
If the data on the input port changes faster than the master
can read, this data may be lost.
The interrupt disappears when data on the port is changed
to the original setting or data is read from or written to the
device which has generated the interrupt.
7.4
Writing to the port (output mode)
To write, the master (microcontroller) first addresses the
slave device. By setting the last bit of the byte containing
the slave address to logic 0 the write mode is entered.
The PCF8575 acknowledges and the master sends the
first data byte for P07 to P00. After the first data byte is
acknowledged by the PCF8575, the second data byte
P17 to P10 is sent by the master. Once again the
PCF8575 acknowledges the receipt of the data after which
this 16-bit data is presented on the port lines.
In the write mode the interrupt may become deactivated
(HIGH) on the rising edge of the write to port pulse. On the
falling edge of the write to port pulse the interrupt is
definitely deactivated (HIGH).
The interrupt is reset in the read mode on the rising edge
of the read from port pulse.
During the resetting of the interrupt itself any changes on
the I/Os may not generate an interrupt. After the interrupt
is reset any change in I/Os will be detected and transmitted
as an INT.
The number of data bytes that can be sent successively is
not limited. After every two bytes the previous data is
overwritten.
The first data byte in every pair refers to Port 0
(P07 to P00), whereas the second data byte in every pair
refers to Port 1 (P17 to P10), see Fig.11.
First Byte
Second Byte
07 06 05 04 03 02 01 00
A
17 16 15 14 13 12 11 10
A
P07 P06 P05 P04 P03 P02 P01 P00
P17 P16 P15 P14 P13 P12 P11 P10
MGL545
Fig.11 Correlation between bits and ports.
1999 Apr 07
11
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
PCF8575
(1)
PCF8575
(2)
PCF8575
(8)
V
DD
INT
INT
INT
MICROCOMPUTER
INT
MGL544
Fig.12 Application of multiple PCF8575s with interrupt.
1999 Apr 07
12
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
8
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); note 1.
SYMBOL PARAMETER
VDD
MIN.
−0.5
MAX.
UNIT
supply voltage
+6.5
±100
±100
VDD + 0.5
±20
V
IDD
ISS
VI
supply current
−
−
V
−
−
−
−
mA
mA
V
supply current
input voltage
SS − 0.5
II
DC input current
DC output current
total power dissipation
mA
mA
IO
±25
Ptot
PO
Tstg
Tamb
400
mW
mW
°C
power dissipation per output
storage temperature
100
−65
−40
+150
+85
operating ambient temperature
°C
Note
1. Stress above those listed under ‘Absolute Maximum Ratings’ may cause permanent damage to the device. This is
a stress ratings only and functional operation of the device at these or any other conditions above those indicated in
the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
9
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC12 under
“Handling MOS Devices”.
10 CHARACTERISTICS
VDD = 2.5 to 5.5 V; VSS = 0 V; Tamb = −40 to +85 °C; unless otherwise specified.
SYMBOL
Supplies
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDD
IDD
supply voltage
2.5
−
5.5
V
supply current
operating mode; no load;
−
100
200
µA
VI = VDD or VSS
;
fSCL = 400 kHz
IDD(stb)
standby current
standby mode; no load;
VI = VDD or VSS
−
2.5
10
µA
VPOR
VIL1
power-on reset voltage
note 1
−
1.2
1.8
V
V
LOW-level input voltage pins A0,
A1 and A2
0.0
−
0.2VDD
VIL2
LOW-level input voltage on all other
signal pins
0.0
−
0.3VDD
V
VIH
IL1
HIGH-level input voltage
0.7VDD
−
−
VDD
+1
V
leakage current at pins A0,
A1 and A2
VI = VDD or VSS
−1
µA
1999 Apr 07
13
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
SYMBOL
IL2
PARAMETER
CONDITIONS
MIN.
−10
TYP.
MAX.
+10
UNIT
µA
leakage current on all other signal VI = VDD or VSS
pins
−
Input SCL; input/output SDA
IOL
CI
LOW-level output current
input capacitance
VOL = 0.4 V; note 3
VI = VSS; note 2
3
−
−
−
mA
pF
−
7
I/Os; P00 to P07 and P10 to P17
IOL
IOH
IOHt
CI
LOW-level output current
HIGH-level output current
transient pull-up current
input capacitance
VOL = 1 V; note 3
VOH = VSS
10
−30
−0.5
−
25
−
−
mA
µA
mA
pF
−300
−
VOH = VSS; see Fig.9
note 2
−1.0
−
10
10
CO
output capacitance
note 2
−
−
pF
Port timing; CL ≤ 100 pF (see Figs 9 and 10)
tpv
tsu
th
output data valid
−
0
4
−
−
−
4
−
−
µs
µs
µs
input data set-up time
input data hold time
Interrupt INT (see Fig.13)
IOL
LOW-level output current
VOL = 0.4 V
1.6
−
−
mA
TIMING; CL ≤ 100 pF (see Figs 9 and 10)
tiv
tir
input data valid time
reset delay time
−
−
−
−
4
4
µs
µs
Notes
1. The power-on reset circuit resets the I2C-bus logic with VDD < VPOR and sets all I/Os to logic 1 (with current source
to VDD).
2. The value is not tested, but verified on sampling basis.
3. A single LOW-level output current (IOL) must not exceed 20 mA for an extended time. The sum of all IOLs at any point
in time must not exceed 100 mA.
1999 Apr 07
14
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
11 I2C-BUS TIMING CHARACTERISTICS
See Fig.13 and note 1.
SYMBOL
fSCL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
kHz
SCL clock frequency
−
400
50
−
tSW
tolerable spike width on bus
note 2
−
ns
tBUF
BUS free time between a STOP
and START condition
1.3
µs
tSU;STA
tHD;STA
tLOW
tHIGH
tr
START condition set-up time
START condition hold time
SCL LOW time
0.6
0.6
1.3
0.6
−
µs
µs
µs
µs
ns
ns
ns
ns
µs
pF
−
−
SCL HIGH time
−
SCL and SDA rise time
SCL and SDA fall time
data set-up time
note 3
note 3
20 + 0.1Cb
300
300
−
tf
20 + 0.1Cb
tSU;DAT
tHD;DAT
tSU;STO
Cb
100
0
data hold time
−
STOP condition set-up time
0.6
−
−
capacitive load represented by
each bus line
400
Notes
1. All the timing values are valid within the operating supply voltage and ambient temperature range and refer to VIL
and VIH with an input voltage swing of VSS to VDD
2. The device inputs SDA and SCL are filtered and will reject spikes on the bus lines of widths less than tSW(max)
.
.
3. The rise and fall times specified here refer to the driver device (PCF8575) and are part of the general fast I2C-bus
specification when PCF8575 asserts an acknowledge on SDA, the minimum fall time is 20 ns + 0.1Cb.
START
CONDITION
(S)
BIT 7
MSB
(A7)
BIT 6
(A6)
BIT 0
LSB
(R/W)
ACKNOWLEDGE
(A)
STOP
CONDITION
(P)
PROTOCOL
t
t
t
LOW
HIGH
SU;STA
1/f
SCL
SCL
SDA
t
t
t
f
BUF
r
t
t
HD;DAT
t
t
HD;STA
SU;DAT
SU;STO
MGL546
Fig.13 I2C-bus timing diagram.
15
1999 Apr 07
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
12 DEVICE PROTECTION
V
1
DD
INT
A1
24
23
22
21
20
19
18
17
16
15
14
13
V
DD
2
SDA
SCL
A0
3
A2
4
P00
P01
P02
P03
P04
P05
P06
P07
5
P17
P16
P15
P14
P13
P12
P11
P10
6
7
8
9
10
11
12
V
SS
substrate V
SS
MGR789
Fig.14 Device protection diagram.
1999 Apr 07
16
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
13 PACKAGE OUTLINE
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm
SOT340-1
D
E
A
X
v
c
H
M
A
y
E
Z
24
13
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
12
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
8.4
8.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
0.8
0.4
mm
2.0
0.25
0.65
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
93-09-08
95-02-04
SOT340-1
MO-150AG
1999 Apr 07
17
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
14 SOLDERING
14.1 Introduction to soldering surface mount
packages
• For packages with leads on two sides and a pitch (e):
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
14.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
14.4 Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
14.3 Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
1999 Apr 07
18
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
14.5 Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
WAVE
REFLOW(1)
HLQFP, HSQFP, HSOP, SMS
PLCC(3), SO
not suitable(2)
suitable
suitable
suitable
suitable
suitable
suitable
not recommended(3)(4)
LQFP, QFP, TQFP
SQFP
not suitable
not recommended(5)
SSOP, TSSOP, VSO
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
1999 Apr 07
19
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
15 DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
16 LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
17 PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1999 Apr 07
20
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
NOTES
1999 Apr 07
21
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
NOTES
1999 Apr 07
22
Philips Semiconductors
Product specification
Remote 16-bit I/O expander for I2C-bus
PCF8575
NOTES
1999 Apr 07
23
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5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1999
SCA63
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
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under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
465006/00/03/pp24
Date of release: 1999 Apr 07
Document order number: 9397 750 05528
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