NX5DV713 [NXP]
Dual supply 1-of-2 VGA switch; 双电源1的- 2 VGA开关
| 型号： | NX5DV713 |
| 厂家： | 
NXP |
| 描述： | Dual supply 1-of-2 VGA switch |
| 文件： | 总20页 (文件大小：630K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NX5DV713
Dual supply 1-of-2 VGA switch
Rev. 1 — 24 November 2011
Product data sheet
1. General description
The NX5DV713 is a dual supply 1-to-2 VGA switch. It integrates high-bandwidth SPDT
switches with level-translating buffers and level translating switches to provide switching
of input RGB, H-sync, V-sync and DDC signals to either of two output channels.
The NX5DV713 is characterized for operation from 40 C to +85 C.
2. Features and benefits
RGB switches:
Low ON resistance (4 typical)
Low ON capacitance (12 pF typical)
Low output skew (50 ps)
Low power consumption (< 2 A)
Level translation of sync and DDC signals
Over-voltage tolerant inputs
ESD protection:
HBM JESD22-A114F Class 3A exceeds 4 kV
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101D exceeds 1000 V
IEC61000-4-2 contact discharge exceeds 4 kV for I/Os
Specified from 40 C to +85 C
3. Applications
Notebook Computers
Docking stations
Digital projectors
Computer monitors
Servers
Storage
NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
4. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
Description
Version
NX5DV713HF 40 C to +85 C
HWQFN32 plastic thermal enhanced very very thin quad flat
SOT1180-1
package; no leads; 32 terminals; body 3 6 0.75 mm
5. Functional diagram
VCC(B)
R1
R2
R0
G0
B0
G1
G2
B1
B2
VCC(A)
SEL
CONTROL LOGIC
H1
H0
V0
H2
V1
V2
LEVEL
TRANSLATING
MUX
R
R
R
R
PU
PU
PU
PU
SDA1
SCL1
LEVEL
TRANSLATING
SWITCH
R
R
PU
PU
SDA0
SCL0
SDA2
SCL2
aaa-001597
Fig 1. Logic symbol
NX5DV713
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 24 November 2011
2 of 20
NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
6. Pinning information
6.1 Pinning
terminal 1
index area
R0
1
2
3
4
5
6
7
8
9
27 R1
26 R2
25 G1
24 G2
23 n.c.
22 B1
21 B2
20 H1
19 H2
18 V1
17 V2
G0
GND
V
CC(A)
B0
(2)
H0
V0
NX5DV713
n.c.
SDA0
SCL0 10
GND 11
(1)
GND
aaa-001608
Transparent top view
(1) This is not a supply pin, the substrate is attached to this pad using conductive die attach material. There is no electrical or
mechanical requirement to solder this pad however if it is soldered the solder land should remain floating or be connected to
GND.
(2) Pin can be connected to VCC(A)
.
Fig 2. Pin configuration SOT1180-1 (HWQFN32)
6.2 Pin description
Table 2.
Symbol
R0, G0, B0
GND
Pin description
Pin
Description
1, 2, 5
3, 11, 28, 31
4, 32
6
RGB input or output
ground (0 V)
VCC(A)
H0
supply voltage A
horizontal sync input
vertical sync input
not connected
V0
7
n.c.
8, 23[2]
SDA0
SCL0
9
SDA0 input or output
SCL0 input or output
SDAn input or output
SCLn input or output
supply voltage B
vertical sync output
10
SDA1, SDA2
SCL1, SCL2
VCC(B)
12, 13
14, 15
16
V1, V2
18, 17
NX5DV713
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 24 November 2011
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NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
Table 2.
Pin description …continued
Symbol
Pin
Description
H1, H2
20, 19
horizontal sync output
RGB input or output
test pin (active LOW)
select input
R1, G1, B1, R2, G2, B2
TEST[1]
27, 25, 22, 26, 24, 21
29
30
SEL
[1] Test pin used to enable test mode. For normal usage, this pin must be connected to VCC(A)
[2] Pin can be connected to VCC(A)
.
.
7. Functional description
The NX5DV713 integrates high-bandwidth SPDT switches, level-translating buffers and
level translating SPDT switches to provide a complete solution for 1-to-2 switching of VGA
signals. A select input (SEL) is used to determine which output is selected.
7.1 RGB switches
The NX5DV713 provides three identical single pole double throw high-bandwidth switches
to route standard VGA RGB signals (see Table 3).
Table 3.
Function table RGB
H = HIGH voltage level; L = LOW voltage level; X = Don’t care.
Input
SEL
L
Switch
R0 to R1; G0 to G1; B0 to B1
R0 to R2; G0 to G2; B0 to B2
H
7.2 H-Sync/V-Sync level translator
The horizontal and vertical synchronization buffers have inputs (H0, V0) referenced to
VCC(A) and outputs (H1, V1 and H2,V2) that are referenced to VCC(B). This allows level
translation of synchronization signals from as low as 2.0 V up to 5.5 V and supports
low-voltage CMOS or TTL-compatible graphics controllers meeting the VESA
specification for output drive of 8 mA.
Table 4.
Function table HV
H = HIGH voltage level; L = LOW voltage level; X = Don’t care.
Input
SEL
L
Switch
H1 = H0; V1 = V0; H2, V2 = L
H2 = H0; V2 = V0; H1, V1 = L
H
NX5DV713
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 24 November 2011
4 of 20
NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
7.3 Display-Data Channel Multiplexer
The NX5DV713 provides two identical SPDT active-level translating switches to route
DDC signals (See Table 5). The switch outputs are limited to a diode drop less than the
voltage applied on VCC(A). To provide VESA I2C-compatible signals 3.3 V should be
applied to VCC(A). If voltage translation is not required VCC(A) should be connected to
V
CC(B). Switch terminals include integrated pull-up resistors; inputs (SDA0, SCL0) are
pulled up to VCC(A), outputs (SDA1, SCL1 and SDA2, SCL2) are pulled up to VCC(B)
.
Table 5.
Function table DDC
H = HIGH voltage level; L = LOW voltage level; X = Don’t care.
Input
SEL
L
Switch
SDA0 to SDA1, SCL0 to SCL1
SDA0 to SDA2, SCL0 to SCL2
H
8. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC(A)
VCC(B)
VI
Parameter
Conditions
Min
0.5
0.5
0.5
0.5
50
50
50
-
Max
+6
+6
+6
+6
-
Unit
V
supply voltage A
supply voltage B
input voltage
V
[1]
[1]
V
VSW
IIK
switch voltage
input clamping current
V
VI < 0.5 V
mA
mA
mA
mA
mA
mA
mA
ISK
switch clamping current VI < 0.5 V
-
IOK
output clamping current VO < 0 V
-
IO
output current
supply current
ground current
switch current
VO = 0 V to VCC(B)
50
100
-
ICC
ICC(A) or ICC(B)
-
IGND
ISW
100
-
VSW > 0.5 V or VSW < 6 V;
30
source or sink current
VSW > 0.5 V or VSW < 6 V;
pulsed at 1 ms duration, < 10 % duty cycle;
peak current
-
90
mA
Tstg
Ptot
storage temperature
total power dissipation
65
+150
250
C
[2]
Tamb = 40 C to +85 C
-
mW
[1] The minimum input voltage rating may be exceeded if the input current rating is observed.
[2] For HWQFN32 package: above 137 C the value of Ptot derates linearly with 20.5 mW/K.
NX5DV713
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 24 November 2011
5 of 20
NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
9. Recommended operating conditions
Table 7.
Symbol
VCC(A)
VCC(B)
Tamb
Recommended operating conditions
Parameter
Conditions
Min
Typ
3.3
5.0
+25
20
Max
5.5
5.5
+85
-
Unit
V
supply voltage A
supply voltage B
ambient temperature
2
4.5
V
operating in free-air
40
C
[1]
[1]
[1]
t/V
input transition rise and fall rate VCC(A) = 2.3 V to 2.7 V
VCC(A) = 3 V to 3.6 V
-
-
-
ns/V
ns/V
ns/V
10
-
VCC(A) = 4.5 V to 5.5 V
5
-
[1] Applies to control signal levels.
10. Static characteristics
Table 8.
Static characteristics
VCC(B) = 4.5 V to 5.5 V; VCC(A) = 2 V to 5.5 V, unless otherwise specified; Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
Tamb = 40 C to +85 C
Unit
Min
Typ[1]
Max
General
ICC(A)
ICC(B)
supply current A
supply current B
VCC(A) = 3.3 V; for H1, H2, V1, V2:
IO = 0 A; SCLn, SDAn unconnected
-
-
-
-
2.0
2.0
A
A
VCC(B) = 5.0 V; for H1, H2, V1, V2:
IO = 0 A; SCLn, SDAn unconnected
HV buffer
VIH
VIL
VH
II
HIGH-level input voltage VCC(A) = 3 V to 3.6 V
2
-
-
-
-
0.8
-
V
LOW-level input voltage
hysteresis voltage
VCC(A) = 3 V to 3.6 V
V
-
50
-
mV
A
input leakage current
VCC(B) = VCC(A) = 5.5 V;
VI = GND to VCC(A)
-
1
VOH
HIGH-level output voltage IO = 8 mA
VCC(B)
0.5
-
-
V
VOL
IOFF
LOW-level output voltage IO = 8 mA
-
-
-
-
0.5
V
power-off leakage current VI or VO = 0 V to 5.5 V; VCC(B) = 0 V;
VCC(A) = 0 V to 5.5 V
1
A
RGB switches
IS(OFF)
IS(ON)
RON
OFF-state leakage
current
VCC(B) = 5.5 V; VI = 0.3 V or 5.5 V;
VO = 0 V to VCC(B); See Figure 3
-
-
-
-
-
-
1
1
-
A
A
ON-state leakage current VCC(B) = 5.5 V; VI = 0.3 V or 5.5 V;
VO = 0 V to VCC(B); See Figure 4
[4]
[2]
[3]
ON resistance
VI = 0.7 V; ISW = 10 mA; See Figure 5
and Figure 6
4
RON
ON resistance mismatch VI = GND to 0.7 V; ISW = 10 mA
between channels
0.5
-
RON(flat) ON resistance (flatness) VI = GND to 0.7 V; ISW = 10 mA
-
-
0.5
4.5
-
-
CS(OFF) OFF-state capacitance
pF
NX5DV713
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 24 November 2011
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NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
Table 8.
Static characteristics …continued
VCC(B) = 4.5 V to 5.5 V; VCC(A) = 2 V to 5.5 V, unless otherwise specified; Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
Tamb = 40 C to +85 C
Unit
pF
Min
Typ[1]
Max
CS(ON)
ON-state capacitance
-
12
-
SDAn, SCLn
[5]
IS(OFF)
OFF-state leakage
current
VCC(B) = 5.5 V; VCC(A) = 3.6 V; SCL0,
SDA0, SCL1, SCL2, SDA1, SDA2 =
-
-
1
A
V
CC(A) or GND; VO = 0 V to VCC(B)
;
See Figure 3
RON
ON resistance
VCC(A) = 2 V; VI = 0.4 V; ISW = ±2 mA;
See Figure 5 and Figure 7
-
9
-
CS(ON)
RPU
ON-state capacitance
pull-up resistance
-
-
15
-
-
pF
4.7
k
Control Logic (SEL)
VIH HIGH-level input voltage
VCC(A) = 2.3 V to 2.7 V
VCC(A) = 3.0 V to 3.6 V
VCC(A) = 4.5 V to 5.5 V
VCC(A) = 2.3 V to 2.7 V
VCC(A) = 3.0 V to 3.6 V
VCC(A) = 4.5 V to 5.5 V
1.7
-
-
V
2.0
V
0.7VCC(A)
-
V
VIL
LOW-level input voltage
-
-
-
-
-
-
0.7
V
-
0.8
V
-
0.3VCC(A)
V
VH
II
hysteresis voltage
50
-
-
mV
A
input leakage current
VCC(A) = 5.5 V; VI = GND to VCC(A)
1
[1] All typical values are measured at VCC(B) = 5 V, VCC(A) = 3.3 V and Tamb = 25 C unless otherwise specified.
[2] Measured at identical VCC, temperature and input voltage.
[3] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and
temperature.
[4] Guarantees the LOW level.
[5] Guarantees the HIGH level.
10.1 Test circuits and waveforms
V
V
switch SEL
CC(A)
CC(B)
1
2
V
IH
V
IL
SEL
x0
x1
x2
1
2
V
IH
or V
IL
switch
I
S
GND
V
V
O
I
aaa-001599
x0 refers to R0, G0, B0, SCL0 or SDA0
x1 refers to R1, G1, B1, SCL1 or SDA1
x2 refers to R2, G2, B2, SCL2 or SDA2
Fig 3. Test circuit for measuring OFF-state leakage current
NX5DV713
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 24 November 2011
7 of 20
NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
V
V
switch SEL
CC(A)
CC(B)
1
2
V
IH
V
IL
SEL
x0
x1
x2
1
2
V
IH
or V
IL
switch
I
I
S
GND
V
V
O
aaa-001600
x0 refers to R0, G0, B0, SCL0 or SDA0
x1 refers to R1, G1, B1, SCL1 or SDA1
x2 refers to R2, G2, B2, SCL2 or SDA2
Fig 4. Test circuit for measuring ON-state leakage current
V
V
V
switch SEL
CC(A)
CC(B)
V
SW
1
2
V
IL
V
IH
SEL
x0
x1
x2
1
2
V
IL
or V
IH
switch
GND
V
I
SW
I
aaa-001601
x0 refers to R0, G0, B0, SCL0 or SDA0
x1 refers to R1, G1, B1, SCL1 or SDA1
x2 refers to R2, G2, B2, SCL2 or SDA2
RON = VSW / ISW
.
Fig 5. Test circuit for measuring ON resistance
NX5DV713
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 24 November 2011
8 of 20
NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
001aan178
10
R
ON
(Ω)
8
6
4
2
0
(1)
(2)
(3)
0
0.2
0.4
0.6
0.8
1.0
V (V)
I
(1) Tamb = 85 C
(2)
Tamb = 25 C
(3) Tamb = 40 C
Fig 6. ON resistance as a function of input voltage (RGB switches)
001aan179
60
V
= 3.3 V
V
= 5.0 V
CC(A)
CC(A)
R
ON
(Ω)
45
30
15
0
(1)
(2)
(3)
(1)
(2)
(3)
0
1
2
3
4
V (V)
I
(1) Tamb = 85 C
(2) Tamb = 25 C
(3)
Tamb = 40 C
Fig 7. ON resistance as a function of input voltage (DDC switches)
NX5DV713
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 24 November 2011
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NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
11. Dynamic characteristics
Table 9.
Dynamic characteristics
At recommended operating conditions; Voltages are referenced to GND (ground = 0 V; VCC(B) = 4.5 V to 5.5 V;
VCC(A) = 2 V to 5.5 V.
Symbol
Parameter
Conditions
Tamb = 40 C to +85 C
Unit
Min
Typ[1]
Max
[2]
tpd
propagation delay
enable time
H0 to H1, H2 and V0 to V1, V2;
See Figure 8 and Figure 9
-
3
-
ns
ns
ns
ns
ps
ten
SEL to all other outputs;
See Figure 10 and Figure 11
-
-
-
-
15
5
-
-
-
-
tdis
disable time
SEL to all other outputs;
See Figure 10 and Figure 11
tb-m
tsk(o)
break-before-make
time
See Figure 12
10
50
[3]
output skew time
Skew between any Rn, Gn and Bn
ports; see Figure 8
[1] All typical values are measured at VCC(B) = 5 V; VCC(A) = 3.3 V; Tamb = 25 C.
[2] pd is the same as tPLH and tPHL
[3] Guaranteed by design.
t
.
11.1 Test circuits and waveforms
V
I
input
GND
V
V
M
M
t
t
PLH
PHL
V
OH
output 1
V
V
V
V
M
M
M
V
OL
V
OH
output 2
M
V
OL
001aan180
Measurement points are given in Table 10.
tsk(o) = tPLH1 tPLH2
Fig 8. Propagation delay and output skew times
Table 10. Measurement points
Input
Output
VX
VM
VI
VM
0.5VCC(A)
GND to VCC(A)
0.9VOH
0.5VCC(B)
NX5DV713
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© NXP B.V. 2011. All rights reserved.
Product data sheet
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NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
V
CC
V
V
O
I
G
DUT
R
T
C
L
R
L
001aan183
Test data is given in Table 11.
Definitions:
DUT = Device Under Test.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including test jig and probe.
RL = Load resistance.
Fig 9. Test circuit for measuring propagation delay times (SEL to H1, H2, V1, V2)
Table 11. Test data
Input
tr, tf
Load
CL
RL
2.5 ns
10 pF
1 k
V
I
SEL input
V
M
V
M
GND
t
en
t
dis
V
OH
V
V
X
X
output
OFF to HIGH
HIGH to OFF
GND
t
dis
t
en
V
OH
V
X
V
X
output
HIGH to OFF
OFF to HIGH
GND
aaa-001602
Measurement points are given in Table 10.
Logic level: VOH is typical output voltage level that occurs with the output load.
Fig 10. Enable and disable times
NX5DV713
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 24 November 2011
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NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
V
V
CC(B)
CC(A)
SEL
x0
x1
x2
1
2
switch
G
V
I
V
R
C
V = 1 V
EXT
V
L
L
O
GND
aaa-001603
Test data is given in Table 12.
x0 refers to R0, G0, B0, SCL0 or SDA0
x1 refers to R1, G1, B1, SCL1 or SDA1
x2 refers to R2, G2, B2, SCL2 or SDA2
Fig 11. Test circuit for measuring enable and disable times
Table 12. Test data
Input
tr, tf
Load
CL
VI
RL
2.5 ns
GND to VCC(A)
10 pF
100
NX5DV713
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 24 November 2011
12 of 20
NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
V
CC(A)
V
CC(B)
SEL
x0
x1
x2
G
V
I
V
R
C
V
= 1 V
EXT
V
L
L
O
GND
aaa-001604
a. Test circuit
V
I
0.5V
I
0.9V
O
0.9V
O
V
O
t
b-m
001aag572
b. Input and output measurement points
Test data is given in Table 12.
x0 refers to R0, G0, B0, SCL0 or SDA0
x1 refers to R1, G1, B1, SCL1 or SDA1
x2 refers to R2, G2, B2, SCL2 or SDA2
Fig 12. Test circuit for measuring break-before-make times
NX5DV713
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Product data sheet
Rev. 1 — 24 November 2011
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NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
12. Additional dynamic characteristics
Table 13. Additional dynamic characteristics
VCC(B) = 5.0 V 10 %, VCC(A) = 2 V to 5.5 V, unless otherwise specified; Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
Tamb = 40 C to +85 C
Unit
Min
Typ
600
0.6
Max
[1]
[1]
f(3dB)
3 dB frequency response
RL = 50 ; see Figure 13
-
-
-
-
MHz
dB
ins
Insertion loss
fi = 1 MHz;
RL = RS =50 ; see Figure 13
Xtalk
crosstalk
between switches; fi = 50 MHz;
-
50
-
dB
RL = 50 ; see Figure 13
[1] fi is biased at 0.5VCC
.
12.1 Test circuits
5 V
10 nF
V
V
CC(B)
CC(A)
NETWORK
ANALYZER
50 Ω
V
I
50 Ω
R0, G0, B0
f
i
NX5DV713
GND or V
SEL
CC
V
R1, G1, B1
O
measurement
50 Ω
reference
50 Ω
R2, G2, B2
50 Ω
GND
aaa-001609
Insertion loss is measured between R0 and R1 or R2 on each switch; crosstalk is measured from
one channel to the other channel.
Fig 13. Test circuit for measuring crosstalk and insertion loss
NX5DV713
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 24 November 2011
14 of 20
NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
13. Application information
The NX5DV713 provides the level shifting necessary to drive two standard VGA ports
from a graphic controller as low as 2.2 V. Internal buffers drive the HSYNC and VSYNC
signals to VGA standard TTL levels. The DDC multiplexer provides level shifting by
clamping signals to a diode drop less than VCC(A) (See Figure 14). Connect VCC(A) to 3.3 V
for normal operation, or to VCC(B) to disable voltage clamping for DDC signals
+3.3 V
+5.0 V
0.1 μF
0.1 μF
V
CC(A)
V
CC(B)
3
2
2
R0, B0, G0
H0, V0
3
2
2
GRAPHICS
CONTROLLER
R1, B1, G1
SDA1, SCL1
H1, V1
VGA
PORT
SDA0, SCL0
3
2
2
R2, B2, G2
SDA2, SCL2
H2, V2
VGA
PORT2
GND or V
SEL
CC
GND
aaa-001606
Fig 14. Typical operating circuit
NX5DV713
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 24 November 2011
15 of 20
NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
14. Package outline
HWQFN32: plastic thermal enhanced very very thin quad flat package; no leads;
32 terminals; 3 x 6 x 0.75 mm
SOT1180-1
D
B
A
terminal 1
index area
E
A
A
1
c
detail X
e
1
e
C
v
C
A
B
b
y
C
1
y
w
C
12
16
L
11
17
27
E
e
E
h
e
2
1
terminal 1
index area
32
28
X
D
h
0
2.5
5 mm
v
scale
Dimensions
Unit
(1)
(1)
(1)
A
A
b
c
D
D
E
e
e
1
e
2
L
w
y
y
1
1
h
h
max 0.80 0.05 0.25
mm nom 0.75 0.02 0.20 0.2 3.0 1.8 6.0 4.8 0.4 1.6
min 0.70 0.00 0.15 2.9 1.7 5.9 4.7
3.1 1.9 6.1 4.9
0.4
4
0.3 0.07 0.05 0.08 0.1
0.2
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
sot1180-1_po
References
Outline
version
European
projection
Issue date
IEC
- - -
JEDEC
- - -
JEITA
- - -
10-07-02
10-08-05
SOT1180-1
Fig 15. Package outline SOT1180-1 (HWQFN32)
NX5DV713
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 24 November 2011
16 of 20
NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
15. Abbreviations
Table 14. Abbreviations
Acronym
CDM
DDC
Description
Charged Device Model
Display Data Channel
ElectroStatic Discharge
Human Body Model
ESD
HBM
MM
Machine Model
RGB
Red Green Blue
SPDT
TTL
Single-Pole Double-Throw
Transistor-Transistor Logic
Video Electronics Standards Association
VESA
16. Revision history
Table 15. Revision history
Document ID
Release date
20111124
Data sheet status
Change notice
Supersedes
NX5DV713 v.1
Product data sheet
-
-
NX5DV713
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 24 November 2011
17 of 20
NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
17. Legal information
17.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
malfunction of an NXP Semiconductors product can reasonably be expected
17.2 Definitions
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
17.3 Disclaimers
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
NX5DV713
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 24 November 2011
18 of 20
NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
17.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NX5DV713
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 1 — 24 November 2011
19 of 20
NX5DV713
NXP Semiconductors
Dual supply 1-of-2 VGA switch
19. Contents
1
2
3
4
5
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
7
Functional description . . . . . . . . . . . . . . . . . . . 4
RGB switches. . . . . . . . . . . . . . . . . . . . . . . . . . 4
H-Sync/V-Sync level translator . . . . . . . . . . . . . 4
Display-Data Channel Multiplexer . . . . . . . . . . 5
7.1
7.2
7.3
8
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended operating conditions. . . . . . . . 6
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
Test circuits and waveforms . . . . . . . . . . . . . . . 7
Dynamic characteristics . . . . . . . . . . . . . . . . . 10
Test circuits and waveforms . . . . . . . . . . . . . . 10
Additional dynamic characteristics . . . . . . . . 14
Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Application information. . . . . . . . . . . . . . . . . . 15
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 17
9
10
10.1
11
11.1
12
12.1
13
14
15
16
17
Legal information. . . . . . . . . . . . . . . . . . . . . . . 18
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
17.1
17.2
17.3
17.4
18
19
Contact information. . . . . . . . . . . . . . . . . . . . . 19
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 24 November 2011
Document identifier: NX5DV713
相关型号：
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