NX3DV2567HR-Q100 [NXP]

IC FOUR POLE DOUBLE THROW SWITCH, Multiplexer or Switch;
NX3DV2567HR-Q100
型号: NX3DV2567HR-Q100
厂家: NXP    NXP
描述:

IC FOUR POLE DOUBLE THROW SWITCH, Multiplexer or Switch

光电二极管
文件: 总19页 (文件大小:163K)
中文:  中文翻译
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NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
Rev. 1 — 20 January 2014  
Product data sheet  
1. General description  
The NX3DV2567-Q100 is a four-pole double-throw analog switch (4PDT) optimized for  
switching WLAN-SIM supply, data and control signals. It has one digital select input (S)  
and four switches each with two independent input/outputs (nY0 and nY1) and a common  
input/output (nZ). Schmitt-trigger action at S, makes the circuit tolerant to slower input rise  
and fall times across the entire VCC range from 1.4 V to 4.3 V.  
Lower-level logic signals can drive pin S without a significant increase in supply current  
ICC, due to a low input voltage threshold. This characteristic makes it possible for the  
NX3DV2567-Q100 to switch 4.3 V signals with a 1.8 V digital controller, eliminating the  
need for logic level translation.  
The NX3DV2567-Q100 allows signals with amplitude up to VCC to be transmitted from nZ  
to nY0 or nY1; or from nY0 or nY1 to nZ.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Wide supply voltage range from 1.4 V to 4.3 V  
Very low ON resistance for supply path:  
0.5 (typical) at VCC = 1.8 V  
0.45 (typical) at VCC = 2.7 V  
Low ON resistance for data path:  
7 (typical) at VCC = 1.8 V  
6 (typical) at VCC = 2.7 V  
Low ON capacitance for data path  
Wide 3 dB bandwidth > 160 MHz  
Break-before-make switching  
High noise immunity  
ESD protection:  
MIL-STD-883, method 3015 Class 3A exceeds 4000 V  
HBM JESD22-A114F Class 3A exceeds 4000 V  
MIL-STD-883, method 3015 Class 3A I/O to GND exceeds 7000 V  
HBM JESD22-A114F Class 3A I/O to GND exceeds 7000 V  
CDM AEC-Q100-011 revision B exceeds 1000 V  
CMOS low-power consumption  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
Latch-up performance exceeds 100 mA per JESD 78B Class II Level A  
1.8 V control logic at VCC = 3.6 V  
Control input accepts voltages above supply voltage  
Very low supply current, even when input is below VCC  
High current handling capability (350 mA continuous current under 3.3 V supply for  
supply path switch)  
3. Applications  
Cell phone, PDA, digital camera, printer and notebook  
LCD monitor, TV and set-top box  
4. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
NX3DV2567HR-Q100 40 C to +125 C  
HXQFN16U plastic thermal enhanced extremely thin quad flat SOT1039-1  
package; no leads; 16 terminals; UTLP based;  
body 3 x 3 x 0.5 mm  
5. Marking  
Table 2.  
Marking codes  
Type number  
Marking code  
NX3DV2567HR-Q100  
D60  
6. Functional diagram  
SUPPLY PATH  
SWITCH  
1Y0  
1Z  
1Y1  
DATA PATH  
SWITCHES  
2Y0  
nY1  
2Z  
2Y1  
nZ  
3Y0  
3Z  
3Y1  
nY0  
S
4Y0  
4Z  
4Y1  
S
to other three switches  
001aam595  
001aam596  
Fig 1. Logic symbol  
Fig 2. Logic diagram (one switch)  
NX3DV2567_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2014. All rights reserved.  
Product data sheet  
Rev. 1 — 20 January 2014  
2 of 19  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
7. Pinning information  
7.1 Pinning  
1;ꢀ'9ꢁꢂꢃꢄꢅ4ꢆꢇꢇ  
WHUPLQDOꢋꢀ  
LQGH[ꢋDUHD  
ꢀ<ꢄ  
6
ꢀꢁ ꢃ=  
ꢀꢀ ꢃ<ꢀ  
ꢀꢄ QꢆFꢆ  
ꢁ<ꢀ  
ꢁ=  
ꢂ<ꢄ  
DDDꢀꢁꢁꢂꢃꢄꢅ  
7UDQVSDUHQWꢋWRSꢋYLHZ  
Fig 3. Pin configuration SOT1039-1 (HXQFN16U)  
7.2 Pin description  
Table 3.  
Symbol  
1Y0  
Pin description  
Pin  
Description  
1
independent input or output (supply switch)  
independent input or output (data switch)  
select input  
2Y0, 3Y0, 4Y0  
5, 9, 13  
S
2
1Y1  
15  
independent input or output (supply switch)  
independent input or output (data switch)  
common output or input (supply switch)  
common output or input (data switch)  
ground (0 V)  
2Y1, 3Y1, 4Y1  
1Z  
3, 7, 11  
16  
2Z, 3Z, 4Z  
GND  
4, 8, 12  
6
n.c.  
10  
not connected  
VCC  
14  
supply voltage  
8. Functional description  
Table 4.  
Function table[1]  
Input S  
Channel on  
nY0  
L
H
nY1  
[1] H = HIGH voltage level; L = LOW voltage level.  
NX3DV2567_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2014. All rights reserved.  
Product data sheet  
Rev. 1 — 20 January 2014  
3 of 19  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
9. Limiting values  
Table 5.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol  
VCC  
VI  
Parameter  
Conditions  
select input S  
VI < 0.5 V  
Min  
0.5  
0.5  
0.5  
50  
-
Max  
+4.6  
+4.6  
Unit  
V
supply voltage  
input voltage  
[1]  
[2]  
V
VSW  
IIK  
switch voltage  
input clamping current  
VCC + 0.5 V  
-
mA  
ISK  
switch clamping current VI < 0.5 V or VI > VCC + 0.5 V  
50  
mA  
ISW  
switch current  
supply path switch  
VSW > 0.5 V or VSW < VCC + 0.5 V;  
source or sink current  
-
-
350  
500  
mA  
mA  
VSW > 0.5 V or VSW < VCC + 0.5 V;  
pulsed at 1 ms duration, < 10 % duty cycle;  
peak current  
data path switch  
VSW > 0.5 V or VSW < VCC + 0.5 V;  
-
128  
mA  
source or sink current  
Tstg  
Ptot  
storage temperature  
total power dissipation  
65  
+150  
250  
C  
[3]  
Tamb = 40 C to +125 C  
-
mW  
[1] The minimum input voltage rating may be exceeded if the input current rating is observed.  
[2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed but may not  
exceed 4.6 V.  
[3] Above 135 C, the value of Ptot derates linearly with 16.9 mW/K.  
10. Recommended operating conditions  
Table 6.  
Recommended operating conditions  
Symbol Parameter  
Conditions  
Min  
1.4  
0
Max  
4.3  
Unit  
V
VCC  
VI  
supply voltage  
input voltage  
select input S  
4.3  
V
[1]  
[2]  
VSW  
Tamb  
t/V  
switch voltage  
0
VCC  
+125  
200  
V
ambient temperature  
input transition rise and fall rate  
40  
-
C  
ns/V  
VCC = 1.4 V to 4.3 V  
[1] To avoid sinking GND current from terminal nZ when switch current flows in terminal nYn, the voltage drop across the bidirectional  
switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no GND current flows from terminal nYn. In this case, there is  
no limit for the voltage drop across the switch.  
[2] Applies to control signal levels.  
NX3DV2567_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2014. All rights reserved.  
Product data sheet  
Rev. 1 — 20 January 2014  
4 of 19  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
11. Static characteristics  
Table 7.  
Static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground 0 V).  
Symbol Parameter  
Conditions  
Tamb = 25 C  
Tamb = 40 C to +125 C Unit  
Min  
Typ  
Max  
Min  
Max  
Max  
(85 C) (125 C)  
VIH  
HIGH-level  
input voltage  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
VCC = 3.6 V to 4.3 V  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
VCC = 3.6 V to 4.3 V  
0.9  
0.9  
1.1  
1.3  
1.4  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.9  
0.9  
1.1  
1.3  
1.4  
-
-
-
-
-
V
V
V
V
V
V
V
V
V
V
A  
-
-
-
-
-
-
-
-
-
VIL  
LOW-level  
input voltage  
0.3  
0.4  
0.4  
0.5  
0.6  
-
0.3  
0.4  
0.4  
0.5  
0.6  
0.5  
0.3  
0.3  
0.4  
0.5  
0.6  
1  
-
-
-
-
-
-
-
-
II  
input leakage select input S;  
-
-
current  
VI = GND to 4.3 V;  
VCC = 1.4 V to 4.3 V  
IS(OFF)  
OFF-state  
leakage  
current  
nY0 and nY1 port;  
see Figure 4  
VCC = 1.4 V to 3.6 V  
VCC = 3.6 V to 4.3 V  
-
-
-
-
5  
-
-
50  
50  
500 nA  
500 nA  
10  
IS(ON)  
ON-state  
leakage  
current  
nZ port;  
VCC = 1.4 V to 3.6 V;  
see Figure 5  
VCC = 1.4 V to 3.6 V  
VCC = 3.6 V to 4.3 V  
-
-
-
-
5  
-
-
50  
50  
500 nA  
500 nA  
10  
ICC  
supply current VI = VCC or GND;  
VSW = GND or VCC  
VCC = 3.6 V  
VCC = 4.3 V  
-
-
-
-
100  
150  
-
-
500  
800  
5000 nA  
6000 nA  
ICC  
additional  
supply current  
VSW = GND or VCC  
VI = 2.6 V; VCC = 4.3 V  
VI = 2.6 V; VCC = 3.6 V  
VI = 1.8 V; VCC = 4.3 V  
VI = 1.8 V; VCC = 3.6 V  
VI = 1.8 V; VCC = 2.5 V  
-
-
-
-
-
-
2.0  
0.35  
7.0  
2.5  
50  
4.0  
0.7  
10.0  
4.0  
200  
-
-
-
-
-
-
-
7
1
7
1
A  
A  
A  
A  
nA  
pF  
15  
5
15  
5
300  
-
500  
-
CI  
input  
1
capacitance  
CS(OFF) OFF-state  
capacitance  
supply path switch  
data path switch  
supply path switch  
data path switch  
-
-
-
-
35  
3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
pF  
pF  
pF  
pF  
CS(ON)  
ON-state  
130  
16  
capacitance  
NX3DV2567_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2014. All rights reserved.  
Product data sheet  
Rev. 1 — 20 January 2014  
5 of 19  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
11.1 Test circuits  
V
CC  
switch  
S
1
2
V
IH  
S
nY0  
nY1  
1
2
V
IL  
or V  
IH  
switch  
V
IL  
I
S
nZ  
V
V
O
I
GND  
001aam599  
VI = 0.3 V or VCC 0.3 V; VO = VCC 0.3 V or 0.3 V.  
Fig 4. Test circuit for measuring OFF-state leakage current  
V
CC  
switch  
S
1
2
V
IH  
S
nY0  
nY1  
1
2
V
IL  
or V  
IH  
switch  
V
IL  
nZ  
I
S
V
V
O
I
GND  
001aam600  
VI = 0.3 V or VCC 0.3 V; VO = VCC 0.3 V or 0.3 V.  
Fig 5. Test circuit for measuring ON-state leakage current  
11.2 ON resistance  
Table 8.  
ON resistance  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 7 to Figure 12.  
Symbol Parameter  
Conditions  
Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit  
Min Typ[1]  
Max  
Min  
Max  
Supply path switch  
RON  
ON resistance VI = GND to VCC;  
ISW = 100 mA; see Figure 6  
VCC = 1.8 V; VSW = 0 V, 1.8 V  
-
-
0.5  
0.75  
0.7  
-
-
0.85  
0.8  
VCC = 2.7 V; VSW = 0 V, 2.3 V  
0.45  
[2]  
RON  
ON resistance VI = GND to VCC; ISW = 100 mA  
mismatch  
between  
channels  
VCC = 2.7 V; VSW = 0 V  
-
0.1  
-
-
-
NX3DV2567_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2014. All rights reserved.  
Product data sheet  
Rev. 1 — 20 January 2014  
6 of 19  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
Table 8. ON resistance …continued  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 7 to Figure 12.  
Symbol Parameter  
Conditions  
Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit  
Min Typ[1] Max  
Min  
Max  
Data path switches  
RON  
ON resistance VI = GND to VCC; ISW = 20 mA;  
see Figure 6  
VCC = 1.8 V; VSW = 0 V, 1.8 V  
VCC = 2.7 V; VSW = 0 V, 2.3 V  
-
-
7.0  
6.0  
10.0  
9.5  
-
-
11.0  
10.5  
[2]  
RON  
ON resistance VI = GND to VCC; ISW = 20 mA  
mismatch  
between  
channels  
VCC = 2.7 V; VSW = 0 V  
-
0.2  
-
-
-
[1] Typical values are measured at Tamb = 25 C.  
[2] Measured at identical VCC, temperature and input voltage.  
11.3 ON resistance test circuit and graphs  
001aam602  
0.8  
R
ON  
(Ω)  
(1)  
0.6  
V
SW  
V
(2)  
0.4  
0.2  
0
switch  
S
V
CC  
1
2
V
IL  
V
IH  
S
nY0  
nY1  
1
2
V
IL  
or V  
IH  
switch  
nZ  
V
I
SW  
I
GND  
0
1
2
3
V (V)  
I
001aam601  
RON = VSW / ISW  
.
(1) VCC = 1.8 V.  
(2) VCC = 2.7 V.  
Fig 6. Test circuit for measuring ON resistance  
Fig 7. Typical ON resistance as a function of input  
voltage (supply path switch)  
NX3DV2567_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2014. All rights reserved.  
Product data sheet  
Rev. 1 — 20 January 2014  
7 of 19  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
001aag566  
001aag568  
1.0  
1.0  
R
ON  
R
ON  
(Ω)  
(Ω)  
0.8  
0.8  
(1)  
(2)  
(3)  
(4)  
0.6  
0.4  
0.2  
0
0.6  
0.4  
0.2  
0
(1)  
(2)  
(3)  
(4)  
0
1
2
3
0
1
2
3
V (V)  
I
V (V)  
I
(1) Tamb = 125 C.  
(2) amb = 85 C.  
(1) Tamb = 125 C.  
(2) amb = 85 C.  
T
T
(3) Tamb = 25 C.  
(4) Tamb = 40 C.  
(3) Tamb = 25 C.  
(4) Tamb = 40 C.  
Fig 8. ON resistance as a function of input voltage;  
VCC = 1.8 V (supply path switch)  
Fig 9. ON resistance as a function of input voltage;  
VCC = 2.7 V (supply path switch)  
001aam603  
15  
R
ON  
(Ω)  
13  
(1)  
11  
9
7
(2)  
5
0
1
2
3
V (V)  
I
(1) VCC = 1.8 V.  
(2) CC = 2.7 V.  
V
Fig 10. Typical ON resistance as a function of input voltage (data path switch)  
NX3DV2567_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2014. All rights reserved.  
Product data sheet  
Rev. 1 — 20 January 2014  
8 of 19  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
001aam604  
001aam605  
15  
10  
R
ON  
(Ω)  
R
ON  
(Ω)  
(1)  
(2)  
13  
8
6
4
11  
9
(3)  
(4)  
(1)  
(2)  
(3)  
(4)  
7
5
0
0.4  
0.8  
1.2  
1.6  
2.0  
0
1
2
3
V (V)  
I
V (V)  
I
(1) Tamb = 125 C.  
(2) amb = 85 C.  
(1) Tamb = 125 C.  
(2) amb = 85 C.  
T
T
(3) Tamb = 25 C.  
(4) Tamb = 40 C.  
(3) Tamb = 25 C.  
(4) Tamb = 40 C.  
Fig 11. ON resistance as a function of input voltage;  
VCC = 1.8 V (data path switch)  
Fig 12. ON resistance as a function of input voltage;  
VCC = 2.7 V (data path switch)  
12. Dynamic characteristics  
Table 9.  
Dynamic characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit, see Figure 15.  
Symbol Parameter  
Conditions  
25 C  
40 C to +125 C  
Unit  
Min Typ[1] Max  
Min  
Max  
Max  
(85 C) (125 C)  
Supply path switch  
ten  
enable time  
S to 1Z or 1Y0, 1Y1;  
see Figure 13  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
VCC = 3.6 V to 4.3 V  
-
-
-
-
-
41  
30  
20  
19  
19  
90  
70  
45  
40  
40  
-
-
-
-
-
120  
80  
120  
90  
ns  
ns  
ns  
ns  
ns  
50  
55  
45  
45  
50  
50  
tdis  
disable time  
S to 1Z or 1Y0, 1Y1;  
see Figure 13  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
VCC = 3.6 V to 4.3 V  
-
-
-
-
-
24  
15  
9
70  
55  
25  
20  
20  
-
-
-
-
-
80  
60  
30  
25  
25  
90  
65  
35  
30  
30  
ns  
ns  
ns  
ns  
ns  
8
8
NX3DV2567_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2014. All rights reserved.  
Product data sheet  
Rev. 1 — 20 January 2014  
9 of 19  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
Table 9.  
Dynamic characteristics …continued  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit, see Figure 15.  
Symbol Parameter  
Conditions  
25 C  
40 C to +125 C  
Unit  
Min Typ[1] Max  
Min  
Max  
Max  
(85 C) (125 C)  
[2]  
tb-m  
break-before-make see Figure 14  
time  
VCC = 1.4 V to 1.6 V  
-
-
-
-
-
20  
17  
13  
11  
11  
-
-
-
-
-
9
7
4
3
2
-
-
-
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
VCC = 3.6 V to 4.3 V  
Data path switch  
ten  
enable time  
S to nZ or nYn;  
see Figure 13  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
VCC = 3.6 V to 4.3 V  
-
-
-
-
-
40  
29  
20  
19  
19  
90  
70  
45  
40  
40  
-
-
-
-
-
120  
80  
120  
90  
ns  
ns  
ns  
ns  
ns  
50  
55  
45  
45  
50  
50  
tdis  
disable time  
S to nZ or nYn;  
see Figure 13  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
VCC = 3.6 V to 4.3 V  
-
-
-
-
-
21  
13  
8
70  
55  
25  
20  
20  
-
-
-
-
-
80  
60  
30  
25  
25  
90  
65  
35  
30  
30  
ns  
ns  
ns  
ns  
ns  
7
7
[2]  
tb-m  
break-before-make see Figure 14  
time  
VCC = 1.4 V to 1.6 V  
-
-
-
-
-
23  
19  
15  
13  
12  
-
-
-
-
-
9
7
4
3
2
-
-
-
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
VCC = 3.6 V to 4.3 V  
[1] Typical values are measured at Tamb = 25 C and VCC = 1.5 V, 1.8 V, 2.5 V, 3.3 V and 4.3 V respectively.  
[2] Break-before-make guaranteed by design.  
NX3DV2567_Q100  
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Product data sheet  
Rev. 1 — 20 January 2014  
10 of 19  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
12.1 Waveform and test circuits  
V
I
S input  
V
M
t
GND  
t
en  
dis  
V
OH  
V
V
X
X
nZ output  
OFF to HIGH  
HIGH to OFF  
nY1 connected to V  
EXT  
GND  
t
t
en  
dis  
V
OH  
V
V
X
X
nZ output  
HIGH to OFF  
OFF to HIGH  
nY0 connected to V  
EXT  
GND  
001aam606  
Measurement points are given in Table 10.  
Logic level: VOH is typical output voltage level that occurs with the output load.  
Fig 13. Enable and disable times  
Table 10. Measurement points  
Supply voltage  
VCC  
Input  
VM  
Output  
VX  
1.4 V to 4.3 V  
0.5VCC  
0.9VOH  
NX3DV2567_Q100  
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Product data sheet  
Rev. 1 — 20 January 2014  
11 of 19  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
V
CC  
S
nY0  
nY1  
nZ  
G
V
V
R
L
C
L
V
V
= 1.5 V  
EXT  
I
O
GND  
001aam607  
a. Test circuit  
V
I
0.5V  
I
0.9V  
O
0.9V  
O
V
O
t
b-m  
001aag572  
b. Input and output measurement points  
Fig 14. Test circuit for measuring break-before-make timing  
V
CC  
S
nY0  
nY1  
1
2
switch  
nZ  
G
V
V
R
L
C
L
V
V
= 1.5 V  
EXT  
I
O
GND  
001aam608  
Test data is given in Table 11.  
Definitions test circuit:  
RL = Load resistance.  
CL = Load capacitance including jig and probe capacitance.  
EXT = External voltage for measuring switching times.  
V
Fig 15. Test circuit for measuring switching times  
Table 11. Test data  
Supply voltage  
VCC  
Input  
VI  
Load  
CL  
tr, tf  
RL  
1.4 V to 4.3 V  
VCC  
2.5 ns  
35 pF  
50   
NX3DV2567_Q100  
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© NXP B.V. 2014. All rights reserved.  
Product data sheet  
Rev. 1 — 20 January 2014  
12 of 19  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
12.2 Additional dynamic characteristics  
Table 12. Additional dynamic characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise  
specified); tr = tf 2.5 ns; Tamb = 25 C.  
Symbol Parameter  
Data path switch  
Conditions  
Min  
Typ  
Max  
Unit  
[1]  
[1]  
[1]  
f(3dB)  
3 dB frequency  
response  
RL = 50 ; see Figure 16  
VCC = 2.7 V to 3.6 V  
-
-
330  
-
-
MHz  
dB  
iso  
isolation (OFF-state)  
fi = 10 MHz; RL = 50 ; see Figure 17  
VCC = 2.7 V to 3.6 V  
60  
60  
10  
Xtalk  
crosstalk  
between switches;  
fi = 10 MHz; RL = 50 ; see Figure 18  
VCC = 2.7 V to 3.6 V  
-
-
-
-
dB  
pC  
Qinj  
charge injection  
fi = 1 MHz; CL = 0.1 nF; RL = 1 M; Vgen = 0 V;  
Rgen = 0 ; see Figure 19  
VCC = 2.7 V to 3.6 V  
[1] fi is biased at 0.5VCC  
.
12.3 Test circuits  
V
0.5V  
CC  
CC  
switch  
S
1
2
V
IL  
R
L
S
nY0  
nY1  
1
2
V
IH  
V
IL  
or V  
IH  
switch  
nZ  
f
i
dB  
GND  
001aam609  
To obtain 0 dBm level at output, adjust fi voltage. Increase fi frequency until dB meter reads 3 dB.  
Fig 16. Test circuit for measuring the frequency response when channel is in ON-state  
0.5V  
0.5V  
CC  
CC  
switch  
S
V
CC  
1
2
V
IH  
R
L
R
L
V
IL  
S
nY0  
nY1  
1
2
V
IL  
or V  
IH  
switch  
nZ  
f
dB  
i
GND  
001aam610  
To obtain 0 dBm level at input, adjust fi voltage.  
Fig 17. Test circuit for measuring isolation (OFF-state)  
NX3DV2567_Q100  
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Product data sheet  
Rev. 1 — 20 January 2014  
13 of 19  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
0.5V  
CC  
R
L
CHANNEL  
ON  
nY0 or nZ  
nZ or nY0  
f
50 Ω  
V
O1  
V
i
S
V
IL  
0.5V  
CC  
R
L
nY0 or nZ  
nZ or nY0  
CHANNEL  
OFF  
R
50 Ω  
i
V
V
O2  
001aam611  
20 log10 (VO2 / VO1) or 20 log10 (VO1 / VO2).  
Fig 18. Test circuit for measuring crosstalk between switches  
V
CC  
S
nY0  
nY1  
1
2
switch  
nZ  
R
gen  
G
V
V
R
L
C
L
V
I
O
V
gen  
GND  
001aam612  
a. Test circuit  
logic  
input  
(S) off  
on  
off  
V
O
ΔV  
O
001aam613  
b. Input and output pulse definitions  
Definition: Qinj = VO CL.  
VO = output voltage variation.  
Rgen = generator resistance.  
Vgen = generator voltage.  
Fig 19. Test circuit for measuring charge injection  
NX3DV2567_Q100  
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Product data sheet  
Rev. 1 — 20 January 2014  
14 of 19  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
13. Package outline  
HXQFN16U: plastic thermal enhanced extremely thin quad flat package; no leads;  
16 terminals; UTLP based; body 3 x 3 x 0.5 mm  
SOT1039-1  
D
B
A
terminal 1  
index area  
E
A
A
1
detail X  
e
1
e
1/2 e  
C
M
v
C A  
C
B
b
L
1
y
y
M
w
C
1
5
8
L
9
4
1
e
E
e
2
h
1/2 e  
12  
terminal 1  
index area  
16  
13  
X
D
h
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
UNIT  
A
b
D
D
h
E
E
e
e
1
e
2
L
L
v
w
y
y
1
1
h
1
max  
0.05 0.35  
0.00 0.25  
3.1  
2.9  
1.95  
1.75  
3.1  
2.9  
1.95  
1.75  
0.35  
0.25  
0.1  
0.0  
mm  
0.5  
0.5  
1.5  
1.5  
0.1  
0.05 0.05  
0.1  
REFERENCES  
OUTLINE  
VERSION  
EUROPEAN  
PROJECTION  
ISSUE DATE  
IEC  
- - -  
JEDEC  
JEITA  
07-11-14  
07-12-01  
SOT1039-1  
- - -  
Fig 20. Package outline SOT1039-1 (HXQFN16U)  
NX3DV2567_Q100  
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© NXP B.V. 2014. All rights reserved.  
Product data sheet  
Rev. 1 — 20 January 2014  
15 of 19  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
14. Abbreviations  
Table 13. Abbreviations  
Acronym  
CDM  
CMOS  
ESD  
Description  
Charged Device Model  
Complementary Metal-Oxide Semiconductor  
ElectroStatic Discharge  
HBM  
MM  
Human Body Model  
Machine Model  
PDA  
Personal Digital Assistant  
Transistor-Transistor Logic  
TTL  
15. Revision history  
Table 14. Revision history  
Document ID  
Release date  
20140120  
Data sheet status  
Change notice  
Supersedes  
NX3DV2567_Q100 v.1  
Product data sheet  
-
-
NX3DV2567_Q100  
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© NXP B.V. 2014. All rights reserved.  
Product data sheet  
Rev. 1 — 20 January 2014  
16 of 19  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
16. Legal information  
16.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
Suitability for use in automotive applications — This NXP  
16.2 Definitions  
Semiconductors product has been qualified for use in automotive  
applications. Unless otherwise agreed in writing, the product is not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors and its suppliers accept no liability for  
inclusion and/or use of NXP Semiconductors products in such equipment or  
applications and therefore such inclusion and/or use is at the customer's own  
risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
16.3 Disclaimers  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information. NXP Semiconductors takes no  
responsibility for the content in this document if provided by an information  
source outside of NXP Semiconductors.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
NX3DV2567_Q100  
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© NXP B.V. 2014. All rights reserved.  
Product data sheet  
Rev. 1 — 20 January 2014  
17 of 19  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
16.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
17. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
NX3DV2567_Q100  
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© NXP B.V. 2014. All rights reserved.  
Product data sheet  
Rev. 1 — 20 January 2014  
18 of 19  
NXP Semiconductors  
NX3DV2567-Q100  
Low-ohmic four-pole double-throw analog switch  
18. Contents  
1
2
3
4
5
6
General description. . . . . . . . . . . . . . . . . . . . . . 1  
Features and benefits . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
7
7.1  
7.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3  
8
Functional description . . . . . . . . . . . . . . . . . . . 3  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Recommended operating conditions. . . . . . . . 4  
9
10  
11  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5  
Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
ON resistance. . . . . . . . . . . . . . . . . . . . . . . . . . 6  
ON resistance test circuit and graphs. . . . . . . . 7  
11.1  
11.2  
11.3  
12  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9  
Waveform and test circuits . . . . . . . . . . . . . . . 11  
Additional dynamic characteristics . . . . . . . . . 13  
Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
12.1  
12.2  
12.3  
13  
14  
15  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 16  
16  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 17  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
16.1  
16.2  
16.3  
16.4  
17  
18  
Contact information. . . . . . . . . . . . . . . . . . . . . 18  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2014.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 20 January 2014  
Document identifier: NX3DV2567_Q100  

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