MMG3014N [NXP]

2110MHz - 2170MHz RF/MICROWAVE NARROW BAND HIGH POWER AMPLIFIER, SOT-89, 3 PIN;
MMG3014N
型号: MMG3014N
厂家: NXP    NXP
描述:

2110MHz - 2170MHz RF/MICROWAVE NARROW BAND HIGH POWER AMPLIFIER, SOT-89, 3 PIN

高功率电源 放大器 射频 微波 功率放大器
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Available at http://freescale.com/RFMMIC > Design Support  
> Reference Designs  
Freescale Semiconductor  
Technical Data  
Rev. 0, 2/2012  
RF Power Reference Design  
MMG3014N  
LTE 750 MHz Power Amplifier Lineup  
Driving  
MRFG35010AN  
LTE  
InGaP HBT Driving GaAs pHEMT  
Amplifier Lineup Characteristics  
This reference design provides a high-gain amplifier solution, specifically  
tuned for LTE and W--CDMA base station applications occupying the 725 to  
760 MHz frequency band.  
Typical Single--Carrier LTE Performance  
GPA: VCC = 5 Vdc, ICC = 132 mAdc  
Power GaAs FET: VDD = 12 Vdc, IDQ = 180 mA, VGS = --0.82 Vdc  
Output Power: 1.0 Watts Avg.  
10 MHz Channel Bandwidth @ 10 MHz Offset  
Input Signal PAR = 10.5 dB @ 0.01% Probability on CCDF,  
IQ Magnitude Clipping  
725--760 MHz, 1.0 W AVG., 12 V  
LTE AMPLIFIER LINEUP  
REFERENCE DESIGN  
G
η
Output PAR  
(dB)  
ACPR  
(dBc)  
ps  
D
Frequency  
740 MHz  
750 MHz  
760 MHz  
(dB)  
36.5  
36.4  
36.4  
(%)  
23.4  
24.1  
24.8  
9.0  
9.0  
8.9  
--40.3  
--40.4  
--40.4  
Output Capable of Handling 3:1 VSWR, @ 12 Vdc, 750 MHz,  
10 Watts CW Output Power  
Designed for Digital Predistortion Error Correction Systems  
MMG3014N/MRFG35010AN REFERENCE DESIGN  
The amplifier lineup consists of a GaAs HBT pre--driver  
document. Contact your local Freescale sales office or  
authorized Freescale distributor for additional information on  
reference design board availability for hands--on assessment  
and customization.  
and GaAs pHEMT driver amplifier, tuned for optimal gain,  
efficiency, linearity and dynamic range performance at  
1.0 Watts average output power. Performance  
characteristics of the reference design are provided in this  
V
DD  
V
V
GS  
CC  
RF  
OUTPUT  
RF  
INPUT  
MRFG35010AN  
MMG3014N  
Matching  
Input  
Matching  
Output  
Matching  
Matching  
Figure 1. Functional Block Diagram  
© Freescale Semiconductor, Inc., 2012. All rights reserved.  
AMPLIFIER LINEUP TEST CONDITIONS  
AMPLIFIER LINEUP — ALTERNATE  
CHARACTERISTICS  
Typical Single--Carrier W--CDMA Performance  
GPA: VCC = 5 Vdc, ICC = 132 mAdc  
Power GaAs FET: VDD = 12 Vdc, IDQ = 180 mA,  
GS = --0.82 Vdc  
Measured in 3.84 MHz Channel Bandwidth  
@ 5 MHz Offset  
V
Output Power: 1.0 Watts Avg.  
IQ Magnitude Clipping  
Input Signal PAR = 8.5 dB @ 0.01% Probability on CCDF  
G
η
Output PAR  
(dB)  
ACPR  
(dBc)  
Note: Refer to Appendix A for Power--up Sequence  
ps  
D
Frequency  
740 MHz  
750 MHz  
760 MHz  
(dB)  
36.4  
36.3  
36.3  
(%)  
23.8  
24.5  
25.2  
8.3  
8.2  
8.1  
--40.9  
--41.0  
--41.0  
REFERENCE DESIGN HARDWARE  
Figure 2. Performance Optimized Hardware  
HEATSINKING  
When operating this fixture it is important that adequate heatsinking  
is provided for the device. Excessive heating of the device may  
degrade the values of the included measurements and continued  
operation at excessive temperatures may destroy the device.  
MMG3014N Driving MRFG35010AN LTE Reference Design  
RF Reference Design Data  
Freescale Semiconductor, Inc.  
2
-- V  
+V  
GS  
DS  
C11  
C12  
C8  
C7  
C13  
C14  
C9  
C6  
C5  
C4  
C10  
C15  
C3  
C24  
C25  
L2  
C16  
Q2  
L1  
R1  
C2  
R2  
C18  
C21  
Q1  
C1  
C23  
C22  
C19 C20  
C17  
MMG3014N/MRFG35010AN  
Rev. 1  
Figure 3. MMG3014N Driving MRFG35010AN Board Layout  
Table 1. MMG3014N Driving MRFG35010AN Test Circuit Component Designations and Values  
Part  
Description  
100 pF Chip Capacitors  
22 pF Chip Capacitor  
Part Number  
ATC600F101JT250XT  
ATC600F220JT250XT  
ATC100A100JP150XT  
ATC100A101JP150XT  
ATC100B101JP500XT  
ATC100B102JP500XT  
CDR33BX104AKYS  
ATC200B393KP50XT  
T491X226K035AT  
ATC600F120JT250XT  
ATC600F1R8BT250XT  
ATC600F8R2BT250XT  
C0805C221J5GAC  
06035J5R6BBS  
Manufacturer  
C1, C18  
C2  
ATC  
ATC  
ATC  
ATC  
ATC  
ATC  
C3, C16  
C4, C15  
C5, C14  
C6, C13  
C7, C12  
C8, C11  
C9, C10  
C17  
10 pF Chip Capacitors  
100 pF Chip Capacitors  
100 pF Chip Capacitors  
1000 pF Chip Capacitors  
0.1 μF Chip Capacitors  
39K pF Chip Capacitor  
22 μF, 35 V Tantalum Capacitors  
12 pF Chip Capacitor  
Kemet  
ATC  
Kemet  
ATC  
C19  
1.8 pF Chip Capacitor  
8.2 pF Chip Capacitor  
220 pF Chip Capacitors  
5.6 pF Chip Capacitor  
2.2 μF, 16 V Tantalum Capacitor  
0.1 μF Chip Capacitor  
4.7 nH Chip Inductor  
ATC  
C20  
ATC  
C21, C23  
C22  
Kemet  
AVX  
C24  
T491A225K016AS  
C0603C104J5RAC  
LL1608--FH4N7S  
Kemet  
Kemet  
TOKO  
TOKO  
Freescale  
Freescale  
KOA Speer  
Newark  
Rogers  
C25  
L1  
L2  
10 nH Chip Inductor  
LL1608--FH10NJ  
Q1  
Power FET GaAs Transistor  
InGaP HBT GPA  
MRFG35010ANT1  
MMG3014NT1  
Q2  
R1  
51 Ω, 1/8 W Chip Resistor  
5.1 Ω, 1/4 W Chip Resistor  
RM73BIJT510J  
R2  
CRCW08055R10JNEA  
RO4350B  
PCB  
0.020, ε = 3.5  
r
MMG3014N Driving MRFG35010AN LTE Reference Design  
RF Reference Design Data  
Freescale Semiconductor, Inc.  
3
TYPICAL CHARACTERISTICS — 10 MHz LTE Test Signal  
(Single--Carrier LTE, Test Model 1.1, 10 MHz, PAR = 10.5 dB @ 0.01% Probability on CCDF)  
38  
37  
40  
740 MHz  
750 MHz  
750 MHz  
30  
760 MHz  
760 MHz  
36  
35  
20  
10  
740 MHz  
= 5 Vdc  
V
= 5 Vdc  
= 132 mA  
= 12 Vdc  
CC  
V
I
CC  
I
CC  
= 132 mA  
CC  
V
DD  
V
= 12 Vdc  
= 180 mA  
= --0.82 Vdc  
DD  
I
V
= 180 mA  
DQ  
I
DQ  
= --0.82 Vdc  
GS  
V
GS  
34  
0
14  
19  
24  
, OUTPUT POWER (dBm)  
29  
34  
14  
19  
24  
P , OUTPUT POWER (dBm)  
out  
29  
34  
P
out  
Figure 4. Power Gain versus Output Power  
Figure 5. Drain Efficency versus Output Power  
-- 3 0  
-- 3 6  
11  
10  
740 MHz  
750 MHz  
740 MHz  
750 MHz  
760 MHz  
-- 4 2  
-- 4 8  
9
8
V
= 5 Vdc  
= 132 mA  
= 12 Vdc  
V
= 5 Vdc  
CC  
= 132 mA  
= 12 Vdc  
DD  
CC  
I
I
CC  
CC  
V
V
DD  
I
V
= 180 mA  
I
V
= 180 mA  
DQ  
DQ  
760 MHz  
19  
= --0.82 Vdc  
= --0.82 Vdc  
19  
GS  
GS  
-- 5 4  
14  
7
24  
, OUTPUT POWER (dBm)  
29  
34  
14  
24  
29  
34  
P
P
, OUTPUT POWER (dBm)  
out  
out  
Figure 6. Adjacent Channel Power versus  
Output Power  
Figure 7. Peak--to--Average Ratio versus  
Output Power  
10 MHz LTE TEST SIGNAL  
100  
10  
1
10  
0
-- 1 0  
-- 2 0  
-- 3 0  
-- 4 0  
10 MHz  
Channel BW  
Input Signal  
0.1  
0.01  
-- 5 0  
-- 6 0  
LTE. ACPR Measured in 10 MHz  
+ACPR in 10 MHz  
Integrated BW  
--ACPR in 10 MHz  
Integrated BW  
Channel Bandwidth @ ±10 MHz Offset.  
Input Signal PAR = 10.5 dB @ 0.01%  
Probability on CCDF  
-- 7 0  
-- 8 0  
0.001  
0
3
6
9
12  
-- 9 0  
PEAK--TO--AVERAGE (dB)  
--100  
Figure 8. CCDF LTE IQ Magnitude Clipping,  
Single--Carrier Test Signal  
--25 -- 2 0 -- 1 5 -- 1 0 -- 5  
0
5
10  
15  
20 25  
f, FREQUENCY (MHz)  
Figure 9. Single--Carrier LTE Spectrum  
MMG3014N Driving MRFG35010AN LTE Reference Design  
RF Reference Design Data  
Freescale Semiconductor, Inc.  
4
TYPICAL CHARACTERISTICS — 8.5 dB Input PAR W--CDMA Test Signal  
(Single--Carrier W--CDMA, 3GPP Test Model 1, 64 DPCH, PAR = 8.5 dB @ 0.01% Probability on CCDF)  
38  
40  
30  
740 MHz  
740 MHz  
750 MHz  
37  
760 MHz  
36  
35  
20  
10  
760 MHz  
750 MHz  
= 5 Vdc  
V
= 5 Vdc  
= 132 mA  
= 12 Vdc  
CC  
V
I
CC  
I
CC  
= 132 mA  
CC  
V
DD  
V
= 12 Vdc  
= 180 mA  
= --0.82 Vdc  
DD  
I
V
= 180 mA  
DQ  
I
DQ  
= --0.82 Vdc  
GS  
V
GS  
34  
0
14  
19  
24  
, OUTPUT POWER (dBm)  
29  
34  
14  
19  
24  
P , OUTPUT POWER (dBm)  
out  
29  
34  
P
out  
Figure 10. Power Gain versus Output Power  
Figure 11. Drain Efficency versus Output Power  
-- 3 0  
-- 3 6  
10  
9
760 MHz  
750 MHz  
740 MHz  
750 MHz  
-- 4 2  
-- 4 8  
8
7
740 MHz  
V
I
= 5 Vdc  
= 132 mA  
= 12 Vdc  
= 180 mA  
= --0.82 Vdc  
V
I
= 5 Vdc  
= 132 mA  
= 12 Vdc  
= 180 mA  
= --0.82 Vdc  
CC  
CC  
CC  
CC  
V
I
V
I
DD  
DD  
DQ  
DQ  
760 MHz  
19  
V
V
GS  
GS  
-- 5 4  
6
14  
24  
, OUTPUT POWER (dBm)  
29  
34  
14  
19  
24  
29  
34  
P
P
, OUTPUT POWER (dBm)  
out  
out  
Figure 12. Adjacent Channel Power versus  
Output Power  
Figure 13. Peak--to--Average Ratio versus  
Output Power  
8.5 dB W--CDMA TEST SIGNAL  
100  
10  
1
10  
0
-- 1 0  
-- 2 0  
-- 3 0  
-- 4 0  
3.84 MHz  
Channel BW  
Input Signal  
0.1  
0.01  
-- 5 0  
-- 6 0  
W--CDMA. ACPR Measured in 3.84 MHz  
Channel Bandwidth @ ±5 MHz Offset.  
Input Signal PAR = 8.5 dB @ 0.01%  
Probability on CCDF  
+ACPR in 3.84 MHz  
Integrated BW  
--ACPR in 3.84 MHz  
Integrated BW  
-- 7 0  
-- 8 0  
0.001  
0
3
6
9
12  
-- 9 0  
PEAK--TO--AVERAGE (dB)  
--100  
Figure 14. CCDF W--CDMA IQ Magnitude  
Clipping, Single--Carrier Test Signal  
-- 9 -- 7 . 2 -- 5 . 4 -- 3 . 6 -- 1 . 8  
0
1.8 3.6  
5.4 7.2  
9
f, FREQUENCY (MHz)  
Figure 15. Single--Carrier W--CDMA Spectrum  
MMG3014N Driving MRFG35010AN LTE Reference Design  
RF Reference Design Data  
Freescale Semiconductor, Inc.  
5
CHARACTERISTICS — CW Test Signal  
40  
30  
0
S21  
S11  
-- 7  
20  
10  
-- 1 4  
-- 2 1  
-- 2 8  
S22  
P
= --25 dBm  
600  
in  
0
500  
700  
800  
f, FREQUENCY (MHz)  
Note: Reference Impedance = 50 Ω  
900  
1000  
1100  
1200  
Figure 16. Small--Signal Gain, Input and Output Return  
Loss versus Frequency  
39  
60  
45  
f = 750 MHz  
38  
η
D
37  
36  
30  
15  
Gain  
35  
0
20  
25  
30  
, OUTPUT POWER (dBm)  
35  
40  
P
out  
Figure 17. Power Gain and Drain Efficency versus  
Output Power  
MMG3014N Driving MRFG35010AN LTE Reference Design  
RF Reference Design Data  
Freescale Semiconductor, Inc.  
6
APPENDIX A  
Power--Up Sequence  
The MMG3014N and MRFG35010AN devices are biased  
separately. Apply bias as follows:  
1. Terminate the RF input and output with 50  
impedances: no RF signal applied.  
2. Apply --1.5 Vdc supply across the --VGS (negative gate  
voltage) and GND terminals of MRFG35010AN.  
3. Apply +12 Vdc supply across the +VDS (positive drain  
voltage) and GND terminals of MRFG35010AN.  
4. Increase the --VGS value to set the IDQ (drain  
quiescent current) to 180 mA. --VGS should be  
approximately --0.82 Vdc.  
5. Apply +5 V supply to VCC terminal of MMG3014N.  
6. ICC should be around 132 mA.  
7. Apply RF signal to input terminal and set signal level to  
--20 dBm.  
Power--Down Sequence  
1. Remove RF signal from input terminal.  
2. Remove VCC from MMG3014N.  
3. Adjust MRFG35010AN’s --VGS to --1.5 Vdc.  
4. IDQ should be near zero.  
5. Remove +VDS from MRFG35010AN.  
6. Remove --VGS from MRFG35010AN.  
MMG3014N Driving MRFG35010AN LTE Reference Design  
RF Reference Design Data  
Freescale Semiconductor, Inc.  
7
APPENDIX B  
Tuning Tips  
Adjusting the value or location of C19 and C20 will have  
significant effect on ACPR, output return loss and  
efficiency.  
Adjusting the values or locations of C17 on  
MRFG35010AN input will have significant impact on gain  
and input return loss.  
MMG3014N Driving MRFG35010AN LTE Reference Design  
RF Reference Design Data  
Freescale Semiconductor, Inc.  
8
APPENDIX C  
Simulation Models  
Download simulation models of MMG3014N and  
MRFG35010AN from:  
http://www.freescale.com/RFMMIC (click on the “Design  
Support” tab)  
MMG3014N Driving MRFG35010AN LTE Reference Design  
RF Reference Design Data  
Freescale Semiconductor, Inc.  
9
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Available at http://freescale.com/RFMMIC > Design Support > Reference Designs  
Rev. 0, 2/2012  

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