MMA8491QR2 [NXP]

ACCELEROMETER 8G I2C 18QFN;
MMA8491QR2
型号: MMA8491QR2
厂家: NXP    NXP
描述:

ACCELEROMETER 8G I2C 18QFN

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MMA8491Q  
3-Axis Multifunction Digital Accelerometer  
Rev. 2.1 — 26 April 2016  
Data sheet: Technical data  
COMPANY PUBLIC  
1 General description  
The MMA8491Q is a low voltage, 3-axis low-g accelerometer housed in a 3 mm x 3 mm  
QFN package. The device can accommodate two accelerometer configurations, acting  
as either a 45° tilt sensor or a digital output accelerometer with I2C bus.  
As a 45° tilt sensor, the MMA8491Q device offers extreme ease of implementation by  
using a single line output per axis.  
As a digital output accelerometer, the 14-bit ±8 g accelerometer data can be read from  
the device with a 1 mg/LSB sensitivity.  
The extreme low power capabilities of the MMA8491Q will reduce the low data rate  
current consumption to less than 400 nA per Hz.  
2 Features and benefits  
Extreme low power, 400 nA per Hz  
Ultra-fast data output time, ~700 μs  
VDD supply range of 1.95 V to 3.6 V  
3 mm x 3 mm, 0.65 mm pitch with visual solder joint inspection  
±8 g full-scale range  
14-bit digital output, 1 mg/LSB sensitivity  
Output Data Rate (ODR), implementation based from < 1 Hz to 800 Hz1  
I2C digital interface  
3-axis, 45° tilt outputs  
3 Typical applications  
Smart grid: tamper detect  
Anti-theft  
White goods tilt  
Remote controls  
1 The ODR for this device is user defined by the period of the Enable pulsed signal. The maximum  
recommended frequency of the Enable signal or the ODR that can be achieved for this device is 800 Hz.  
 
 
 
NXP Semiconductors  
MMA8491Q  
3-Axis Multifunction Digital Accelerometer  
4 Ordering information  
Table 1. Ordering information  
Part Number  
Temperature Range  
Package  
Shipping  
MMA8491QT  
–40 to +85 °C  
–40 to +85 °C  
–40 to +85 °C  
QFN 12  
QFN 12  
QFN 12  
Tray  
MMA8491QR1  
MMA8491QR2  
1000 pc / Tape & Reel  
5000 pc / Tape & Reel  
5 Related documentation  
The MMA8491Q device features and operations are described in a variety of reference  
manuals, user guides, and application notes. To find the most current versions of these  
documents:  
1. Go to the NXP homepage at: http://www.nxp.com/  
2. In the Keyword search box at the top of the page, enter the device number  
MMA8491Q. In the Refine Your Result pane on the left, click on the Documentation  
link.  
6 Block diagram  
Figure 1. Block Diagram  
7 Pinout  
MMA8491Q is hosted in a 12-pin 3 mm x 3 mm QFN package. Ten pins are used for  
functions; two pins are unconnected. Refer to Table 2 for complete pin descriptions and  
functions.  
MMA8491Q  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2016. All rights reserved  
Data sheet: Technical data  
COMPANY PUBLIC  
Rev. 2.1 — 26 April 2016  
2 / 28  
 
 
 
 
 
 
NXP Semiconductors  
MMA8491Q  
3-Axis Multifunction Digital Accelerometer  
MMA8491Q  
Byp  
VDD  
1
2
3
4
10 Xout  
9
8
7
Yout  
Zout  
Gnd  
SDA  
EN  
Transparent top view  
Figure 2. Pin connection diagram  
Function  
Table 2. Pin descriptions  
Pin  
Symbol  
Description  
Pin status  
1
Byp  
Internal regulator The internal regulator voltage of 1.8 V is present on this  
output capacitor pin. Connect to external 0.1 μF bypass capacitor.  
connection  
Output  
2
3
VDD  
Power Supply  
Device power is supplied through the VDD line. Power  
supply decoupling capacitors should be placed as near as  
possible to pin 1 of the device.  
Input  
SDA  
I2C Data  
I2C Slave Data Line, open drain  
Input/Output  
7-bit I2C device address is 0x55  
The SDA and SCL I2C connections are open drain, and  
therefore usually require a pull-up resistor  
4
EN  
Enable pin  
The Enable pin fully turns on the accelerometer system  
when it is pulled up to logic high. The accelerometer  
system is turned off when the Enable pin is logic low.  
Input  
5
6
7
8
SCL  
Gnd  
Gnd  
Zout  
I2C Clock  
Ground  
Ground  
I2C Slave Clock Line, open drain  
Input  
Ground  
Ground  
Ground  
Ground  
Push-pull Z-Axis Output is high when acceleration is > 0.688 g (axis is | Output  
Tilt Detection  
Output  
φ| > 45°).  
Output is low when acceleration is ≤ 0.688 g (axis is |φ|  
≤ 45°).  
9
Yout  
Xout  
Push-pull Y-Axis  
Tilt Detection  
Output  
Output  
Output  
These pins are push-pull output pins.  
10  
Push-pull X-Axis  
Tilt Detection  
Output  
11  
12  
NC  
NC  
No internal  
connection  
No internal connection  
No internal connection  
No internal  
connection  
MMA8491Q  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2016. All rights reserved  
Data sheet: Technical data  
COMPANY PUBLIC  
Rev. 2.1 — 26 April 2016  
3 / 28  
 
 
NXP Semiconductors  
MMA8491Q  
3-Axis Multifunction Digital Accelerometer  
8 Recommended application diagram  
Figure 3. VDD connects to power supply and EN is pulsed  
To ensure the accelerometer is fully functional, connect the MMA8491Q as suggested in  
Figure 3.  
A capacitor must be connected to the Bypass pin (pin 1) to assist the internal voltage  
regulator. It is recommended to use a 0.1 μF capacitor. The capacitor should be placed  
as near as possible to the Bypass pin.  
The device power is supplied through the VDD line. The power supply decoupling  
capacitor should be placed as close as possible to the VDD pin.  
Use a 1.0 or 4.7 μF capacitor when the VDD and EN are not tied together.  
When VDD and EN are tied together, use a 0.1 μF capacitor. The 0.1 μF capacitor  
value has been chosen to minimize the average current consumption while still  
maintaining an acceptable level of power supply high frequency filtering.  
Both ground pins (pins 6 and 7) must be connected to ground.  
When the I2C communication line is used, use a pull-up resistor to connect to line SDA  
and SCL. The SCL line can be driven by a push-pull driver, in which case, no pull-up  
resistor is necessary. If SDA and SCL pins are not used, then they should be tied to  
ground.  
9 Sensing direction and output response  
The MMA8491Q has three tilt detection outputs: Xout, Yout, and Zout. The following  
figure shows the output results at the six different orientation positions.  
MMA8491Q  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2016. All rights reserved  
Data sheet: Technical data  
COMPANY PUBLIC  
Rev. 2.1 — 26 April 2016  
4 / 28  
 
 
 
NXP Semiconductors  
MMA8491Q  
3-Axis Multifunction Digital Accelerometer  
Top view  
Side view  
Back  
Portrait Up  
Pin 1  
Xout @ 0 g  
Yout @ 0 g  
Zout @ –1 g  
Gravity  
Xout @ 0 g  
Yout @ –1 g  
Zout @ 0 g  
Front  
Landscape Right  
Landscape Left  
Xout @ 0 g  
Yout @ 0 g  
Zout @ 1 g  
Xout @ –1 g  
Yout @ 0 g  
Zout @ 0 g  
Xout @ 1 g  
Yout @ 0 g  
Zout @ 0 g  
Z
Portrait Down  
X
Y
Xout @ 0 g  
Yout @ 1 g  
Zout @ 0 g  
(Top view)  
Reference frame for acceleration measurement  
Figure 4. Sensitive axes orientation and output response to ±1 g (gravity) stimulus  
10 Mechanical and electrical specifications  
10.1 Absolute maximum ratings  
Absolute maximum ratings are the limits the device can be exposed to without damage.  
Functional operation at absolute maximum rating is not guaranteed.  
Although this device contains circuitry to protect against damage due to high static  
voltage or electrostatic fields, it is advised that normal precautions be taken to avoid  
application of any voltage higher than the maximum-rated voltage.  
Table 3. Absolute maximum ratings  
Symbol  
gmax  
Rating  
Maximum acceleration (all axes, 100 μs)  
Analog supply voltage  
Min  
Max  
10 000  
3.6  
Unit  
V
VDD  
–0.3  
V
Ddrop  
Drop test  
1.8  
m
TAGOC  
TSTG  
Operating temperature  
–40  
–40  
+85  
°C  
°C  
Storage temperature  
+125  
Table 4. ESD and latch-up protection characteristics  
Symbol  
VHBM  
Rating  
Value  
Unit  
V
Human body model (HBM)  
Machine model (MM)  
±2000  
±200  
VMM  
V
MMA8491Q  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2016. All rights reserved  
Data sheet: Technical data  
COMPANY PUBLIC  
Rev. 2.1 — 26 April 2016  
5 / 28  
 
 
 
 
 
NXP Semiconductors  
MMA8491Q  
3-Axis Multifunction Digital Accelerometer  
Symbol  
Rating  
Value  
±500  
Unit  
V
VCDM  
ILU  
Charge device model (CDM)  
Latch-up current at TA = 85 °C  
±100  
mA  
10.2 Mechanical characteristics  
Table 5. Accelerometer mechanical characteristics  
VDD = 2.8 V, T = 25 °C, unless otherwise noted.  
Typical number is the target number, unless otherwise specified.  
All numbers are based on VDD cap = 4.7 μF.  
Parameter  
Symbol  
FS[1]  
So[2]  
Conditions  
Min  
Typ  
±8  
Max  
Unit  
g
Full-scale measurement range  
Sensitivity  
973  
1024  
1075  
5
counts/g  
%
Calibrated sensitivity error  
Cross-axis sensitivity  
Sensitivity temperature variation  
Zero-g level temperature variation  
Zero-g level offset accuracy  
Zero-g level after board mount  
Noise  
CSE[2]  
All axes, all ranges  
–5  
[1]  
CXSEN  
Die rotation included  
–4.2  
–0.014  
–0.98  
–100  
–120  
4.2  
%
TCS[1]  
TCO[1]  
TyOff[2][3]  
TyOffPBM[1][4]  
RMS[1]  
NL[1]  
TDL[6]  
TDL[1][4][6]  
–40 °C to +85 °C  
0.014  
0.98  
100  
120  
18  
%/°C  
mg/°C  
mg  
–40 °C to +85 °C  
mg  
11.5  
mg-rms  
%FS  
g
Nonlinearity  
Threshold / g-value[5]  
25 °C  
1
0.583  
0.577  
35.6  
35.2  
–40  
0.688  
0.688  
43.5  
43.5  
25  
0.780  
0.784  
51.3  
51.7  
85  
–40 °C to +85 °C  
25 °C  
[1]  
Threshold / Tilt angle[7]  
Temperature range  
TAGOC  
degrees  
°C  
–40 °C to +85 °C  
[1] Verified by characterization; not tested in production.  
[2] Parameters tested 100% at final test at room temperature.  
[3] Before board mount.  
[4] Post-board mount offset specifications are based on a 4-layer PCB, relative to 25 °C.  
[5] Internal threshold of output level change (from 0 g reference), g values are calculated from trip angles.  
[6] All angles are based on the trip angle from static 0 g to 1 g; the g-values are calculated from the trip angle.  
[7] Internal threshold of output level change (from 0 g reference).  
MMA8491Q  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2016. All rights reserved  
Data sheet: Technical data  
COMPANY PUBLIC  
Rev. 2.1 — 26 April 2016  
6 / 28  
 
 
 
NXP Semiconductors  
MMA8491Q  
3-Axis Multifunction Digital Accelerometer  
10.3 Electrical characteristics  
Table 6. Electrical characteristics  
VDD = 2.8 V, T = 25 °C, unless otherwise noted.  
Typical values represent mean or mean ±1 σ values, depending on the specific parameter.  
Typical number is the target number unless otherwise specified.  
All numbers are based on VDD cap = 4.7 μF.  
Symbol  
Parameter  
Supply voltage[1]  
Conditions  
Min  
1.71  
Typ  
1.8  
400[2][3][4]  
Max  
3.6  
980[1][5][6]  
Unit  
V
VDD  
IDD  
Supply current in one-shot mode  
VDD = 2.8 V, EN is  
nA/Hz  
pulsed to VDD for 1 ms  
ISD  
Supply current in shutdown  
mode  
VDD = 2.8 V, EN = 0  
1.8[2][3]  
68[1][6]  
nA  
[2]  
CBYP  
Bypass capacitor at Byp pin  
70  
100  
470  
nF  
V
[1]  
VOH  
High level output voltage Xout,  
Yout, Zout  
IO = 500 μA  
0.85  
* VDD  
[1]  
VOL  
Low level output voltage Xout,  
Yout, Zout  
IO = 500 μA  
VDD = 2.8 V  
0.15 * VDD  
V
V
[1]  
VIH  
High level input voltage EN  
0.85  
* VDD  
[1]  
VIL  
Low level input voltage EN  
VDD = 2.8 V  
IO = 3 mA  
0.15 * VDD  
V
V
V
[7]  
VOLS  
Low level output voltage SDA  
0.4  
[7]  
VIH  
High level input voltage SDA,  
SCL  
VDD = 2.8 V  
0.7 * VDD  
[7]  
VIL  
Low level input voltage SDA,  
SCL  
VDD = 2.8 V  
0.3 * VDD  
7.3  
V
[1]  
ISOURCE  
Output source current Xout,  
Yout, Zout  
Voltage high level  
mA  
Vout = 0.85 x  
VDD, VDD = 2.8 V  
[1]  
ISINK  
Output sink current Xout, Yout,  
Zout  
Voltage low level  
720[2][3][4]  
8.9  
900[1][5][6]  
mA  
μs  
Vout = 0.15 x  
VDD, VDD = 2.8 V  
TON  
/
Turn-on time  
[8]  
TACTIVE  
Measured from the time EN =  
1.95 V to valid outputs  
[7]  
TRST  
Reset Time  
VDD = 2.8 V  
1000  
μs  
The time between falling edge of  
EN and next rising edge of EN  
[1] Verified by characterization; not tested in production.  
[2] Evaluation data: not tested in production.  
[3] Typical number is mean data.  
[4] Data is based on typical bypass cap = 100 nF.  
[5] Data is based on max bypass cap = 470 nF.  
[6] Over temperature -40 °C to 85 °C.  
[7] Guaranteed by design.  
[8] For application connection, see Figure 3  
MMA8491Q  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2016. All rights reserved  
Data sheet: Technical data  
COMPANY PUBLIC  
Rev. 2.1 — 26 April 2016  
7 / 28  
 
 
 
NXP Semiconductors  
MMA8491Q  
3-Axis Multifunction Digital Accelerometer  
11 I2C Interface  
Acceleration data may be accessed through an I2C interface, thus making the device  
particularly suitable for direct interfacing with a microcontroller. The MMA8491Q features  
three interrupt signals that indicate the tilt-sensing results on X, Y, Z axis respectively.  
The raw accelerometer data are readable via I2C at the same time when an interrupt  
signal is available.  
The registers embedded inside the MMA8491Q are accessible through the I2C serial  
interface, Table 7. To enable the I2C interface, the EN pin must be HIGH. If either EN or  
VDD are absent, the MMA8491Q I2C interface reads invalid data. The I2C interface may  
be used for communications along with other I2C devices. Removing power from the VDD  
pin of the MMA8491Q does not affect the I2C bus.  
Table 7. Serial interface pins  
Pin  
SCL  
SDA  
Description  
I2C Serial Clock  
I2C Serial Data  
There are two signals associated with the I2C bus; the Serial Clock Line (SCL) and the  
Serial Data Line (SDA). The SDA is a bidirectional line used for sending and receiving  
the data to/from the interface. External pull-up resistors connected to VDD are expected  
for SDA and SCL. When the bus is free both the lines are HIGH. The I2C interface is  
compliant with Fast mode (400 kHz, Table 8).  
Table 8. I2C slave timing values  
Parameter  
Symbol  
I2C Fast Mode[1]  
Unit  
Min  
Max  
400  
SCL clock frequency  
fSCL  
0
kHz  
μs  
μs  
μs  
μs  
μs  
μs  
μs  
μs  
μs  
μs  
μs  
μs  
μs  
Bus-free time between STOP and START condition  
(Repeated) START hold time  
Repeated START setup time  
STOP condition setup time  
SDA data hold time  
tBUF  
1.3  
tHD;STA  
tSU;STA  
tSU;STO  
tHD;DAT  
tSU;DAT  
tLOW  
0.6  
0.6  
0.6  
0.9[2]  
0.05  
SDA setup time  
100  
SCL clock low time  
1.3  
SCL clock high time  
tHIGH  
tr  
0.6  
[3]  
[3]  
SDA and SCL rise time  
SDA and SCL fall time  
SDA valid time[4]  
20 + 0.1 Cb  
300  
300  
0.9[2]  
0.9[2]  
50  
tf  
20 + 0.1 Cb  
tVD;DAT  
tVD;ACK  
0
SDA valid acknowledge time[5]  
Pulse width of spikes on SDA and SCL that must be suppressed by tSP  
internal input filter  
Capacitive load for each bus line  
Cb  
400  
pF  
[1] All values referred to VIH(min) (0.3VDD) and VIL(max) (0.7VDD) levels.  
MMA8491Q  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2016. All rights reserved  
Data sheet: Technical data  
COMPANY PUBLIC  
Rev. 2.1 — 26 April 2016  
8 / 28  
 
 
 
 
NXP Semiconductors  
MMA8491Q  
3-Axis Multifunction Digital Accelerometer  
[2] This device does not stretch the LOW period (tLOW) of the SCL signal.  
[3] Cb = total capacitance of one bus line in pF.  
[4] tVD;DAT = time for data signal from SCL LOW to SDA output (HIGH or LOW, depending on which one is worse).  
[5] tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA output (HIGH or LOW, depending on which one is worse).  
Figure 5. I2C slave timing diagram  
11.1 I2C read operations  
The transaction on the bus is started through a start condition (START) signal. A START  
condition is defined as a HIGH-to-LOW transition on the data line while the SCL line is  
held HIGH.  
After START has been transmitted by the Master, the bus is considered busy. The next  
byte of data transmitted after START contains the slave address in the first seven bits,  
and the eighth bit tells whether the Master is receiving data from the slave or transmitting  
data to the slave. When an address is sent, each device in the system compares the first  
seven bits after a start condition with its address. If they match, then the device considers  
itself addressed by the Master.  
The ninth clock pulse, following the slave address byte, and each subsequent byte, is the  
acknowledge (ACK). The transmitter must release the SDA line during the ACK period.  
The receiver must then pull the data line LOW so that it remains stable low during the  
high period of the acknowledge clock period.  
A LOW-to-HIGH transition on SDA while SCL is HIGH is defined as a stop condition  
(STOP). A data transfer is always terminated by a STOP.  
A Master may also issue a repeated START during a data transfer. The MMA8491Q  
expects repeated STARTs to be used to randomly read from specific registers.  
The MMA8491Q accelerometer standard 7-bit slave address is 01010101(0x55).  
MMA8491Q  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2016. All rights reserved  
Data sheet: Technical data  
COMPANY PUBLIC  
Rev. 2.1 — 26 April 2016  
9 / 28  
 
 
 
NXP Semiconductors  
MMA8491Q  
3-Axis Multifunction Digital Accelerometer  
Table 9. I2C device address sequence  
Command  
[7:1] Device  
[7:1] Device  
Address  
[0] R/W  
[7:0] 8-bit  
Final Value  
Address  
01010101  
01010101  
Read  
Write  
0x55  
0x55  
1
0
0xAB  
0xAA  
11.1.1 Single-byte read  
The transmission of an 8-bit command begins on the falling edge of SCL. After the 8  
clock cycles are used to send the command, note that the data returned is sent with  
the MSB first after the data is received. Figure 6 shows the timing diagram for the  
accelerometer 8-bit I2C read operation.  
1. The Master (or MCU) transmits a start condition (ST) to the MMA8491Q, slave  
address (0x55), with the R/W bit set to “0” for a write, and the MMA8491Q sends an  
acknowledgement.  
2. Then the Master (or MCU) transmits the address of the register to read and the  
MMA8491Q sends an acknowledgement.  
3. The Master (or MCU) transmits a repeated start condition (SR) and then addresses  
the MMA8491Q (0x1D) with the R/ W bit set to 1 for a read from the previously  
selected register.  
4. The Slave then acknowledges and transmits the data from the requested register.  
5. The Master does not acknowledge (NAK) the transmitted data, but transmits a stop  
condition to end the data transfer.  
11.1.2 Multiple-byte read  
When performing a multiple-byte read or burst read, the MMA8491Q automatically  
increments the received register address commands after a read command is received.  
Therefore, after following the steps of a single-byte read, multiple bytes of data can be  
read from sequential registers after each MMA8491Q acknowledgment (AK) is received,  
until a no acknowledge (NAK) occurs from the Master, followed by a stop condition (SP)  
signaling an end of transmission.  
MMA8491Q  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2016. All rights reserved  
Data sheet: Technical data  
COMPANY PUBLIC  
Rev. 2.1 — 26 April 2016  
10 / 28  
 
 
 
NXP Semiconductors  
MMA8491Q  
3-Axis Multifunction Digital Accelerometer  
11.1.3 I2C data sequence diagrams  
Single-byte read  
Device  
Address[7:1]  
Register  
Address[7:0]  
Device  
Address[7:1]  
ST  
W
SR  
R
NAK SP  
Master  
AK  
AK  
AK  
Data[7:0]  
Slave  
Multiple-byte read  
Device  
Address[7:1]  
Register  
Address[7:0]  
Device  
Address[7:1]  
ST  
W
SR  
R
AK  
Master  
AK  
AK  
AK Data[7:0]  
Slave  
c o n tin u ed . . .  
AK  
AK  
NAK SP  
Master  
Data[7:0]  
Data[7:0]  
Data[7:0]  
Slave  
Legend  
ST: Start Condition  
SP: Stop Condition  
AK: Acknowledge  
NAK: No Acknowledge  
R: Read = 1  
W: Write = 0  
SR: Repeated Start Condition  
Figure 6. I2C data sequence diagrams  
12 Modes of operation  
EN = Low  
One sample  
is acquired  
V
= On  
EN = High  
DD  
OFF*  
Mode  
ACTIVE  
Mode  
STANDBY  
Mode  
SHUTDOWN  
Mode  
V
= Off  
V
= On  
V
= On  
V
= On  
DD  
DD  
DD  
DD  
EN = Don’t Care  
EN = Low  
EN = High  
EN = High  
*OFF mode can be entered from any state by removing the power.  
Figure 7. MMA8491Q operating modes  
Table 10. MMA8491Q operating modes  
Mode  
Conditions  
Function description  
Digital output state  
OFF  
VDD = OFF  
Device is powered off.  
Hi-Z  
Hi-Z  
EN = Don’t Care  
SHUTDOWN VDD = ON  
EN = Low  
All blocks are shut down.  
MMA8491Q  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2016. All rights reserved  
Data sheet: Technical data  
COMPANY PUBLIC  
Rev. 2.1 — 26 April 2016  
11 / 28  
 
 
 
 
 
NXP Semiconductors  
MMA8491Q  
3-Axis Multifunction Digital Accelerometer  
Mode  
Conditions  
Function description  
Digital output state  
ACTIVE  
VDD = ON  
All blocks are enabled.  
Deasserted, Xout = 0, Yout= 0, Zout = 0  
EN = High  
Device enters Standby mode automatically  
after data conversion.  
STANDBY  
VDD = ON  
EN = High  
Only digital output subsystem is enabled. Active, I2C outputs become valid  
Data is valid and available only in this  
stage.  
12.1 ACTIVE mode  
The accelerometer subsystem is turned on at the rising edge of the EN pin, and acquires  
one sample for each of the three axes. Note that EN should not be asserted before VDD  
reaches 1.95 V. Samples are acquired, converted, and compensated for zero-g offset  
and gain errors, and then compared to an internal threshold value of 0.688 g and stored.  
If any of the X, Y, Z axes sample’s absolute value > this threshold, then the  
corresponding outputs on these axes drive logic highs.  
If any of the X, Y, Z axes sample’s absolute value ≤ this threshold, then the  
corresponding outputs on these axes drive logic lows.  
Read register 00h in this stage to determine whether the sample data is ready to be read.  
12.2 STANDBY mode  
The device enters STANDBY mode automatically after the previously described function  
(powers into SHUTDOWN mode, ACTIVE mode) is accomplished. The digital output  
system outputs valid data, which can also be read via the I2C communication bus. This  
is the appropriate phase to read the measured data, either from the three push-pull logic  
outputs or through the I2C transaction. All other subsystems are turned off.  
These outputs are held until the MMA8491Q operation mode changes. For lower power  
consumption, deassert the EN pin as soon as data is read (to enter SHUTDOWN mode).  
12.3 Next sample acquisition  
The MMA8491Q needs to be brought back to the ACTIVE mode again by pulling EN pin  
up to a Logic 1. Another option is to power down the device and start from OFF mode as  
illustrated in Figure 7.  
For applications where sampling intervals are greater than 30 seconds, the host can shut  
off the tilt sensor power after acquisition of tilt sensor output data to conserve energy and  
prolong battery life.  
12.4 Power-up timing sequences  
The power-up timing sequence for MMA84591Q is shown in the following figure, where  
VDD is powered and the EN pin is activated to acquire a single sample. Additional  
samples can be acquired by repeating the EN pulse.  
MMA8491Q  
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OFF  
Hi-Z  
SHUTDOWN  
ACTIVE  
STANDBY  
SHUTDOWN  
V
DD  
EN  
Data  
Available  
Data  
t
ON  
Figure 8. MMA8491Q timing sequence  
tON is the time between EN to the end of ACTIVE stage, after which the newly acquired  
sample data is available.  
12.5 45° tilt detection  
The output value changes according to the absolute value of the acceleration of the  
MMA8491Q compared to the threshold:  
When the acceleration’s absolute value > the threshold 0.688 g, the output = 1.  
When the acceleration’s absolute value ≤ the threshold, the output = 0.  
For example,  
When the MMA8491Q is set on a table, it senses 1 g acceleration on Z-axis and  
senses 0 g on X- and Y-axes.  
When the MMA8491Q is flipped upside down on the table, it senses –1 g acceleration  
on Z-axis and senses 0 g on X- and Y-axes.  
In both cases Xout = 0, Yout = 0, and Zout = 1.  
12.6 Tilt angle  
Tilt angles can be calculated from the g-value threshold using the equation below. The  
tilt threshold is 0.688 g, which corresponds to 43.5°. Figure 9 illustrates the tilt angle  
threshold.  
g-value  
1g  
-------------------  
Tilt Angle = asin  
(
)
When 0 g acceleration is present on an axis, the tilt angle = 0°; when 1 g acceleration  
is present on an axis, the tilt angle = 90°.  
When the tilt angle > the tilt threshold, the output for the axis is HIGH; when the tilt  
angle ≤ the tilt threshold, the output for the axis is LOW.  
MMA8491Q  
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Tilt Angle φ = 55°  
Output = 1  
Ø
Horizontal  
Reference  
Projected g-value =  
Threshold (g-value) = 0.688g  
Threshold= 0.688g  
1g  
Ø
Horizontal  
Reference  
Ø
Horizontal  
Reference  
0.688g  
0.688g  
1g  
1g  
Tilt Angle φ = 70°  
Output = 1  
Tilt Angle φ = 30°  
Output = 0  
Figure 9. MMA8491Q output is based on tilt angle and sensor g-value  
MMA8491Q  
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13 Register descriptions  
Table 11. Register address map  
Name  
Type  
Register  
Address  
Auto-  
Reset  
Comment  
increment  
Address[1]  
STATUS  
R
R
R
R
R
R
R
0x00  
0x01  
0x02  
0x03  
0x04  
0x05  
0x06  
0x01  
0x02  
0x03  
0x04  
0x05  
0x06  
0x00  
0x00  
Read time status  
OUT_X_MSB  
OUT_X_LSB  
OUT_Y_MSB  
OUT_Y_LSB  
OUT_Z_MSB  
OUT_Z_LSB  
Output  
Output  
Output  
Output  
Output  
Output  
[7:0] are the 8 MSBs of the 14-bit sample  
[7:2] are the 6 LSBs of the 14-bit sample  
[7:0] are the 8 MSBs of the 14-bit sample  
[7:2] are the 6 LSBs of the 14-bit sample  
[7:0] are the 8 MSBs of the 14-bit sample  
[7:2] are the 6 LSBs of the 14-bit sample  
[1] Auto-increment is the I2C feature that the I2C read address is automatically updated after each read. Auto-increment addresses that are not a simple  
increment are highlighted in bold. The auto-increment addressing is only enabled when device registers are read using I2C burst read mode. Therefore  
the internal storage of the auto-increment address is cleared whenever a stop-bit is detected.  
Notes:  
Register contents are preserved when EN pin is set high after sampling.  
Register contents are reset when EN pin is set low.  
13.1 STATUS - Status register (address 00h)  
Register 0x00 reflects the real-time status information of the X, Y, and Z sample data.  
The data read bits (ZYXDR, ZDR, YDR, XDR) are set when samples are taken and ready  
to be read.  
Table 12. STATUS - Status register (address 00h) bit allocation  
Bit  
7
6
5
4
3
2
ZDR  
0
1
YDR  
0
0
XDR  
0
Symbol  
Reset  
ZYXDR  
0
0
0
0
0
Access  
R
R
R
R
R
R
R
R
Table 13. STATUS - Status register (address 00h) field descriptions  
Field  
Description  
3
X-, Y-, Z-axis new Data Ready (and available)  
ZYXDR signals that a new sample for all channels is available.  
ZYXDR  
ZYXDR is cleared when the high-bytes of the acceleration data (OUT_X_MSB, OUT_Y_MSB,  
OUT_Z_MSB) of all channels are read..  
0: No new set of data ready (default value)  
1: A new set of XYZ acceleration and temperature data is available  
2
Z-axis new Data Ready (and available)  
ZDR  
ZDR is set whenever a new acceleration sample related to the Z-axis is generated.  
ZDR is cleared anytime OUT_Z_MSB register is read.  
0: No new Z-axis data is ready (default value)  
1: A new Z-axis data is ready  
MMA8491Q  
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Field  
Description  
1
Y-axis new Data Ready (and available)  
YDR  
YDR is set whenever a new acceleration sample related to the Y-axis is generated.  
YDR is cleared anytime OUT_Y_MSB register is read.  
0: No new Y-axis data ready (default value)  
1: A new Y-axis data is ready  
0
X-axis new Data Ready (and available)  
XDR  
XDR is set whenever a new acceleration sample related to the X-axis is generated.  
XDR is cleared anytime OUT_X_MSB register is read.  
0: No new X-axis data ready (default value)  
1: A new X-axis data is ready  
13.2 Output data registers (addresses 01h to 06h)  
These registers contain the X-axis, Y-axis, and Z-axis14-bit output sample data  
(expressed as 2's complement numbers).  
OUT_X_MSB, OUT_X_LSB, OUT_Y_MSB, OUT_Y_LSB, OUT_Z_MSB, and  
OUT_Z_LSB are stored in the autoincrementing address range of 0x01 – 0x06.  
The LSB registers can only be read immediately following the read access of the  
corresponding MSB register. A random read access to the LSB registers is not  
possible.  
Reading the MSB register and then the LSB register in sequence ensures that both  
bytes (LSB and MSB) belong to the same data sample, even if a new data sample  
arrives between reading the MSB and the LSB byte.  
The accelerometer data registers should be read only after the status register has  
confirmed that new data on all axes is available.  
Table 14. OUT_X_MSB - Output data register (address 01h) bit allocation  
Bit  
7
6
5
4
3
2
1
0
Symbol  
Reset  
XD[13:6]  
0
0
0
0
0
0
0
0
Access  
R
R
R
R
R
R
R
R
Table 15. OUT_X_LSB - Output data register (address 02h) bit allocation  
Bit  
7
6
5
4
3
2
1
0
0
Symbol  
Reset  
XD[5:0]  
0
0
0
0
0
0
0
Access  
R
R
R
R
R
R
R
R
MMA8491Q  
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Table 16. OUT_Y_MSB - Output data register (address 03h) bit allocation  
Bit  
7
6
5
4
3
2
1
0
Symbol  
Reset  
YD[13:6]  
0
0
0
0
0
0
0
0
Access  
R
R
R
R
R
R
R
R
Table 17. OUT_Y_LSB - Output data register (address 04h) bit allocation  
Bit  
7
6
5
4
3
2
1
0
0
0
Symbol  
Reset  
YD[13:6]  
0
0
0
0
0
0
Access  
R
R
R
R
R
R
R
R
Table 18. OUT_Z_MSB - Output data register (address 05h) bit allocation  
Bit  
7
6
5
4
3
2
1
0
Symbol  
Reset  
OUT_Z[7:0]  
0
0
0
0
0
0
0
0
Access  
R
R
R
R
R
R
R
R
Table 19. OUT_Z_LSB - Output data register (address 06h) bit allocation  
Bit  
7
6
5
4
3
2
1
0
0
0
Symbol  
Reset  
ZD[5:0]  
0
0
0
0
0
0
Access  
R
R
R
R
R
R
R
R
13.3 Accelerometer output conversion  
Table 20. Accelerometer output data  
14-bit Data  
Range ±8 g (1 mg/count)  
01 1111 1111 1111  
01 1111 1111 1110  
...  
+8.000 g  
+7.998 g  
...  
00 0000 0000 0000  
11 1111 1111 1111  
...  
0.000 g  
–0.001 g  
...  
10 0000 0000 0001  
10 0000 0000 0000  
–7.998 g  
–8.000 g  
MMA8491Q  
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14 Mounting guidelines  
Surface-mount printed circuit board (PCB) layout is a critical portion of the total design.  
The footprint for the surface mount package must be the correct size to ensure proper  
solder connection interface between the PCB and the package. With the correct  
footprint, the package will self-align when subjected to a solder reflow process. The  
purpose is to minimize the stress on the package after board mounting. The MMA8491Q  
accelerometers use the QFN package. This section describes suggested methods of  
soldering and mounting these devices to the PCB for consumer applications.  
14.1 Overview of soldering considerations  
The information provided here is based on experiments executed on QFN devices. They  
do not represent exact conditions present at a customer site. Therefore, information  
herein should be used as guidance only, and process and design optimizations are  
recommended to develop an application specific solution. It should be noted that with  
the proper PCB footprint and solder stencil designs, the package will self-align during the  
solder reflow process.  
14.2 Halogen content  
This package is designed to be Halogen Free, exceeding most industry and customer  
standards. Halogen Free means that no homogeneous material within the assembly  
package shall contain chlorine (Cl) in excess of 700 ppm or 0.07% weight/weight or  
bromine (Br) in excess of 900 ppm or 0.09% weight/weight.  
14.3 PCB mounting recommendations  
Do not solder down the six exposed pads under the package, thus minimizing board-  
mounting stress impact to product performance.  
PCB landing pad is 0.675 mm x 0.325 mm as shown in Figure 10.  
Solder mask opening = PCB land pad edge + 0.2 mm larger all around.  
Stencil opening size is 0.625 mm x 0.3 mm.  
Stencil thickness is 100 μm or 125 μm.  
The solder mask should not cover any of the PCB landing pads, as shown in Figure 10.  
No additional via nor metal pattern underneath package on the top of the PCB layer.  
Do not place any components or vias within 2 mm of the package land area. This may  
cause additional package stress if it is too close to the package land area.  
Signal traces connected to pads should be as symmetric as possible. Put dummy  
traces on NC pads, to have the same length of exposed trace for all pads.  
Use a standard pick-and-place process and equipment. Do not use a hand soldering  
process.  
Customers are advised to be cautious about the proximity of screw-down holes to the  
sensor, and the location of any press fit to the assembled PCB when in an enclosure.  
It is important that the assembled PCB remain flat after assembly to keep electronic  
operation of the device optimal.  
The PCB should be rated for the multiple lead-free reflow condition with a maximum  
260 °C temperature.  
NXP sensors are compliant with Restrictions on Hazardous Substances (RoHS),  
having halide-free molding compound (green) and lead-free terminations. These  
MMA8491Q  
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terminations are compatible with tin-lead (Sn-Pb) as well as tin-silver-copper (Sn-Ag-  
Cu) solder paste soldering processes. Reflow profiles applicable to those processes  
can be used successfully for soldering the devices.  
Figure 10. PCB footprint guidelines  
MMA8491Q  
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15 Package Information  
The MMA8491Q uses a 12-lead QFN package, case number 98ASA00290D.  
15.1 Tape and reel information  
Figure 11. Tape dimensions  
Pin 1  
Direction  
to unreel  
Barcode label  
side of reel  
Figure 12. Tape and reel orientation  
15.2 Package description  
This drawing is available for download at http://www.nxp.com/files/shared/doc/  
package_info/98ASA00290D.pdf. Please consult the most recently issued drawing before  
initiating or completing a design.  
MMA8491Q  
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Figure 13. Case 2169-02, Issue X1, 12-Lead QFN—page 1  
MMA8491Q  
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Figure 14. Case 2169-02, Issue X1, 12-Lead QFN—page 2  
MMA8491Q  
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Figure 15. Case 2169-02, Issue X1, 12-Lead QFN—page 3  
MMA8491Q  
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16 Revision history  
Revision Revision  
Description  
number  
date  
1.0  
10/2012  
11/2012  
4/2016  
Initial release  
2.0  
Characterization data verified to be complete and final  
2.1  
Added MMA8491QR2 to Ordering information table  
Added paragraphs describing absolute maximum ratings  
Revised package dimensions drawings to the NXP format, no technical changes  
The format of this data sheet has been redesigned to comply with the new identity guidelines  
of NXP Semiconductors  
Legal texts have been adapted to the new company name where appropriate  
MMA8491Q  
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17 Legal information  
Data sheet status  
Document status[1]  
Product status[2] Definition  
Data sheet: Product preview  
Development  
This document contains information on a product  
under development. NXP reserves the right to change  
or discontinue this product without notice.  
Data sheet: Advance information Qualification  
This document contains information on a pre-  
production product. Specifications and pre-production  
information herein are subject to change without  
notice.  
Data sheet: Technical data  
Production  
NXP reserves the right to change the production  
detail specifications as may be required to permit  
improvements in the design of its products.  
[1] Please consult the most recently issued document before initiating or completing a design.  
[2] The product status of device(s) described in this document may have changed since this document was published and  
may differ in case of multiple devices. The latest product status information is available on the Internet at URL nxp.com.  
Definitions  
Disclaimers  
Draft — The document is a draft version only. The  
content is still under internal review and subject to formal  
approval, which may result in modifications or additions.  
NXP Semiconductors does not give any representations  
or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the  
consequences of use of such information.  
Information in this document is provided solely to enable  
system and software implementers to use NXP products.  
There are no express or implied copyright licenses granted  
hereunder to design or fabricate any integrated circuits based  
on the information in this document. NXP reserves the right to  
make changes without further notice to any products herein.  
NXP makes no warranty, representation, or guarantee  
regarding the suitability of its products for any particular  
purpose, nor does NXP assume any liability arising out  
of the application or use of any product or circuit, and  
specifically disclaims any and all liability, including without  
limitation consequential or incidental damages. “Typical”  
parameters that may be provided in NXP data sheets and/  
or specifications can and do vary in different applications,  
and actual performance may vary over time. All operating  
parameters, including “typicals,” must be validated for each  
customer application by customer's technical experts. NXP  
does not convey any license under its patent rights nor the  
rights of others. NXP sells products pursuant to standard  
terms and conditions of sale, which can be found at the  
following address: nxp.com/salestermsandconditions.  
Trademarks  
NXP, the NXP logo, Freescale, the Freescale logo and  
SMARTMOS are trademarks of NXP B.V. All other product or  
service names are the property of their respective owners.  
MMA8491Q  
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Tables  
Tab. 1.  
Tab. 2.  
Tab. 3.  
Tab. 4.  
Tab. 5.  
Tab. 6.  
Tab. 7.  
Tab. 8.  
Tab. 9.  
Ordering information ..........................................2  
Tab. 14. OUT_X_MSB  
-
Output data register  
Pin descriptions .................................................3  
Absolute maximum ratings ................................5  
ESD and latch-up protection characteristics ......5  
Accelerometer mechanical characteristics ........ 6  
Electrical characteristics ....................................7  
Serial interface pins .......................................... 8  
I2C slave timing values .....................................8  
I2C device address sequence .........................10  
(address 01h) bit allocation .............................16  
Tab. 15. OUT_X_LSB - Output data register (address  
02h) bit allocation ............................................16  
Tab. 16. OUT_Y_MSB  
-
Output data register  
(address 03h) bit allocation .............................17  
Tab. 17. OUT_Y_LSB - Output data register (address  
04h) bit allocation ............................................17  
Tab. 18. OUT_Z_MSB  
-
Output data register  
Tab. 10. MMA8491Q operating modes ......................... 11  
Tab. 11. Register address map .....................................15  
Tab. 12. STATUS - Status register (address 00h) bit  
allocation ......................................................... 15  
(address 05h) bit allocation .............................17  
Tab. 19. OUT_Z_LSB - Output data register (address  
06h) bit allocation ............................................17  
Tab. 20. Accelerometer output data .............................. 17  
Tab. 13. STATUS - Status register (address 00h) field  
descriptions ..................................................... 15  
MMA8491Q  
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Figures  
Fig. 1.  
Fig. 2.  
Fig. 3.  
Block Diagram ...................................................2  
Fig. 9.  
MMA8491Q output is based on tilt angle and  
sensor g-value .................................................14  
Pin connection diagram .....................................3  
VDD connects to power supply and EN is  
pulsed ................................................................4  
Sensitive axes orientation and output  
response to ±1 g (gravity) stimulus ................... 5  
I2C slave timing diagram .................................. 9  
I2C data sequence diagrams .......................... 11  
MMA8491Q operating modes ......................... 11  
MMA8491Q timing sequence ..........................13  
Fig. 10. PCB footprint guidelines ..................................19  
Fig. 11. Tape dimensions .............................................20  
Fig. 12. Tape and reel orientation ................................20  
Fig. 13. Case 2169-02, Issue X1, 12-Lead QFN—  
page 1 ............................................................. 21  
Fig. 14. Case 2169-02, Issue X1, 12-Lead QFN—  
page 2 ............................................................. 22  
Fig. 15. Case 2169-02, Issue X1, 12-Lead QFN—  
page 3 ............................................................. 23  
Fig. 4.  
Fig. 5.  
Fig. 6.  
Fig. 7.  
Fig. 8.  
MMA8491Q  
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MMA8491Q  
3-Axis Multifunction Digital Accelerometer  
Contents  
1
General description ............................................ 1  
2
3
4
5
6
7
8
9
Features and benefits .........................................1  
Typical applications ............................................1  
Ordering information .......................................... 2  
Related documentation ...................................... 2  
Block diagram ..................................................... 2  
Pinout ................................................................... 2  
Recommended application diagram ..................4  
Sensing direction and output response ............4  
Mechanical and electrical specifications .......... 5  
Absolute maximum ratings ................................ 5  
Mechanical characteristics .................................6  
Electrical characteristics .................................... 7  
I2C Interface ........................................................ 8  
I2C read operations ...........................................9  
Single-byte read .............................................. 10  
Multiple-byte read ............................................ 10  
I2C data sequence diagrams ...........................11  
Modes of operation ...........................................11  
ACTIVE mode ..................................................12  
STANDBY mode ..............................................12  
Next sample acquisition ...................................12  
Power-up timing sequences ............................ 12  
45° tilt detection ...............................................13  
Tilt angle ..........................................................13  
Register descriptions ....................................... 15  
STATUS - Status register (address 00h) ......... 15  
Output data registers (addresses 01h to 06h) .. 16  
Accelerometer output conversion .................... 17  
Mounting guidelines ......................................... 18  
Overview of soldering considerations .............. 18  
Halogen content .............................................. 18  
PCB mounting recommendations .................... 18  
Package Information .........................................20  
Tape and reel information ............................... 20  
Package description ........................................ 20  
Revision history ................................................ 24  
Legal information ..............................................25  
10  
10.1  
10.2  
10.3  
11  
11.1  
11.1.1  
11.1.2  
11.1.3  
12  
12.1  
12.2  
12.3  
12.4  
12.5  
12.6  
13  
13.1  
13.2  
13.3  
14  
14.1  
14.2  
14.3  
15  
15.1  
15.2  
16  
17  
© NXP B.V. 2016. All rights reserved  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Released on 26 April 2016  

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