MC34933EPR2 [NXP]
HALF BRIDGE BASED PRPHL DRVR;
| 型号： | MC34933EPR2 |
| 厂家： | 
NXP |
| 描述： | HALF BRIDGE BASED PRPHL DRVR 驱动 接口集成电路 |
| 文件： | 总17页 (文件大小：526K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Document Number: MC34933
Rev. 3.0, 9/2014
escale Semiconductor
Technical Data
1.4 A Dual H-Bridge Driver
Compatible with 3.0 V Logic
34933
The 34933 is a two channel H-Bridge driver aimed at the digital
camera market. There are a variety of applications containing bipolar
step motors and/or brush DC motors, such as Auto Focus control for
the digital camera lens. The 34933 uses Freescale's proprietary
SMARTMOS process to deliver a low-power device, with a maximum
quiescent current of 100 A for the motor drive supply and 400A for
the control logic supply.
H-BRIDGE DRIVER
The 34933 VM supply operates from 2.0 V to 7.0 V using an internal
charge pump, with independent control of each H-Bridge driver via the
MCU (IN1A, IN1B, IN2A, IN2B). The 34933 has a low total RDS(on) of
1.0 (max. at 25 °C). Shoot-through current protection is a built-in
feature for the 34933 device.
EP SUFFIX (Pb-FREE)
98ASA00717D
The 34933 has four operation modes: forward, reverse, brake, and
tri-state (high-impedance). The 34933 employs a VCC detection circuit
to sense when the logic supply switches to an off-state with a maximum
current of 1.0 A to extend battery life. The H-Bridge drivers can be
independently pulse width modulated up to 200 kHz for speed/ torque
and/or current control. Note that tri-state mode of H-Bridge drivers can
occur when either VCC detect is low or the thermal detect is active.
16-PIN UQFN
ORDERING INFORMATION
Device
Temperature
Package
(For Tape and Reel, add an R2
Suffix)
Range (T )
A
Features
MC34933EP
-20 °C to 85 °C
16-UQFN
• Built-in 2-channel H-Bridge driver
• H-Bridge operation voltage 2.0 V to 7.0 V
• Max. load output current 1.0 A at TA = 25 °C
• Low total RDS(ON) 0.8 (typ), 1.0 (max.) @ TA = 25 °C peak
• Dual channel parallel driver, RDS(ON) 0.4 (typ.). max. DC current 1.4 A
• PWM control input frequency up to 200 kHz
• Built-in shoot-through current prevention circuit
• Built-in charge pump circuit (external cap type)
• VCC low voltage detection for logic power supply voltage
• Thermal detection for H-Bridge driver
3.0 V
5.0 V
34933
VCC
VG
VM1
VM2
OUT1A
OUT1B
CH
CL
IN1A
IN1B
IN2A
IN2B
MCU
Stepper
Motor
OUT2A
OUT2B
M
PGND1
PGND2
Figure 1. 34933 Simplified Application Diagram
© Freescale Semiconductor, Inc., 2012-2014. All rights reserved.
RNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VM
VCC
VG = VM+VCC
VCC
VG
VCCdet
tdet
VCC DETECTION
CH
CL
CHARGE PUMP
THERMAL DETECTION
VM1
VCC
VG
VCCdet
VCC
VCC
IN1A
High-side Driver
tdet
VCC
OUT1A
OUT1B
IN1B
IN2A
IN2B
LEVEL SHIFTER
PRE-DRIVER
Low-side Driver
High-side Driver
CONTROL
LOGIC
PGND1
VM2
OUT2A
OUT2B
Low-side Driver
PGND2
* VM1 and VM2 are connected internally. Both VM1 and VM2 must be tied together on the PCB.
PGND1 and PGND2 are connected internally. Both PGND1 and PGND2 must be tied together on the PCB.
Figure 2. 34933 Simplified Internal Block Diagram
34933
Analog Integrated Circuit Device Data
2
Freescale Semiconductor
PIN CONNECTIONS
PIN CONNECTIONS
16 15 14 13
OUT1A
PGND1
PGND2
OUT2A
1
2
3
4
12
11
10
9
VG
17
Exposed
Pad
VCC
IN1A
IN1B
5
6
7
8
Figure 3. 34933 Pin Connections
Formal Name
Table 1. 34933 Pin Definitions
Pin
Pin Name
Pin Function
Definition
Number
Output A of H-Bridge channel 1.
1
OUT1A
PGND1
Output
H-Bridge Output 1A
Power Ground 1
Power supply grounds for the 34933 device. Refer to the application
diagram for recommended layout.
2
3
Power supply
Power supply grounds for the 34933 device. Refer to the application
diagram for recommended layout.
PGND2
Power supply
Power Ground 2
Output A of H-Bridge channel 2
Output B of H-Bridge channel 2
4
5
OUT2A
OUT2B
Output
Output
H-Bridge Output 2A
H-Bridge Output 2B
Power supply pins for the 34933 motor drive circuitry. Refer to the
application diagram for recommended layout.
6
VM2
Power supply Motor Drive Power Supply 2
Logic input control of OUT2A
Logic input control of OUT2B
Logic input control of OUT1B
Logic input control of OUT1A
Power supply for the control logic circuitry.
7
8
IN2A
IN2B
IN1B
IN1A
VCC
Input
Input
Input
Input
Logic Input Control 2A
Logic Input Control 2B
Logic Input Control 1B
Logic Input Control 1A
9
10
11
Power supply Control Logic Power Supply
Charge pump output pin connected to an external capacitor. The VG
voltage is the sum of the VCC and VM power supplies.
Charge Pump Output
12
VG
Output
Capacitor
Low-side charge pump capacitor connection
High-side charge pump capacitor connection
13
14
CL
Input/Output Charge Pump Capacitor 1
Input/Output Charge Pump Capacitor 2
CH
Power Supply pins for the 34933 motor drive circuitry. Refer to the
application diagram for recommended layout.
15
16
VM1
Power supply Motor Drive Power Supply 1
Output B of H-Bridge channel 1
OUT1B
Output
H-Bridge Output 1B
EP
The exposed pad is connected to ground plane via the exposed pad
solder pad. Note the primary purpose of the exposed pad for 34933
is thermal heat dissipation. Therefore, adequate thermal vias should
be included in the PCB design.
17(1)
Exposed Pad Power supply
Notes
1. Exposed pad is used as a heat sink. Connect it to the power ground through four thermal vias where the area is wide.
34933
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
CTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Ratings
Value
Unit
Symbol
ELECTRICAL RATINGS
Control Logic Power Supply Voltage
VCC
VM
-0.5 to +6.0
-0.5 to +7.5
-0.5 to +5.5
-0.5 to +7.5
-0.5 to +13.5
0.7
V
V
V
V
V
A
A
A
W
V
Motor Drive Power Supply
VCC Level Pin Voltage - IN1A, IN1B, IN2A, IN2B
VM Level Pin Voltage - OUT1A, OUT1B, OUT2A, OUT2B, CL
VM+VCC Level Pin Voltage - CH, VG
Vpin1
Vpin2
Vpin3
Motor Drive Maximum Load Current, T = 85 °C
A
ILOAD_DC_MD
ILOAD_DC_MD
ILOAD_PEAK_MD
PD
Motor Drive Maximum Load Current, T = 25 °C
A
1.0
Motor Drive Maximum Peak Load Current(3)
Power Dissipation(4)
1.4
1.0
ESD Voltage(2)
VESD
Human Body Model (HBM)
Machine Model (MM)
Charge Device Model (CDM)
4000
350
1000
THERMAL RATINGS
Operating Temperature Range
Operating Junction Temperature
Storage Temperature Range
THERMAL RESISTANCE
T
-20 to +85
150
°C
°C
°C
A
T
J
TSTG
-65 to +150
Thermal Resistance, Junction to Case(5)
Peak Package Reflow Temperature During Reflow(6), (7)
Notes
RJC
23
C/W
TPPRT
Note 7
°C
2. ESD testing is performed in accordance with the Human Body Model (HBM) (CZAP = 100 pF, RZAP = 1500 ), the Machine Model (MM)
(CZAP = 200 pF, RZAP = 0 ), and the Charge Device Model (CDM), Robotic (CZAP = 4.0 pF).
3. Peak time is for 10 ms pulse width at 200 ms intervals. T = 25°C.
A
4.
R JA = 50 °C/W, in case of 2s2p printed circuit board that defined on SEMI JEDEC JESD51- 3 and JESD51-6.
5. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method 1012.1).
6. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
7. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL), go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and
enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics.
34933
Analog Integrated Circuit Device Data
4
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
STATIC AND DYNAMIC ELECTRICAL CHARACTERISTICS
STATIC AND DYNAMIC ELECTRICAL CHARACTERISTICS
Table 3. Static and Dynamic Electrical Characteristics
Characteristics noted under conditions, VM = 5.0 V, VCC = 3.0 V, unless otherwise noted. Typical values noted reflect the
approximate parameter means at TA = 25 °C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
POWER SUPPLY
Motor Drive Power Supply Voltage
Control Logic Power Supply Voltage
VM
VCC
IQM
2.0
2.7
5.0
3.0
7.0
5.5
V
V
Driver Quiescent Supply Current (IN1A, IN1B,IN2A, IN2B = L)
No Signal Input
uA
-
72
100
Logic Quiescent Supply Current (IN1A, IN1B, IN2A, IN2B = L)
No Signal Input
IQVCC
uA
-
-
114
350
400
800
Control Logic Power Supply Operating Current (IN1A, IN2A = L, IN1B, IN2B = 200kHz)
Charge Pump Target Voltage
IVCC
VG
uA
V
VM = 2.0 V, VCC = 2.7 V, I
VM = 5.0 V, VCC = 3.0 V, I
VM = 7.0 V, VCC = 5.5 V, I
0A
0A
0A
4.2
7.6
12.0
4.45
7.8
12.3
4.7
8.0
12.5
LOAD =
LOAD =
LOAD =
Charge Pump Wake-up Time
TVGON
IQM_VCD = L
FQP
us
uA
Charge pump is enabled in VCC > VCCDET
-
130
400
Driver Quiescent Supply Current at VCCDET = L
VM = 5.0 V, VCC = 0 V
-
-
-
1.0
-
Charge Pump Switching Frequency
H-BRIDGE DRIVER
150
kHz
H-Bridge Driver High/Low-side Driver On-Resistance 1
RON1
VCC = 2.7 V, ISINK = 100 mA, T
25 °C
-
-
0.4
0.45
0.51
A =
H-Bridge Driver High/Low-side Driver On-Resistance 2 (8)
VCC = 2.7 V, ISINK = 700 mA, T 25 °C
RON2
0.43
A =
H-Bridge Driver High/Low-side Driver On-Resistance 3 (8)
VCC = 2.7 V, ISINK = 700 mA, T 85 °C
RON3
-
-
0.51
0.39
0.62
0.43
A =
H-Bridge Driver High/Low-side Driver On-Resistance 4
VCC = 3.0 V, ISINK = 100 mA, T 25 °C
RON4
A =
H-Bridge Driver High/Low-side Driver On-Resistance 5 (8)
VCC = 3.0 V, ISINK = 700 mA, T 25 °C
RON5
RON6
VF
-
-
-
-
0.41
0.49
0.8
-
0.48
0.58
1.2
A =
H-Bridge Driver High/Low-side Driver On-Resistance 6 (8)
VCC = 3.0 V, ISINK = 700 mA, T 85 °C
A =
H-Bridge Driver Output Body Diode Forward Voltage
V
I = 100 mA
f
Input Pulse Frequency (INA/B)
Duty of input signal = 50 %
FIN
kHz
200
Notes
8. Guaranteed by design
34933
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
CTRICAL CHARACTERISTICS
STATIC AND DYNAMIC ELECTRICAL CHARACTERISTICS
Table 3. Static and Dynamic Electrical Characteristics
Characteristics noted under conditions, VM = 5.0 V, VCC = 3.0 V, unless otherwise noted. Typical values noted reflect the
approximate parameter means at TA = 25 °C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
H-BRIDGE DRIVER (CONTINUED)
H-Bridge Output Propagation Delay Time for OUTA/B (H to L)
tPDHL
us
RLOAD = (1.0 k) between OUTA and OUTB (refer to Figure 4) (IN1A, IN2A = L, IN1B,
-
0.1
0.5
IN2B = 200 kHz)
H-Bridge Output Propagation Delay Time for OUTA/B (L to H)
tPDLH
us
us
Rload = (1.0 k ) between OUTA and OUTB (refer to Figure 4) (IN1A, IN2A = L, IN1B,
IN2B = 200 kHz)
-
0.1
-
0.5
-
H-Bridge Output Pulse Width
tPW
RLOAD = 20 between OUTA and OUTB, Input Pulse Width = 1.0 s, 50% to 50%,
0.7
tPW: 50% to 50% (refer to Figure 5)
H-Bridge Output Propagation Delay Time (Hi-Z to H) (8)
tPDZH
us
us
RLOAD = 100 k to 1/2*VM, CLOAD = 0 pF, tPDZH 50% to 75%
-
-
-
-
0.5
2.0
H-Bridge Output Propagation Delay- Time (H to Hi-Z) (8)
tPDHZ
RLOAD = 100 k to 1/2*VM, CLOAD = 0 pF, tPDHZ 75% to 50%
CONTROL LOGIC
High Level Input Voltage (IN1A, IN1B, IN2A, IN2B)
VCC = 2.7 V ~ 5.5 V
VIH
VIL
IIH
IIL
V
V
VCCx0.7
-
-
-
-
-
-
-
VCCx0.3
20
Low Level Input Voltage (IN1A, IN1B, IN2A, IN2B)
VCC = 2.7 V ~ 5.5 V
-
High Level Input Current (IN1A, IN1B, IN2A, IN2B)
VTERMAINAL1 = 3.0 V
uA
uA
us
us
9
Low Level Input Current (IN1A, IN1B, IN2A, IN2B)
VCC = 2.7 V to 5.5 V
-1.0
-
Input Pulse Rise Time (IN1A, IN1B, IN2A, IN2B)
VCC = 2.7 V to 5.5 V
tR
-
-
1.0
Input Pulse Fall Time (IN1A, IN1B, IN2A, IN2B)
VCC = 2.7 V to 5.5 V
tF
1.0
DETECTOR
VCC Detection Voltage (refer to Figure 6)
VCC Detection hysteresis Voltage (refer to Figure 6)
Thermal Detection Temperature (9)
Thermal Detection Hysteresis Temperature (9)
VCCDET
2.0
2.2
0.1
170
20
2.4
0.3
190
30
V
V
VCCDETHYS 0.05
TDET
150
10
°C
°C
TDETHYS
Notes
9. Guaranteed by design
34933
Analog Integrated Circuit Device Data
6
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
TIMING DIAGRAMS
TIMING DIAGRAMS
VCC
50%
IN1A / IN2A
IN1B / IN2B
tPDLH
tPDHL
VM
90%
OUT1A / OUT2A
OUT1B/ OUT2B
10%
Figure 4. tPDLH and tPDHL Timing
VCC
50%
IN1A / IN2A
IN1B / IN2B
tPW
VM
OUT1A / OUT2A
OUT1B / OUT2B
50%
Figure 5. tPW Timing
Table 4. Truth Table
INPUT
OUTPUT
Vccdet
Tdet
IN1A
IN2A
IN1B
OUT1A
OUT2A
OUT1B
OUT2B
IN2B
X
L
X
L
L
L
L
H
X
L
Z
L
Z
L
H
H
H
H
H
L
H
L
L
H
L
L
H
H
Z
Z
H
X
H
Z
Z
X
H - High
L - Low
Z - High-impedance
X - Don’t Care
Figure 6 and Figure 7 show the timing charts of input and output signals
34933
Analog Integrated Circuit Device Data
Freescale Semiconductor
7
CTRICAL CHARACTERISTICS
TIMING DIAGRAMS
VM
Vc cdet
Vcc det
VC C
Vccdet-Vccdethys
Vccdet-Vcdethys
vccdet
(internal signal)
VG
TVGON
TVG ON
IN1A/IN2A
IN1B/IN2B
Brake
Brake
Brake
Brake
OUT1A/OUT2A
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
OUT2A/OUT2B
Hi-Z
Figure 6. Timing Chart of Input and Output Signal (VCCDET case)
VM
Vc cdet
Vccdet-Vccdethys
VCC
vccdet
(internal signal)
Tet
Tet-Tdethys
Temperature
tdet
(internal signal)
VG
TVGON
IN1A/IN2A
IN1B/IN2B
Brake
Brake
Brake
Brake
OUT1A/OUT2A
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
OUT2A/OUT2B
Figure 7. Timing Chart of Input and Output Signal (tDET case)
34933
Analog Integrated Circuit Device Data
8
Freescale Semiconductor
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
LOGIC SUPPLY (VCC)
MOTOR DRIVE POWER SUPPLY (VM1 AND VM2)
The VCC pin carries the logic supply voltage and current
into the logic sections of the IC. VCC has an under-voltage
threshold. If the supply voltage drops below the under-
voltage threshold, the output power stage switches to a tri-
state condition. When the supply voltage returns to a level
that is above the threshold, the power stage automatically
resumes normal operation according to the established
condition of the input pins.
The VM pins carry the main supply voltage and current into
the power sections of the IC. This supply then becomes
controlled and/or modulated by the IC as it delivers the power
to the loads attached between the output pins. All VM pins
must be connected together on the Printed Circuit Board
(PCB).
CHARGE PUMP (CL AND CH)
These two pins, the CL and CH, connect to the external
bucket capacitors required by the internal charge pump. The
typical value for the bucket capacitors is 0.1 F.
LOGIC INPUT CONTROL (IN1A, IN1B, IN2A, AND
IN2B)
These logic input pins control each H-Bridge output. IN1A
logic HIGH = OUT1A HIGH. However, if all inputs are HIGH,
the output bridges are both tri-stated (refer to Table 4, Truth
Table).
POWER GROUND (PGND)
Power ground pins must be tied together on the PCB and
connected to the common ground plane.
H-BRIDGE OUTPUT (OUT1A, OUT1B, OUT2A, AND
OUT2B)
LOGIC GROUND (EXPOSED PAD)
The Exposed Pad is connected to the PCB Ground plane
through vias by soldering. Note the primary purpose of the
Exposed pad for 34933 is thermal heat dissipation.
Therefore, adequate thermal vias should be included in the
PCB design. The exposed pad should be connected to the
common ground plane.
These pins provide connection to the outputs of each of
the internal H-Bridges (See Figure 2, 34933 Simplified
Internal Block Diagram).
VOLTAGE DETECTION AND THERMAL LIMIT DETECTION
The 34933 has the VCC Low Voltage Detection (Vccdet)
and the Thermal Detection (TDET). VCC Low Voltage Detec-
and stop H-Bridge operation. Table 5 shows block status of
34933 by each condition. VCC is the control logic power
supply for 34933. The system begins to operate when VCC
VCCDET (Typ. 2.2 V).
>
tion is designed to shutdown of IC functions when VCC
becomes lower than specified voltage. Thermal Detection
operates when the IC temperature exceeds specified value
Table 5. Block Status
Operation mode
Vccdet
Tdet
X
Charge Pump
Disable
H-Bridge Driver
Disable
1
2
3
L
H
H
L
Enable
Enable
H
Enable
Disable
H - High
L - Low
X - Don’t Care
34933
Analog Integrated Circuit Device Data
Freescale Semiconductor
9
CAL APPLICATION
TYPICAL APPLICATION
Figure 8 shows a typical application using the 34933. The internal charge pump of this device is powered from the VCC supply.
Therefore, care must be taken to ensure VCC is a high enough value to provide sufficient gate-source voltage for the high-side
MOSFETs when VM > VCC (e.g., VM = 5.0 V, VCC = 3.0 V), in order to ensure full enhancement of the high-side MOSFET
channels.
The 34933 can be configured in several applications. The figure below shows the 34933 in a typical Slave Node Application.
VM
0.1F
22F
0.1F
Motor
*1
*1
OUT1A
PGND1
PGND2
OUT2A
VG
12
11
10
9
1
2
3
4
VCC
17
VCC
IN1A
IN1B
Exposed pad
1F
*1
*1
Motor
MCU
interface:
VCC level
*1
*1 - It is recommend to use low resistance copper PCB traces between
VM & VCC ground and the PGND1/PGND2 pins.
Figure 8. Typical Application
34933
Analog Integrated Circuit Device Data
10
Freescale Semiconductor
PCB LAYOUT
PCB LAYOUT
When designing a printed circuit board (PCB), connect
sufficient capacitance between power supplies (VM & VCC)
and ground pins to ensure proper filtering from transients. For
all high-current paths, use wide copper traces and the
shortest possible distances. Note that capacitors should be
placed as close to the 34933 as possible to maximize the
filtering capability of each capacitor.
Additionally, care must be taken to avoid CEMF spikes
induced when inductive currents accumulate at the VM
supply. The typical method of snubbing inductive spikes
includes connecting a Zener diode or capacitor at the supply
pin (VM).
34933
Analog Integrated Circuit Device Data
Freescale Semiconductor
11
KAGING
PACKAGE DIMENSIONS
PACKAGING
PACKAGE DIMENSIONS
Package dimensions are provided in package drawings. To find the most current package outline drawing, go to
www.freescale.com and perform a keyword search for the drawing’s document number.
Table 6.
Package
Suffix
Package Outline Drawing Number
16-PIN UQFN
EP
98ASA00717D
34933
Analog Integrated Circuit Device Data
Freescale Semiconductor
12
PACKAGING
PACKAGE DIMENSIONS
.
34933
Analog Integrated Circuit Device Data
Freescale Semiconductor
13
KAGING
PACKAGE DIMENSIONS
34933
Analog Integrated Circuit Device Data
14
Freescale Semiconductor
PACKAGING
PACKAGE DIMENSIONS
34933
Analog Integrated Circuit Device Data
Freescale Semiconductor
15
SION HISTORY
REVISION HISTORY
REVISION
DATE
DESCRIPTION OF CHANGES
7/2010
12/2013
•
Initial Release.
2.0
•
•
•
No technical changes
Revised back page
Updated document properties
•
•
Changed 98A to 98ASA00717D
Update format
9/2014
3.0
34933
Analog Integrated Circuit Device Data
16
Freescale Semiconductor
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on the information in this document.
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respective owners.
© 2014 Freescale Semiconductor, Inc.
Document Number: MC34933
Rev. 3.0
9/2014
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