HEF4015BP,652 [NXP]
HEF4015B - Dual 4-bit static shift register DIP 16-Pin;型号: | HEF4015BP,652 |
厂家: | NXP |
描述: | HEF4015B - Dual 4-bit static shift register DIP 16-Pin 光电二极管 逻辑集成电路 触发器 |
文件: | 总14页 (文件大小:734K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HEF4015B
Dual 4-bit static shift register
Rev. 9 — 21 March 2016
Product data sheet
1. General description
The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel
converter). Each shift register has a serial data input (D), a clock input (CP), four fully
buffered parallel outputs (Q0 to Q3) and an overriding asynchronous master reset input
(MR). Information present on D is shifted to the first register position, and all the data in
the register is shifted one position to the right on the LOW-to-HIGH transition of CP. A
HIGH on MR clears the register and forces Q0 to Q3 to LOW, independent of CP and D.
The clock input’s Schmitt trigger action makes the input highly tolerant of slower clock rise
and fall times.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Tolerant of slow clock rise and fall times
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from 40 C to +85 C.
Complies with JEDEC standard JESD 13-B
3. Applications
Serial-to-parallel converter
Buffer stores
General purpose register
4. Ordering information
Table 1.
Ordering information
All types operate from 40 C to +85 C.
Type number
Package
Name
Description
Version
HEF4015BT
SO16
plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
HEF4015B
Nexperia
Dual 4-bit static shift register
5. Functional diagram
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Fig 1. Functional diagram
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Fig 2. Logic diagram for one register
HEF4015B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 9 — 21 March 2016
2 of 14
HEF4015B
Nexperia
Dual 4-bit static shift register
6. Pinning information
6.1 Pinning
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Fig 3. Pin configuration
6.2 Pin description
Table 2.
Symbol
1Q0 to 1Q3
2Q0 to 2Q3
1MR, 2MR
1D, 2D
Pin description
Pin
Description
parallel output
parallel output
5, 4, 3, 10
13, 12, 11, 2
6, 14
7, 15
8
master reset input (active HIGH)
serial data input
VSS
ground supply voltage
1CP, 2CP
VDD
9, 1
16
clock input (LOW-to-HIGH edge-triggered)
supply voltage
7. Functional description
Table 3.
Function table [1]
number of clock
pulse transitions
Input
Output
CP
D
MR
L
Q0
Q1
Q2
Q3
1
2
3
4
D1
D2
D3
D4
X
D1
X
X
X
L
D2
D1
X
X
L
D3
D2
D1
X
L
D4
D3
D2
D1
L
no change
L
no change
L
no change
L
no change
L
X
X
H
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Dn = either HIGH or LOW;
= positive-going transition; = negative-going transition.
HEF4015B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 9 — 21 March 2016
3 of 14
HEF4015B
Nexperia
Dual 4-bit static shift register
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDD
IIK
Parameter
Conditions
Min
0.5
-
Max
+18
Unit
V
supply voltage
input clamping current
input voltage
VI < 0.5 V or VI > VDD + 0.5 V
VO < 0.5 V or VO > VDD + 0.5 V
10
mA
V
VI
0.5
-
VDD + 0.5
10
IOK
output clamping current
input/output current
supply current
mA
mA
mA
C
II/O
-
10
IDD
-
50
Tstg
Tamb
Ptot
storage temperature
ambient temperature
total power dissipation
65
40
+150
+85
C
Tamb = 40 C to +85 C
SO16 package
[1]
-
-
500
100
mW
mW
P
power dissipation
per output
[1] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C.
9. Recommended operating conditions
Table 5.
Symbol
VDD
Recommended operating conditions
Parameter
Conditions
Min
Typ
Max
15
Unit
supply voltage
3
-
-
-
-
-
-
V
VI
input voltage
0
VDD
+85
3.75
0.5
V
Tamb
ambient temperature
input transition rise and fall rate
in free air
40
C
t/V
VDD = 5 V
VDD = 10 V
VDD = 15 V
-
-
-
s/V
s/V
s/V
0.08
HEF4015B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 9 — 21 March 2016
4 of 14
HEF4015B
Nexperia
Dual 4-bit static shift register
10. Static characteristics
Table 6.
Static characteristics
VSS = 0 V; VI = VSS or VDD unless otherwise specified.
Symbol Parameter
Conditions
VDD
Tamb = 40 C Tamb = 25 C
Tamb = 85 C Unit
Min
Max
-
Min
Max
-
Min
Max
VIH
HIGH-level input voltage
LOW-level input voltage
IO < 1 A
5 V
3.5
3.5
3.5
-
-
V
V
V
V
V
V
V
V
V
V
V
V
10 V
15 V
5 V
7.0
-
7.0
-
7.0
11.0
-
11.0
-
11.0
-
VIL
IO < 1 A
-
1.5
3.0
4.0
-
-
1.5
3.0
4.0
-
-
1.5
3.0
4.0
-
10 V
15 V
5 V
-
-
-
-
-
-
VOH
VOL
IOH
HIGH-level output voltage IO < 1 A
LOW-level output voltage IO < 1 A
4.95
4.95
4.95
10 V
15 V
5 V
9.95
-
9.95
-
9.95
-
14.95
-
14.95
-
14.95
-
-
0.05
0.05
0.05
1.7
0.52
1.3
3.6
-
-
0.05
0.05
0.05
1.4
0.44
1.1
3.0
-
-
0.05
0.05
0.05
10 V
15 V
5 V
-
-
-
-
-
-
HIGH-level output current VO = 2.5 V
-
-
-
1.1 mA
0.36 mA
0.9 mA
2.4 mA
VO = 4.6 V
VO = 9.5 V
VO = 13.5 V
5 V
-
-
-
10 V
15 V
5 V
-
-
-
-
-
-
IOL
LOW-level output current
VO = 0.4 V
VO = 0.5 V
VO = 1.5 V
0.52
0.44
0.36
-
-
-
mA
mA
mA
10 V
15 V
15 V
5 V
1.3
-
1.1
-
0.9
3.6
-
3.0
-
2.4
II
input leakage current
supply current
-
-
-
-
-
0.3
20
40
80
-
-
-
-
-
-
0.3
20
40
80
7.5
-
-
-
-
-
1.0 A
150 A
300 A
600 A
IDD
IO = 0 A
10 V
15 V
-
CI
input capacitance
-
pF
HEF4015B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 9 — 21 March 2016
5 of 14
HEF4015B
Nexperia
Dual 4-bit static shift register
11. Dynamic characteristics
Table 7.
Dynamic characteristics
VSS = 0 V; CL = 50 pF; Tamb = 25 C.
Symbol Parameter
Conditions
VDD
5 V
Extrapolation formula[1] Min
Typ
130
55
40
105
45
35
120
55
40
60
30
20
15
10
5
20
10
8
Max Unit
260 ns
110 ns
tPHL
HIGH to LOW
nCP to Qn;
see Figure 4
103 ns + (0.55 ns/pF)CL
44 ns + (0.23 ns/pF)CL
32 ns + (0.16 ns/pF)CL
78 ns + (0.55 ns/pF)CL
34 ns + (0.23 ns/pF)CL
27 ns + (0.16 ns/pF)CL
93 ns + (0.55 ns/pF)CL
44 ns + (0.23 ns/pF)CL
32 ns + (0.16 ns/pF)CL
10 ns + (1.00 ns/pF)CL
9 ns + (0.42 ns/pF)CL
6 ns + (0.28 ns/pF)CL
-
-
propagation delay
10 V
15 V
5 V
-
80
ns
nMR to Qn;
see Figure 6
-
210 ns
10 V
15 V
5 V
-
90
70
ns
ns
-
tPLH
LOW to HIGH
nCP to Qn
see Figure 4
-
240 ns
110 ns
propagation delay
10 V
15 V
5 V
-
-
80
ns
tt
transition time
set-up time
hold time
see Figure 4
-
120 ns
10 V
15 V
5 V
-
60
40
-
ns
-
ns
tsu
nD to nCP;
see Figure 5
+25
+25
+20
40
20
15
60
30
20
80
30
24
50
30
20
7
ns
10 V
15 V
5 V
-
ns
-
ns
th
nD to nCP;
see Figure 5
-
ns
10 V
15 V
5 V
-
ns
-
ns
tW
pulse width
nCP LOW;
minimum width;
see Figure 5
30
15
10
40
15
12
20
10
5
-
ns
10 V
15 V
5 V
-
ns
-
ns
nMR HIGH;
minimum width;
see Figure 6
-
ns
10 V
15 V
5 V
-
ns
-
ns
trec
recovery time
pin nMR;
see Figure 6
-
ns
10 V
15 V
5 V
-
ns
-
ns
fmax
maximum frequency see Figure 5
15
30
44
-
MHz
MHz
MHz
10 V
15 V
15
22
-
-
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
HEF4015B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 9 — 21 March 2016
6 of 14
HEF4015B
Nexperia
Dual 4-bit static shift register
Table 8.
Dynamic power dissipation PD
PD can be calculated from the formulas shown. VSS = 0 V; tr = tf 20 ns; Tamb = 25 C.
Symbol
Parameter
VDD
5 V
Typical formula for PD (W)
PD = 1500 fi + (fo CL) VDD
PD = 6300 fi + (fo CL) VDD
where:
2
2
PD
dynamic power
dissipation
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
10 V
15 V
2
PD = 17000 fi + (fo CL) VDD
VDD = supply voltage in V;
(CL fo) = sum of the outputs.
12. Waveforms
9
,
9
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0
9
66
W
W
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3+/
9
2+
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9
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W
W
W
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Measurement points are given in Table 9.
Fig 4. Waveforms showing nCP propagation delays and nQn transition times
W
:
9
,
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9
9
9
0
0
0
9
66
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W
W
K
K
9
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9
9
9
9
0
0
0
0
9
66
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W
VX
VX
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The shaded area indicates where the input is permitted to change for predictable output performance.
Set-up and hold times are shown as positive values but may be specified as negative values;
Measurement points are given in Table 9.
Fig 5. Waveforms showing set-up times, hold times, and minimum clock pulse width
HEF4015B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 9 — 21 March 2016
7 of 14
HEF4015B
Nexperia
Dual 4-bit static shift register
9
,
9
9
0
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9
9
66
W
:
W
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9
0
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Measurement points are given in Table 9.
Fig 6. Waveforms showing MR recovery time, propagation delay and minimum pulse width
Table 9. Measurement points
Supply voltage
VDD
Input
VM
Output
VM
5 V to 15 V
0.5VDD
0.5VDD
HEF4015B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 9 — 21 March 2016
8 of 14
HEF4015B
Nexperia
Dual 4-bit static shift register
W
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b. Test circuit
Test data is given in Table 10.
Definitions for test circuit:
DUT = Device Under Test;
CL = load capacitance including jig and probe capacitance;
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig 7. Test circuit for measuring switching times
Table 10. Test data
Supply voltage
VDD
Input
Load
CL
VI
tr, tf
5 V to 15 V
VSS or VDD
20 ns
50 pF
HEF4015B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 9 — 21 March 2016
9 of 14
HEF4015B
Nexperia
Dual 4-bit static shift register
13. Package outline
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Fig 8. Package outline SOT109-1 (SO16)
HEF4015B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 9 — 21 March 2016
10 of 14
HEF4015B
Nexperia
Dual 4-bit static shift register
14. Revision history
Table 11. Revision history
Document ID
HEF4015B v.9
Modifications:
HEF4015B v.8
Modifications:
Release date
20160321
Data sheet status
Change notice
Supersedes
Product data sheet
-
HEF4015B v.8
• Type number HEF4015BP (SOT38-4) removed.
20111121 Product data sheet
• Legal pages updated.
• Changes in “General description” and “Features and benefits”.
-
HEF4015B v.7
HEF4015B v.7
20110914
20091103
20090624
20090127
19950101
19950101
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Product specification
Product specification
-
-
-
-
-
-
HEF4015B v.6
HEF4015B v.5
HEF4015B v.4
HEF4015B_CNV v.3
HEF4015B_CNV v.2
-
HEF4015B v.6
HEF4015B v.5
HEF4015B v.4
HEF4015B_CNV v.3
HEF4015B_CNV v.2
HEF4015B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 9 — 21 March 2016
11 of 14
HEF4015B
Nexperia
Dual 4-bit static shift register
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.
Suitability for use — Nexperia products are not designed,
15.2 Definitions
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of a Nexperia product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. Nexperia and its suppliers accept no liability for
inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the Nexperia
product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
Nexperia does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using Nexperia
products in order to avoid a default of the applications and
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no
responsibility for the content in this document if provided by an information
source outside of Nexperia.
the products or of the application or use by customer’s third party
customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — Nexperia
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. Nexperia hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of Nexperia products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
HEF4015B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 9 — 21 March 2016
12 of 14
HEF4015B
Nexperia
Dual 4-bit static shift register
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Nexperia’s specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies Nexperia for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond Nexperia’s
standard warranty and Nexperia’s product specifications.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
HEF4015B
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 9 — 21 March 2016
13 of 14
HEF4015B
Nexperia
Dual 4-bit static shift register
17. Contents
1
2
3
4
5
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
7
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11
8
9
10
11
12
13
14
15
Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
15.1
15.2
15.3
15.4
16
17
Contact information. . . . . . . . . . . . . . . . . . . . . 13
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 21 March 2016
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