AV16600DGG-T [NXP]

IC ALVT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, Bus Driver/Transceiver;
AV16600DGG-T
型号: AV16600DGG-T
厂家: NXP    NXP
描述:

IC ALVT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, Bus Driver/Transceiver

信息通信管理 光电二极管 输出元件 逻辑集成电路
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INTEGRATED CIRCUITS  
74ALVT16600  
2.5V/3.3V 18-bit universal bus  
transceiver (3-State)  
Product specification  
1998 Feb 13  
Replaces data of 1997 May 12  
IC23 Data Handbook  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
2.5V/3.3V 18-bit universal bus transceiver (3-State)  
74ALVT16600  
FEATURES  
DESCRIPTION  
The 74ALVT16600 is a high-performance BiCMOS product  
18-bit bidirectional bus interface  
5V I/O Compatible  
designed for V operation at 2.5V and 3.3V with I/O compatibility  
CC  
up to 5V.  
This device is an 18-bit universal transceiver featuring non-inverting  
3-State bus compatible outputs in both send and receive directions.  
Data flow in each direction is controlled by output enable (OEAB and  
OEBA), latch enable (LEAB and LEBA), and clock (CPAB and  
CPBA) inputs. For A-to-B data flow, the device operates in the  
transparent mode when LEAB is High. When LEAB is Low, the A  
data is latched if CPAB is held at a High or Low logic level. If LEAB  
is Low, the A-bus data is stored in the latch/flip-flop on the  
High-to-Low transition of CPAB. When OEAB is Low, the outputs are  
active. When OEAB is High, the outputs are in the high-impedance  
state. The High clock can be controlled with the clock-enable inputs  
(CEBA/CEAB).  
3-State buffers  
Output capability: +64mA/-32mA  
TTL input and output switching levels  
Input and output interface capability to systems at 5V supply  
Bus-hold data inputs eliminate the need for external pull-up  
resistors to hold unused inputs  
Live insertion/extraction permitted  
Power-up reset  
Power-up 3-State  
No bus current loading when output is tied to 5V bus  
Negative edge-triggered clock inputs  
Latch-up protection exceeds 500mA per JEDEC JC40.2 Std 17  
Data flow for B-to-A is similar to that of A-to-B but uses OEBA,  
LEBA and CPBA.  
Active bus-hold circuitry is provided to hold unused or floating data  
inputs at a valid logic level.  
ESD protection exceeds 2000V per MIL STD 883 Method 3015  
and 200V per Machine Model  
QUICK REFERENCE DATA  
TYPICAL  
CONDITIONS  
SYMBOL  
PARAMETER  
UNIT  
T
amb  
= 25°C  
2.5V  
3.3V  
t
t
Propagation delay  
1.9  
2.5  
1.6  
1.9  
PLH  
PHL  
C = 50pF  
ns  
L
An to Bn or Bn to An  
Input capacitance DIR, OE  
I/O pin capacitance  
C
V = 0V or V  
I CC  
4
8
4
8
pF  
pF  
µA  
IN  
C
Outputs disabled; V = 0V or V  
CC  
I/O  
I/O  
I
Total supply current  
Outputs disabled  
40  
70  
CCZ  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
AV16600 DL  
DWG NUMBER  
SOT371-1  
56-Pin Plastic SSOP Type III  
56-Pin Plastic TSSOP Type II  
–40°C to +85°C  
–40°C to +85°C  
74ALVT16600 DL  
74ALVT16600 DGG  
AV16600 DGG  
SOT364-1  
PIN DESCRIPTION  
PIN NUMBER  
1, 27  
SYMBOL  
OEAB/OEBA  
CEBA/CEAB  
LEAB/LEBA  
CPAB/CPBA  
NAME AND FUNCTION  
A-to-B Output enable input (active Low)  
B-to-A / A-to-B clock enable (active Low)  
A-to-B/B-to-A Latch enable input  
29, 56  
2, 28  
55,30  
A-to-B/B-to-A Clock input (active falling edge)  
3, 5, 6, 8, 9, 10, 12, 13, 14, 15,  
16, 17, 19, 20, 21, 23, 24, 26  
A0-A17  
Data inputs/outputs (A side)  
Data inputs/outputs (B side)  
54, 52, 51, 49, 48, 47, 45, 44, 43,  
42, 41, 40, 38, 37, 36, 34, 33, 31  
B0-B17  
GND  
4, 11, 18, 25, 32, 39, 46, 53  
7, 22, 35, 50  
Ground (0V)  
V
CC  
Positive supply voltage  
2
1998 Feb 13  
853-1979 18958  
Philips Semiconductors  
Product specification  
2.5V/3.3V 18-bit universal bus transceiver (3-State)  
74ALVT16600  
FUNCTION TABLE  
PIN CONFIGURATION  
INPUTS  
OUTPUT  
OEAB  
LEAB  
A0  
1
2
3
4
5
6
7
8
9
CEAB  
OEAB  
LEAB  
CPAB  
A
X
L
B
Z
L
56  
CEAB  
55  
54  
53  
52  
CPAB  
B0  
X
X
X
H
L
H
L
L
L
L
L
L
L
X
H
H
L
X
X
X
X
GND  
A1  
GND  
B1  
H
X
L
H
O
B
B
A2  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
B2  
L
L
V
V
CC  
CC  
A3  
B3  
L
L
H
X
X
H
A4  
B4  
O
L
L
H
L
A5 10  
B5  
§
L
L
B
O
GND  
11  
GND  
B6  
X =Don’t care  
H =High voltage level  
L =Low voltage level  
A6 12  
A7 13  
B7  
A8 14  
B8  
=High-to-Low clock transition  
A-to-B data flow is shown: B-to-A flow is similar but uses OEBA,  
LEBA, CPBA, and CEBA.  
Output level before the indicated steady-state input conditions  
were established.  
Output level before the indicated steady-state input conditions  
were established, provided that CLKAB was Low before LEAB  
went Low.  
A9 15  
B9  
A10 16  
A11 17  
GND 18  
A12 19  
A13 20  
A14 21  
B10  
B11  
GND  
B12  
B13  
B14  
§
22  
V
V
CC  
CC  
A15 23  
A16 24  
B15  
B16  
GND 25  
A17 26  
GND  
B17  
OEBA  
LEBA  
27  
28  
CPBA  
CEBA  
SW00191  
3
1998 Feb 13  
Philips Semiconductors  
Product specification  
2.5V/3.3V 18-bit universal bus transceiver (3-State)  
74ALVT16600  
LOGIC DIAGRAM (Positive Logic)  
1
OEAB  
56  
CEAB  
55  
CPAB  
2
LEAB  
28  
LEBA  
30  
CPBA  
29  
CEBA  
27  
OEBA  
CE  
ID  
3
A0  
54  
B0  
C1  
CLK  
CE  
ID  
C1  
CLK  
To 17 other channels  
SW00190  
1, 2  
ABSOLUTE MAXIMUM RATINGS  
SYMBOL  
PARAMETER  
CONDITIONS  
RATING  
UNIT  
V
V
CC  
I
IK  
DC supply voltage  
–0.5 to +4.6  
–50  
DC input diode current  
V < 0  
I
mA  
V
3
V
I
DC input voltage  
–0.5 to +7.0  
–50  
I
DC output diode current  
V
O
< 0  
mA  
V
OK  
3
V
OUT  
DC output voltage  
Output in Off or High state  
Output in Low state  
–0.5 to +7.0  
128  
I
DC output current  
mA  
OUT  
Output in High state  
–64  
T
stg  
Storage temperature range  
–65 to +150  
°C  
NOTES:  
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the  
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to  
absolute-maximum-rated conditions for extended periods may affect device reliability.  
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction  
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.  
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.  
4
1998 Feb 13  
Philips Semiconductors  
Product specification  
2.5V/3.3V 18-bit universal bus transceiver (3-State)  
74ALVT16600  
RECOMMENDED OPERATING CONDITIONS  
2.5V RANGE LIMITS 3.3V RANGE LIMITS  
SYMBOL  
PARAMETER  
UNIT  
MIN  
2.3  
0
MAX  
2.7  
MIN  
3.0  
0
MAX  
3.6  
V
CC  
DC supply voltage  
Input voltage  
V
V
V
I
5.5  
5.5  
V
High-level input voltage  
Input voltage  
1.7  
2.0  
V
IH  
V
0.7  
–8  
8
0.8  
–32  
32  
V
IL  
I
High-level output current  
Low-level output current  
mA  
OH  
I
OL  
mA  
Low-level output current; current duty cycle 50%; f 1kHz  
Input transition rise or fall rate; Outputs enabled  
Operating free-air temperature range  
24  
10  
+85  
64  
t/v  
10  
ns/V  
T
amb  
–40  
–40  
+85  
°C  
DC ELECTRICAL CHARACTERISTICS (3.3V "0.3V RANGE)  
LIMITS  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
Temp = -40°C to +85°C  
UNIT  
1
MIN  
TYP  
MAX  
V
Input clamp voltage  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 3.0V; I = –18mA  
–0.85  
–1.2  
V
V
IK  
IK  
= 3.0 to 3.6V; I = –100µA  
V
–0.2  
V
CC  
OH  
CC  
V
OH  
High-level output voltage  
= 3.0V; I = –32mA  
2.0  
2.3  
0.07  
0.25  
0.3  
OH  
= 3.0V; I = 100µA  
0.2  
0.4  
OL  
V
OL  
Low–level output voltage  
= 3.0V; I = 16mA  
V
OL  
= 3.0V; I = 32mA  
0.5  
OL  
= 3.0V; I = 64mA  
0.4  
0.55  
OL  
6
V
Power-up output low voltage  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 3.6V; I = 1mA; V = V or GND  
0.55  
±1  
V
RST  
O
I
CC  
= 3.6V; V = V or GND  
Control pins  
0.1  
0.1  
I
CC  
= 0 or 3.6V; V = 5.5V  
10  
I
= 3.6V; V = 5.5V  
0.1  
20  
I
I
Input leakage current  
µA  
I
4
= 3.6V; V = V  
0.5  
10  
Data pins  
I
CC  
= 3.6V; V = 0V  
0.1  
-5  
I
I
Off current  
= 0V; V or V = 0 to 4.5V  
0.1  
±100  
µA  
µA  
OFF  
I
O
= 3V; V = 0.8V  
75  
130  
–140  
I
Bus Hold current  
= 3V; V = 2.0V  
–75  
I
I
HOLD  
7
Data inputs  
= 0V to 3.6V; V = 3.6V  
±500  
CC  
Current into an output in the  
I
V
= 5.5V; V = 3.0V  
10  
125  
µA  
µA  
EX  
O
CC  
High state when V > V  
O
CC  
Power up/down 3-State output  
V
CC  
1.2V; V = 0.5V to V ; V = GND or V  
O CC I CC  
I
1.0  
±100  
PU/PD  
3
current  
OE = Don’t care  
I
I
V
V
V
V
= 3.6V; Outputs High, V = GND or V I 0  
CC, O =  
0.06  
4.0  
0.1  
5
CCH  
CC  
CC  
CC  
CC  
I
I
Quiescent supply current  
= 3.6V; Outputs Low, V = GND or V I 0  
CC, O =  
mA  
mA  
CCL  
I
5
= 3.6V; Outputs Disabled; V = GND or V  
I 0  
CC, O =  
0.06  
0.1  
CCZ  
I
Additional supply current per  
= 3V to 3.6V; One input at V –0.6V,  
CC  
I  
0.04  
0.4  
CC  
2
input pin  
Other inputs at V or GND  
CC  
NOTES:  
1. All typical values are at V = 3.3V and T  
= 25°C.  
amb  
CC  
2. This is the increase in supply current for each input at the specified voltage level other than V or GND  
CC  
3. This parameter is valid for any V between 0V and 1.2V with a transition time of up to 10msec. From V = 1.2V to V = 3.3V ± 0.3V a  
CC  
CC  
CC  
transition time of 100µsec is permitted. This parameter is valid for T  
= 25°C only.  
amb  
4. Unused pins at V or GND.  
CC  
5. I  
is measured with outputs pulled up to V or pulled down to ground.  
CCZ  
CC  
6. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.  
7. This is the bus hold overdrive current required to force the input to the opposite logic state.  
5
1998 Feb 13  
Philips Semiconductors  
Product specification  
2.5V/3.3V 18-bit universal bus transceiver (3-State)  
74ALVT16600  
AC CHARACTERISTICS (3.3V "0.3V RANGE)  
GND = 0V; t = t = 2.5ns; C = 50pF; R = 500; T  
= –40°C to +85°C.  
R
F
L
L
amb  
LIMITS  
SYMBOL  
PARAMETER  
WAVEFORM  
V
CC  
= 3.3V ±0.3V  
UNIT  
1
MIN  
TYP  
MAX  
f
Maximum clock frequency  
1
2
300  
MHz  
ns  
MAX  
t
t
Propagation delay  
An to Bn or Bn to An  
1.0  
1.0  
1.6  
1.9  
2.3  
2.8  
PLH  
PHL  
t
t
Propagation delay Clock Low or High  
LEAB to Bn or LEBA to An  
1.5  
1.5  
2.2  
2.5  
3.3  
4.2  
PLH  
PHL  
3
1
ns  
ns  
ns  
ns  
t
t
Propagation delay  
CPAB to Bn or CPBA to An  
1.5  
1.5  
2.6  
3.2  
4.2  
4.8  
PLH  
PHL  
t
Output enable time  
to High and Low level  
5
6
1.5  
1.0  
2.2  
1.6  
3.4  
2.6  
PZH  
t
PZL  
t
Output disable time  
from High and Low Level  
5
6
1.5  
1.5  
2.6  
2.3  
3.8  
3.5  
PHZ  
t
PLZ  
NOTE:  
1. All typical values are at V = 3.3V and T  
= 25°C.  
CC  
amb  
AC SETUP REQUIREMENTS (3.3V "0.3V RANGE)  
GND = 0V; t = t = 2.5ns; C = 50pF, R = 500; T  
= –40°C to +85°C.  
R
F
L
L
amb  
LIMITS  
SYMBOL  
PARAMETER  
WAVEFORM  
V
CC  
= 3.3V ±0.3V  
UNIT  
1
MIN  
TYP  
ts(H)  
ts(L)  
Setup time, High or Low  
An to CPAB or Bn to CPBA  
2.0  
2.0  
0.8  
0.9  
4
4
4
4
4
4
ns  
ns  
ns  
ns  
ns  
ns  
th(H)  
th(L)  
Hold time, High or Low  
An to CPAB or Bn to CPBA  
0.0  
0.0  
–0.9  
–0.7  
ts(H)  
ts(L)  
Setup time, High or Low Clock Low  
An to LEAB or Bn to CPBA  
1.0  
1.0  
–0.4  
–0.1  
th(H)  
th(L)  
Hold time, High or Low Clock High  
An to LEAB or Bn to LEBA  
1.0  
1.0  
0.1  
0.4  
ts(H)  
ts(L)  
Setup time CEAB before CPAB or  
CEBA before CPBA  
1.5  
1.0  
0.3  
–0.6  
th(H)  
th(L)  
Hold time CEAB after CPAB or  
CEBA after CPBA  
1.5  
1.0  
0.7  
–0.2  
tw(H)  
tw(L)  
Pulse width, High or Low  
CPAB or CPBA  
1.5  
1.5  
1
3
ns  
ns  
tw(H)  
LEAB or LEBA pulse width, High  
1.5  
NOTE:  
1. All typical values are at V = 3.3V and T  
= 25°C.  
amb  
CC  
6
1998 Feb 13  
Philips Semiconductors  
Product specification  
2.5V/3.3V 18-bit universal bus transceiver (3-State)  
74ALVT16600  
DC ELECTRICAL CHARACTERISTICS (2.5V "0.2V RANGE)  
LIMITS  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
Temp = -40°C to +85°C  
UNIT  
1
MIN  
TYP  
MAX  
V
Input clamp voltage  
V
CC  
V
CC  
V
CC  
= 2.3V; I = –18mA  
–0.85  
–1.2  
V
V
IK  
IK  
= 2.3 to 3.6V; I = –100µA  
V
–0.2  
OH  
CC  
V
OH  
High-level output voltage  
= 2.3V; I = –8mA  
1.8  
OH  
V
V
V
= 2.3V; I = 100µA  
0.07  
0.3  
0.2  
0.5  
0.4  
CC  
CC  
CC  
OL  
= 2.3V; I = 24mA  
V
Low-level output voltage  
V
V
OL  
OL  
= 2.3V; I = 8mA  
OL  
7
V
RST  
Power-up output low voltage  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2.7V; I = 1mA; V = V or GND  
0.55  
±1  
O
I
CC  
= 2.7V; V = V  
or GND  
CC  
Control pins  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
90  
I
= 0 or 2.7V; V = 5.5V  
10  
I
= 2.7V; V = 5.5V  
20  
I
Input leakage current  
µA  
I
I
4
= 2.7V; V = V  
1
Data pins  
I
CC  
= 2.7V; V = 0  
-5  
I
I
Off current  
= 0V; V or V = 0 to 4.5V  
"100  
µA  
µA  
OFF  
I
O
Bus Hold current  
= 2.3V; V = 0.7V  
I
I
HOLD  
6
Data inputs  
= 2.3V; V = 1.7V  
–75  
I
Current into an output in the  
I
V
= 5.5V; V = 2.3V  
10  
1
125  
100  
µA  
µA  
EX  
O
CC  
High state when V > V  
O
CC  
Power up/down 3-State output  
V
CC  
1.2V; V = 0.5V to V ; V = GND or V  
;
CC  
O
CC  
I
I
PU/PD  
3
current  
OE = Don’t care  
I
I
V
V
V
V
= 2.7V; Outputs High, V = GND or V I 0  
CC, O =  
0.04  
3.0  
0.1  
4.5  
0.1  
CCH  
CC  
CC  
CC  
CC  
I
I
Quiescent supply current  
= 2.7V; Outputs Low, V = GND or V I 0  
CC, O =  
mA  
mA  
CCL  
I
5
= 2.7V; Outputs Disabled; V = GND or V  
I 0  
CC, O =  
0.04  
CCZ  
I
Additional supply current per  
= 2.3V to 2.7V; One input at V –0.6V,  
CC  
I  
0.01  
0.4  
CC  
2
input pin  
Other inputs at V or GND  
CC  
NOTES:  
1. All typical values are at V = 2.5V and T  
= 25°C.  
amb  
CC  
2. This is the increase in supply current for each input at the specified voltage level other than V or GND  
CC  
3. This parameter is valid for any V between 0V and 1.2V with a transition time of up to 10msec. From V = 1.2V to V = 2.5V ± 0.2V a  
CC  
CC  
CC  
transition time of 100µsec is permitted. This parameter is valid for T  
= 25°C only.  
amb  
4. Unused pins at V or GND.  
CC  
5. I  
is measured with outputs pulled up to V or pulled down to ground.  
CCZ  
CC  
6. Not guaranteed.  
7. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.  
7
1998 Feb 13  
Philips Semiconductors  
Product specification  
2.5V/3.3V 18-bit universal bus transceiver (3-State)  
74ALVT16600  
AC CHARACTERISTICS (2.5V "0.2V RANGE)  
GND = 0V; t = t = 2.5ns; C = 50pF; R = 500; T  
= –40°C to +85°C.  
R
F
L
L
amb  
LIMITS  
V
CC  
= 2.5V ±0.2V  
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
1
MIN  
TYP  
MAX  
f
Maximum clock frequency  
1
2
250  
MHz  
ns  
MAX  
t
t
Propagation delay  
An to Bn or Bn to An  
1.0  
1.5  
1.9  
2.5  
3.0  
3.6  
PLH  
PHL  
t
t
Propagation delay Clock Low or High  
LEAB to Bn or LEBA to An  
2.0  
2.5  
3.0  
3.3  
4.5  
5.1  
PLH  
PHL  
3
1
ns  
ns  
ns  
ns  
t
t
Propagation delay  
CPAB to Bn or CPBA to An  
2.5  
2.5  
3.8  
4.5  
5.6  
6.7  
PLH  
PHL  
t
Output enable time  
to High and Low level  
5
6
2.0  
1.0  
3.1  
2.0  
4.4  
3.0  
PZH  
t
PZL  
t
Output disable time  
from High and Low Level  
5
6
1.5  
1.5  
2.5  
2.3  
4.1  
3.6  
PHZ  
t
PLZ  
NOTE:  
1. All typical values are at V = 3.3V and T  
= 25°C.  
CC  
amb  
AC SETUP REQUIREMENTS (2.5V "0.2V RANGE)  
GND = 0V; t = t = 2.5ns; C = 50pF, R = 500; T  
= –40°C to +85°C.  
R
F
L
L
amb  
LIMITS  
V
CC  
= 2.5V ±0.2V  
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
1
MIN  
TYP  
ts(H)  
ts(L)  
Setup time, High or Low  
An to CPAB or Bn to CPBA  
1.5  
2.0  
0.5  
1.1  
4
4
4
4
4
4
ns  
ns  
ns  
ns  
ns  
ns  
th(H)  
th(L)  
Hold time, High or Low  
An to CPAB or Bn to CPBA  
0.0  
1.0  
–1.1  
–0.4  
ts(H)  
ts(L)  
Setup time, High or Low Clock Low  
An to LEAB or Bn to CPBA  
0.0  
1.5  
–0.8  
0.4  
th(H)  
th(L)  
Hold time, High or Low Clock High  
An to LEAB or Bn to LEBA  
1.0  
1.5  
–0.4  
0.9  
ts(H)  
ts(L)  
Setup time CEAB before CPAB or  
CEBA before CPBA  
1.0  
1.0  
–0.3  
–0.5  
th(H)  
th(L)  
Hold time CEAB after CPAB or  
CEBA after CPBA  
1.5  
1.5  
0.8  
0.5  
tw(H)  
tw(L)  
Pulse width, High or Low  
CPAB or CPBA  
2.5  
2.5  
1
3
ns  
ns  
tw(H)  
LEAB or LEBA pulse width, High  
1.5  
NOTE:  
1. All typical values are at V = 2.5V and T  
= 25°C.  
amb  
CC  
8
1998 Feb 13  
Philips Semiconductors  
Product specification  
2.5V/3.3V 18-bit universal bus transceiver (3-State)  
74ALVT16600  
AC WAVEFORMS  
NOTES:  
1. V = 1.5V at V w 3.0V, V = V /2 at V v 2.7V  
M
CC  
M
CC  
CC  
2. V = V + 0.3V at V w 3.0V, V = V + 0.15V at V v 2.7V  
X
OL  
CC  
X
OL  
CC  
3. V = V – 0.3V at V w 3.0V, V = V 0.15V at V v 2.7V  
Y
OH  
CC  
Y
OH  
CC  
1/f  
MAX  
3.0V or V  
CC  
whichever  
is less  
3.0V or V  
whichever is  
less  
,
CC  
nA , nB  
x
CEAB  
CEBA  
x
V
V
M
V
V
M
M
M
CPBA or  
CPAB  
V
V
M
M
0V  
0V  
t (H)  
S
t (H)  
h
t (L)  
h
t (L)  
S
t
(L)  
t (H)  
W
W
t
PLH  
t
PHL  
CPAB or  
CPBA  
V
OH  
3.0V or V  
CC  
or  
whichever  
is less  
An or Bn  
V
M
LEAB or  
LEBA  
V
V
M
V
M
M
0V  
V
OL  
SW00038  
SW00271  
Waveform 1. Propagation Delay, Clock Input to Output, Clock  
Pulse Width, and Maximum Clock Frequency  
Waveform 4. Data Setup and Hold Times  
3.0V or V  
whichever is  
less  
,
CC  
OEBA  
or  
OEAB  
3.0V or V  
,
CC  
whichever is  
less  
V
V
M
M
V
V
M
An or Bn  
M
t
0V  
0V  
t
t
t
PHZ  
PLH  
PHL  
PZH  
V
OH  
V
OH  
V
Y
V
M
An or Bn  
V
V
M
M
An or Bn  
0V  
V
OL  
SW00176  
SW00270  
Waveform 2. Propagation Delay, Transparent Mode  
Waveform 5. 3-State Output Enable Time to High Level  
and Output Disable Time from High Level  
3.0V or V  
,
CC  
whichever is  
less  
V
V
V
M
M
3.0V or V  
whichever is  
less  
,
CC  
M
LEAB or  
LEBA  
OEBA  
or  
OEAB  
V
V
M
0V  
M
t
(H)  
W
t
PLH  
0V  
t
PHL  
V
OH  
t
t
PLZ  
PZL  
An or Bn  
V
V
M
M
3.0V or V  
CC  
An or Bn  
V
V
OL  
M
V
X
SW00177  
V
OL  
Waveform 3. Propagation Delay, Enable to Output, and Enable  
Pulse Width  
SW00269  
Waveform 6. 3-State Output Enable Time to Low Level  
and Output Disable Time from Low Level  
9
1998 Feb 13  
Philips Semiconductors  
Product specification  
2.5V/3.3V 18-bit universal bus transceiver (3-State)  
74ALVT16600  
TEST CIRCUIT AND WAVEFORMS  
6.0V or V x 2  
CC  
V
V
t
W
IN  
CC  
90%  
90%  
Open  
GND  
NEGATIVE  
PULSE  
V
V
M
10%  
M
10%  
V
V
OUT  
IN  
R
R
L
0V  
(t  
PULSE  
GENERATOR  
D.U.T.  
t
t
(t  
(t  
)
t
t
)
THL  
F
TLH  
R
R
T
)
(t  
)
C
L
TLH  
R
THL  
F
V
L
IN  
90%  
M
90%  
POSITIVE  
PULSE  
V
V
M
Test Circuit for 3-State Outputs  
10%  
10%  
t
W
0V  
SWITCH POSITION  
TEST  
SWITCH  
6V or V  
Open  
t
t
PLZ/ PZL  
CC x 2  
t
t
PLH/ PHL  
t
/t  
GND  
PHZ PZH  
INPUT PULSE REQUIREMENTS  
FAMILY  
DEFINITIONS  
Amplitude  
3.0V or V  
whichever  
is less  
Rep. Rate  
t
t
t
F
W
R
R = Load resistor; see AC CHARACTERISTICS for value.  
L
CC  
C = Load capacitance includes jig and probe capacitance:  
L
74ALVT16  
v10MHz  
500ns v2.5ns v2.5ns  
See AC CHARACTERISTICS for value.  
R = Termination resistance should be equal to Z  
T
of  
OUT  
pulse generators.  
SW00025  
10  
1998 Feb 13  
Philips Semiconductors  
Product specification  
2.5V/3.3V 18-bit universal bus transceiver (3-State)  
74ALVT16600  
SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm  
SOT371-1  
11  
1998 Feb 13  
Philips Semiconductors  
Product specification  
2.5V/3.3V 18-bit universal bus transceiver (3-State)  
74ALVT16600  
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm  
SOT364-1  
12  
1998 Feb 13  
Philips Semiconductors  
Product specification  
2.5V/3.3V 18-bit universal bus transceiver (3-State)  
74ALVT16600  
NOTES  
13  
1998 Feb 13  
Philips Semiconductors  
Product specification  
2.5V/3.3V 18-bit universal bus transceiver (3-State)  
74ALVT16600  
Data sheet status  
[1]  
Data sheet  
status  
Product  
status  
Definition  
Objective  
specification  
Development  
This data sheet contains the design target or goal specifications for product development.  
Specification may change in any manner without notice.  
Preliminary  
specification  
Qualification  
This data sheet contains preliminary data, and supplementary data will be published at a later date.  
Philips Semiconductors reserves the right to make chages at any time without notice in order to  
improve design and supply the best possible product.  
Product  
specification  
Production  
This data sheet contains final specifications. Philips Semiconductors reserves the right to make  
changes at any time without notice in order to improve design and supply the best possible product.  
[1] Please consult the most recently issued datasheet before initiating or completing a design.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or  
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended  
periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips  
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or  
modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications  
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.  
RighttomakechangesPhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard  
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 1998  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
print code  
Date of release: 05-96  
9397-750-03569  
Document order number:  
Philips  
Semiconductors  

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