AV162821DGG [NXP]
2.5V/3.3V 20-bit bus-interface D-type flip-flop; positive-edge trigger with 30ohm termination resistors 3-State; 2.5V / 3.3V 20位总线接口D型触发器;与30ohm端接电阻三态正沿触发
| 型号： | AV162821DGG |
| 厂家： | 
NXP |
| 描述： | 2.5V/3.3V 20-bit bus-interface D-type flip-flop; positive-edge trigger with 30ohm termination resistors 3-State |
| 文件： | 总12页 (文件大小：100K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74ALVT162821
2.5V/3.3V 20-bit bus-interface
D-type flip-flop; positive-edge trigger with
30W termination resistors (3-State)
Product specification
1998 Oct 02
Supersedes data of 1997 Feb 13
IC23 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
2.5V/3.3V 20-bit bus-interface D-type flip-flop;
positive-edge trigger with 30W termination resistors (3-State)
74ALVT162821
FEATURES
DESCRIPTION
The 74ALVT162821 high-performance BiCMOS device combines
low static and dynamic power dissipation with high speed and high
• Outputs include series resistance of 30W making external
termination resistors unnecessary
output drive. It is designed for V operation at 2.5V or 3.3V with I/O
CC
• 20-bit positive-edge triggered register
• 5V I/O Compatible
compatibility to 5V.
The 74ALVT162821 has two 10-bit, edge triggered registers, with
each register coupled to a 3-State output buffer. The two sections of
each register are controlled independently by the clock (nCP) and
Output Enable (nOE) control gates.
• Multiple V and GND pins minimize switching noise
CC
• Live insertion/extraction permitted
• Power-up reset
Each register is fully edge triggered. The state of each D input, one
set-up time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output.
• Power-up 3-State
• Output capability +12mA/-12mA
• Latch-up protection exceeds 500mA per Jedec Std 17
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors.
The active Low Output Enable (nOE) controls all ten 3-State buffers
independent of the register operation. When nOE is Low, the data in
the register appears at the outputs. When nOE is High, the outputs
are in high impedance “off” state, which means they will neither drive
nor load the bus.
• ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
• Bus hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
The 74ALVT162821 is designed with 30W series resistance in both
High and Low output stages. This design reduces the line noise in
applications such as memory address drivers, clock drivers and bus
receivers/transmitters. The series termination resistors reduce
overshoot and undershoot and are ideal for driving memory arrays.
QUICK REFERENCE DATA
TYPICAL
CONDITIONS
SYMBOL
PARAMETER
UNIT
T
amb
= 25°C
2.5V
3.3V
t
t
Propagation delay
nCP to nQ
4.4
3.8
3.2
3.2
PLH
PHL
C = 50pF
L
ns
C
Input capacitance
Output capacitance
Total supply current
V = 0V or V
CC
3
9
3
9
pF
pF
µA
IN
I
C
V = 0 or V
O CC
OUT
CCZ
I
Outputs disabled
40
70
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
AV162821 DL
DWG NUMBER
SOT371-1
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
–40°C to +85°C
–40°C to +85°C
74ALVT162821 DL
74ALVT162821 DGG
AV162821 DGG
SOT364-1
2
1998 Oct 02
853-2041 20127
Philips Semiconductors
Product specification
2.5V/3.3V 20-bit bus-interface D-type flip-flop;
positive-edge trigger with 30W termination resistors (3-State)
74ALVT162821
LOGIC SYMBOL
PIN CONFIGURATION
55
54
52
51
49
48
47
45
44
43
1OE
1Q0
1Q1
GND
1Q2
1Q3
1
2
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1CP
1D0
1D1
GND
1D2
1D3
1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7 1D8 1D9
1CP
1OE
56
1
3
4
1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7 1Q8 1Q9
5
6
2
3
5
6
8
9
10
34
12
33
13
31
14
30
V
7
V
CC
CC
1Q4
1Q5
1Q6
GND
1Q7
1Q8
1Q9
2Q0
2Q1
2Q2
GND
2Q3
2Q4
2Q5
8
1D4
1D5
1D6
GND
1D7
1D8
1D9
2D0
2D1
2D2
GND
2D3
2D4
2D5
42
41
40
38
37
36
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
2D0 2D1 2D2 2D3 2D4 2D5 2D6 2D7 2D8 2D9
29
28
2CP
2OE
2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7 2Q8 2Q9
15
16
17
19
20
21
23
24
26
27
SH00002
LOGIC SYMBOL (IEEE/IEC)
1
1OE
1CP
2OE
2CP
EN2
C1
EN4
C3
V
V
CC
CC
56
28
29
2Q6
2Q7
GND
2Q8
2Q9
2OE
2D6
2D7
GND
2D8
2D9
2CP
55
54
52
51
49
48
47
45
44
2
1D
2
1D0
1D1
1D2
1D3
1D4
1D5
1D6
1D7
1D8
1Q0
1Q1
1Q2
1Q3
1Q4
1Q5
1Q6
1Q7
1Q8
3
5
6
8
SH00001
9
10
12
13
SCHEMATIC OF EACH OUTPUT
V
CC
43
42
41
40
38
37
36
34
33
31
30
14
15
16
17
19
20
21
23
24
26
27
1D9
2D0
2D1
2D2
2D3
2D4
2D5
2D6
2D7
2D8
2D9
1Q9
2Q0
2Q1
2Q2
2Q3
2Q4
2Q5
2Q6
2Q7
2Q8
2Q9
V
CC
4
3D
27Ω
27Ω
OUTPUT
SH00003
SW00007
3
1998 Oct 02
Philips Semiconductors
Product specification
2.5V/3.3V 20-bit bus-interface D-type flip-flop;
positive-edge trigger with 30W termination resistors (3-State)
74ALVT162821
PIN DESCRIPTION
FUNCTION TABLE
INPUTS
OUTPUTS
PIN NUMBER
SYMBOL
FUNCTION
INTERNAL
OPERATING
REGISTER
MODE
nOE nCP nDx
nQ0 - nQ9
55, 54, 52, 51, 49,
48, 47, 45, 44, 43,
42, 41, 40, 38, 37,
36, 34, 33, 31, 30
1D0 - 1D9
2D0 - 2D9
Data inputs
L
L
↑
↑
l
h
L
H
L
H
Load and read
register
L
↑
X
NC
NC
Hold
2, 3, 5, 6, 8, 9, 10,
12, 13, 14,
15, 16, 17, 19, 20,
21, 23, 24, 26, 27
H
H
↑
↑
X
Dn
NC
Dn
Z
Z
Disable
outputs
1Q0 - 1Q9
2Q0 - 2Q9
Data outputs
H = High voltage level
h
=
High voltage level one set-up time prior to the Low-to-High
clock transition
Low voltage level
Low voltage level one set-up time prior to the Low-to-High
clock transition
Output enable inputs
(active-Low)
1, 28
1OE, 2OE
1CP, 2CP
GND
L
l
=
=
Clock pulse inputs
(active rising edge)
56, 29
NC= No change
X
Z
↑
=
=
=
=
Don’t care
4, 11, 18, 25, 32,
39, 46, 53
Ground (0V)
High impedance “off” state
Low to High clock transition
Not a Low-to-High clock transition
Positive supply
voltage
↑
7, 22, 35, 50
LOGIC DIAGRAM
nD0
V
CC
nD1
nD2
nD3
nD4
nD5
nD6
nD7
nD8
nD9
D
D
D
D
D
D
D
D
D
D
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
CP Q
nCP
nOE
nQ0
nQ1
nQ2
nQ3
nQ4
nQ5
nQ6
nQ7
nQ8
nQ9
SH00004
4
1998 Oct 02
Philips Semiconductors
Product specification
2.5V/3.3V 20-bit bus-interface D-type flip-flop;
positive-edge trigger with 30W termination resistors (3-State)
74ALVT162821
1, 2
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
–0.5 to +4.6
–50
UNIT
V
V
CC
I
IK
DC input diode current
V < 0
I
mA
V
3
V
I
DC input voltage
–1.2 to +7.0
–50
I
DC output diode current
V
O
< 0
mA
V
OK
3
V
OUT
DC output voltage
Output in Off or High state
Output in Low state
–0.5 to +7.0
128
I
DC output current
mA
OUT
Output in High state
–64
T
stg
Storage temperature range
–65 to 150
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
2.5V RANGE LIMITS 3.3V RANGE LIMITS
SYMBOL
PARAMETER
UNIT
MIN
2.3
0
MAX
2.7
MIN
3.0
0
MAX
3.6
V
DC supply voltage
Input voltage
V
V
CC
V
5.5
5.5
I
V
High-level input voltage
Input voltage
1.7
2.0
V
IH
V
0.7
–8
0.8
–12
12
V
IL
I
High-level output current
Low-level output current
mA
mA
ns/V
°C
OH
I
OL
12
∆t/∆v
Input transition rise or fall rate; Outputs enabled
Operating free-air temperature range
10
10
T
amb
–40
+85
–40
+85
5
1998 Oct 02
Philips Semiconductors
Product specification
2.5V/3.3V 20-bit bus-interface D-type flip-flop;
positive-edge trigger with 30W termination resistors (3-State)
74ALVT162821
DC ELECTRICAL CHARACTERISTICS (3.3V "0.3V RANGE)
LIMITS
1
MIN
TYP
MAX
V
Input clamp voltage
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 3.0V; I = –18mA
–0.85
–1.2
V
V
IK
IK
= 3.0 to 3.6V; I = –100µA
V
–0.2
V
CC
OH
CC
V
OH
High-level output voltage
= 3.0V; I = –32mA
2.0
2.3
0.07
0.25
0.3
OH
= 3.0V; I = 100µA
0.2
0.4
OL
= 3.0V; I = 16mA
OL
V
OL
Low–level output voltage
V
= 3.0V; I = 32mA
0.5
OL
= 3.0V; I = 64mA
0.4
0.55
OL
6
V
Power-up output low voltage
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 3.6V; I = 1mA; V = V or GND
0.55
±1
V
RST
O
I
CC
= 3.6V; V = V or GND
Control pins
0.1
0.1
I
CC
= 0 or 3.6V; V = 5.5V
10
I
I
I
Input leakage current
µA
= 3.6V; V = V
0.5
1
I
CC
4
Data pins
= 3.6V; V = 0V
0.1
-5
I
I
Off current
= 0V; V or V = 0 to 4.5V
0.1
±100
µA
µA
OFF
I
O
= 3V; V = 0.8V
75
130
–140
I
Bus Hold current
= 3V; V = 2.0V
–75
I
I
HOLD
7
Data inputs
= 0V to 3.6V; V = 3.6V
±500
CC
Current into an output in the
I
V
= 5.5V; V = 3.0V
10
1
125
µA
µA
EX
O
CC
High state when V > V
O
CC
Power up/down 3-State output
V
CC
≤ 1.2V; V = 0.5V to V ; V = GND or V
O CC I CC
I
±100
PU/PD
3
current
OE/OE = Don’t care
I
3-State output High current
3-State output Low current
V
V
V
V
V
V
= 3.6V; V = 3.0V; V = V or V
0.5
0.5
5
µA
µA
OZH
CC
CC
CC
CC
CC
CC
O
I
IL
IH
IH
I
= 3.6V; V = 0.5V; V = V or V
–5
0.1
7
OZL
O
I
IL
I
= 3.6V; Outputs High, V = GND or V I 0
CC, O =
0.07
5.1
CCH
I
I
Quiescent supply current
= 3.6V; Outputs Low, V = GND or V I 0
CC, O =
mA
mA
CCL
CCZ
I
5
I
= 3.6V; Outputs Disabled; V = GND or V
I 0
CC, O =
0.07
0.1
I
Additional supply current per
= 3V to 3.6V; One input at V –0.6V,
CC
∆I
0.04
0.4
CC
2
input pin
Other inputs at V or GND
CC
NOTES:
1. All typical values are at V = 3.3V and T
= 25°C.
amb
CC
2. This is the increase in supply current for each input at the specified voltage level other than V or GND
CC
3. This parameter is valid for any V between 0V and 1.2V with a transition time of up to 10msec. From V = 1.2V to V = 3.3V ± 0.2V a
CC
CC
CC
transition time of 100µsec is permitted. This parameter is valid for T
= 25°C only.
amb
4. Unused pins at V or GND.
CC
5. I
is measured with outputs pulled up to V or pulled down to ground.
CCZ
CC
6. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
7. This is the bus hold overdrive current required to force the input to the opposite logic state.
AC CHARACTERISTICS (3.3V "0.3V RANGE)
GND = 0V; t = t = 2.5ns; C = 50pF; R = 500Ω; T = –40°C to +85°C.
amb
R
F
L
L
LIMITS
o
T
amb
= –40 to +85 C
SYMBOL
PARAMETER
WAVEFORM
UNIT
V
CC
= +3.3V
MIN
TYP
MAX
f
Maximum clock frequency
1
1
150
MHz
ns
MAX
t
t
Propagation delay
nCP to nQx
1.0
1.0
3.2
3.2
5.0
4.7
PLH
PHL
t
t
Output enable time
to High and Low level
3
4
1.0
0.5
3.4
2.3
5.6
3.7
PZH
PZL
ns
ns
t
t
Output disable time
from High and Low level
3
4
1.5
1.5
3.7
3.0
5.4
4.3
PHZ
PLZ
NOTE:
1. All typical values are at V = 3.3V and T
= 25°C.
amb
CC
6
1998 Oct 02
Philips Semiconductors
Product specification
2.5V/3.3V 20-bit bus-interface D-type flip-flop;
positive-edge trigger with 30W termination resistors (3-State)
74ALVT162821
AC SETUP REQUIREMENTS (3.3V "0.3V RANGE)
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω
R
F
L
L
LIMITS
o
T
V
= -40 to +85 C
amb
CC
SYMBOL
PARAMETER
WAVEFORM
UNIT
= +3.3V ±0.3V
MIN
TYP
t (H)
t (L)
s
Setup time, High or Low
nDx to nCP
1.5
1.5
0.1
0.1
s
1
2
2
ns
ns
ns
t (H)
Hold time, High or Low
nDx to nCP
0.5
0.5
0.1
0.1
h
t (L)
h
t (H)
nCP pulse width
High or Low
1.5
1.5
w
t (L)
w
DC ELECTRICAL CHARACTERISTICS (2.5V "0.2V RANGE)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40°C to +85°C
UNIT
1
MIN
TYP
MAX
V
Input clamp voltage
V
V
V
V
V
V
= 2.3V; I = –18mA
–0.85
–1.2
V
V
IK
CC
CC
CC
CC
CC
CC
IK
= 2.3 to 3.6V; I = –100µA
V
–0.2
V
CC
OH
CC
V
OH
High-level output voltage
= 2.3V; I = –8mA
1.8
2.1
0.07
0.3
OH
= 2.3V; I = 100µA
0.2
0.5
0.4
OL
= 2.3V; I = 24mA
V
OL
Low-level output voltage
V
V
OL
= 2.3V; I = 8mA
OL
7
V
RST
Power-up output low voltage
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2.7V; I = 1mA; V = V or GND
0.55
±1
O
I
CC
= 2.7V; V = V
or GND
CC
Control pins
0.1
0.1
0.1
0.1
0.1
90
I
= 0 or 2.7V; V = 5.5V
10
I
I
Input leakage current
µA
I
= 2.7V; V = V
1
I
CC
4
Data pins
= 2.7V; V = 0
-5
I
I
Off current
= 0V; V or V = 0 to 4.5V
"100
µA
µA
µA
OFF
I
O
Bus Hold current
= 2.3V; V = 0.7V
I
I
HOLD
6
Data inputs
= 2.3V; V = 1.7V
–10
I
Current into an output in the
I
V
= 5.5V; V = 2.3V
10
1
125
µA
µA
EX
O
CC
High state when V > V
O
CC
Power up/down 3-State output
V
CC
≤ 1.2V; V = 0.5V to V ; V = GND or V
O CC I CC
I
"100
PU/PD
3
current
OE/OE = Don’t care
I
3-State output High current
3-State output Low current
V
V
V
V
V
V
= 2.7V; V = 2.3V; V = V or V
0.5
0.5
5
µA
µA
OZH
CC
CC
CC
CC
CC
CC
O
I
IL
IH
IH
I
= 2.7V; V = 0.5V; V = V or V
–5
OZL
O
I
IL
I
= 2.7V; Outputs High, V = GND or V I 0
CC, O =
0.04
2.3
0.1
4.5
0.1
CCH
I
I
Quiescent supply current
= 2.7V; Outputs Low, V = GND or V I 0
CC, O =
mA
mA
CCL
I
5
I
= 2.7V; Outputs Disabled; V = GND or V
I
CC, O =
0
0.04
CCZ
I
Additional supply current per
= 2.3V to 2.7V; One input at V –0.6V,
CC
∆I
0.04
0.4
CC
2
input pin
Other inputs at V or GND
CC
NOTES:
1. All typical values are at V = 2.5V and T
= 25°C.
amb
CC
2. This is the increase in supply current for each input at the specified voltage level other than V or GND
CC
3. This parameter is valid for any V between 0V and 1.2V with a transition time of up to 10msec. From V = 1.2V to V = 2.5V ± 0.3V a
CC
CC
CC
transition time of 100µsec is permitted. This parameter is valid for T
= 25°C only.
amb
4. Unused pins at V or GND.
CC
5. I
is measured with outputs pulled up to V or pulled down to ground.
CCZ
CC
6. Not guaranteed.
7. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
7
1998 Oct 02
Philips Semiconductors
Product specification
2.5V/3.3V 20-bit bus-interface D-type flip-flop;
positive-edge trigger with 30W termination resistors (3-State)
74ALVT162821
AC CHARACTERISTICS (2.5V "0.2V RANGE)
GND = 0V; t = t = 2.5ns; C = 50pF; R = 500Ω; T = –40°C to +85°C.
amb
R
F
L
L
LIMITS
o
T
V
= -40 to +85 C
amb
CC
SYMBOL
PARAMETER
WAVEFORM
UNIT
= +2.5V ±0.2V
MIN
TYP
MAX
f
Maximum clock frequency
1
1
150
MHz
ns
MAX
t
t
Propagation delay
nCP to nQx
1.0
1.0
4.4
3.8
7.0
6.4
PLH
PHL
t
t
Output enable time
to High and Low level
3
4
1.5
1.0
4.6
2.8
7.5
4.6
PZH
PZL
ns
ns
t
t
Output disable time
from High and Low level
3
4
1.5
1.0
3.5
3.7
5.5
5.7
PHZ
PLZ
NOTE:
1. All typical values are at V = 3.3V and T
= 25°C.
amb
CC
AC SETUP REQUIREMENTS (2.5V "0.2V RANGE)
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω
R
F
L
L
LIMITS
o
T
= -40 to +85 C
CC
amb
V
SYMBOL
PARAMETER
WAVEFORM
UNIT
= +2.5 ±0.2V
MIN
TYP
t (H)
t (L)
s
Setup time, High or Low
nDx to nCP
1.5
2.0
0.1
0.5
s
1
2
2
ns
ns
ns
t (H)
Hold time, High or Low
nDx to nCP
0.3
0.5
–0.5
–0.1
h
t (L)
h
t (H)
nCP pulse width
High or Low
1.5
1.5
w
t (L)
w
AC WAVEFORMS
V
M
V
X
V
Y
= 1.5V at V w 3.0V; V = V /2 at V v 2.7V
CC M CC CC
= V + 0.3V at V w 3.0V; V = V + 0.15V at V v 2.7V
OL
CC
X
OL
CC
= V – 0.3V at V w 3.0V; V = V – 0.15V at V v 2.7V
OH
CC
Y
OH
CC
3.0V or V
CC
whichever
is less
1/f
MAX
3.0V or V
whichever
is less
CC
V
V
V
V
M
nDx
CP
M
M
M
0V
nCP
nQx
V
t
V
V
t (H) t (H)
s
t (L) t (L)
s
M
M
M
h
h
3.0V or V
CC
t
w
(H)
0V
whichever
is less
t
(L)
w
t
PLH
PH
V
V
L
M
M
V
OH
0V
V
V
M
M
V
OL
SH00005
SH00006
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock frequency
Waveform 2. Data Setup and Hold Times
8
1998 Oct 02
Philips Semiconductors
Product specification
2.5V/3.3V 20-bit bus-interface D-type flip-flop;
positive-edge trigger with 30W termination resistors (3-State)
74ALVT162821
3.0V or V
whichever
is less
CC
3.0V or V
whichever
is less
CC
nOE
nQx
nOE
V
V
M
M
t
V
V
M
M
t
0V
0V
t
PZL
PLZ
t
PZH
PHZ
3.0V or V
CC
V
V
OH
V
M
V
X
Y
V
M
0V
V
nQx
OL
0V
SH00008
SH00007
Waveform 3. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
Waveform 4. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
TEST CIRCUIT AND WAVEFORM
6.0V or V x 2
CC
V
V
t
W
IN
CC
90%
90%
Open
GND
NEGATIVE
PULSE
V
V
M
M
10%
10%
90%
V
V
OUT
IN
R
R
L
0V
PULSE
GENERATOR
D.U.T.
t
t
(t
(t
)
t
TLH
(t
)
THL
F
R
R
T
)
t
(t
)
C
L
TLH
R
THL
F
V
L
IN
90%
M
POSITIVE
PULSE
V
V
M
Test Circuit for 3-State Outputs
10%
10%
t
W
0V
SWITCH POSITION
TEST
SWITCH
6V or V
Open
t
t
PLZ/ PZL
CC x 2
t
t
PLH/ PHL
t
/t
GND
PHZ PZH
INPUT PULSE REQUIREMENTS
FAMILY
DEFINITIONS
Amplitude
3.0V or V
whichever
is less
Rep. Rate
t
t
t
F
W
R
R = Load resistor; see AC CHARACTERISTICS for value.
L
CC
C = Load capacitance includes jig and probe capacitance:
L
74ALVT16
v10MHz
500ns v2.5ns v2.5ns
See AC CHARACTERISTICS for value.
R = Termination resistance should be equal to Z
T
of
OUT
pulse generators.
SW00025
9
1998 Oct 02
Philips Semiconductors
Product specification
2.5V/3.3V 20-bit bus-interface D-type flip-flop;
positive-edge trigger with 30W termination resistors (3-State)
74ALVT162821
SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm
SOT371-1
10
1998 Oct 02
Philips Semiconductors
Product specification
2.5V/3.3V 20-bit bus-interface D-type flip-flop;
positive-edge trigger with 30W termination resistors (3-State)
74ALVT162821
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm
SOT364-1
11
1998 Oct 02
Philips Semiconductors
Product specification
2.5V/3.3V 20-bit bus-interface D-type flip-flop;
positive-edge trigger with 30W termination resistors (3-State)
74ALVT162821
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 05-96
9397-750-04619
Document order number:
Philips
Semiconductors
相关型号：
AV162821DL
2.5V/3.3V 20-bit bus-interface D-type flip-flop; positive-edge trigger with 30ohm termination resistors 3-State
NXP
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