A2G22S160-01SR3 [NXP]
RF Power GaN Transistor;
| 型号： | A2G22S160-01SR3 |
| 厂家： | 
NXP |
| 描述： | RF Power GaN Transistor |
| 文件： | 总18页 (文件大小：815K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Document Number: A2G22S160--01S
Rev. 0, 5/2015
Freescale Semiconductor
Technical Data
RF Power GaN Transistor
This 32 W RF power GaN transistor is designed for cellular base station
applications covering the frequency range of 1800 to 2200 MHz.
This part is characterized and performance is guaranteed for applications
operating in the 1800 to 2200 MHz band. There is no guarantee of performance
when this part is used in applications designed outside of these frequencies.
A2G22S160--01SR3
2100 MHz
1800–2200 MHz, 32 W AVG., 48 V
AIRFAST RF POWER GaN
TRANSISTOR
Typical Single--Carrier W--CDMA Performance: VDD = 48 Vdc,
IDQ = 150 mA, Pout = 32 W Avg., Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF.
G
Output PAR
(dB)
ACPR
(dBc)
IRL
(dB)
ps
D
Frequency
2110 MHz
2140 MHz
2170 MHz
(dB)
19.6
19.9
20.0
(%)
38.0
38.3
39.0
7.2
7.1
7.1
–30.3
–30.0
–29.7
–20
–23
–19
1800 MHz
Typical Single--Carrier W--CDMA Performance: VDD = 48 Vdc,
NI--400S--2S
IDQ = 150 mA, Pout = 32 W Avg., Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF.
G
Output PAR
(dB)
ACPR
(dBc)
IRL
(dB)
ps
D
Frequency
1805 MHz
1840 MHz
1880 MHz
(dB)
18.2
18.5
18.6
(%)
36.9
37.4
38.2
7.1
7.1
7.0
–33.4
–33.0
–32.5
–11
–16
–16
RF /V
in GS
RF /V
out DS
2
1
Features
High Terminal Impedances for Optimal Broadband Performance
Designed for Digital Predistortion Error Correction Systems
Optimized for Doherty Applications
(Top View)
Figure 1. Pin Connections
Freescale Semiconductor, Inc., 2015. All rights reserved.
Table 1. Maximum Ratings
Rating
Symbol
Value
125
Unit
Vdc
Vdc
Vdc
C
Drain--Source Voltage
V
DSS
Gate--Source Voltage
V
–8, 0
GS
DD
Operating Voltage
V
0 to +55
–65 to +150
–55 to +150
–55 to +225
Storage Temperature Range
Case Operating Temperature Range
T
stg
T
C
C
(1)
Operating Junction Temperature Range
T
J
C
Table 2. Thermal Characteristics
(2)
Characteristic
Symbol
Value
Unit
Thermal Resistance, Junction to Case
R
1.7
C/W
JC
Case Temperature 76C, 32 W CW, 48 Vdc, I
= 150 mA, 2140 MHz
DQ
Table 3. ESD Protection Characteristics
Test Methodology
Human Body Model (per JESD22--A114)
Class
1B
Machine Model (per EIA/JESD22--A115)
Charge Device Model (per JESD22--C101)
A
IV
Table 4. Electrical Characteristics (T = 25C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
Off Characteristics
Drain--Source Leakage Current
I
—
—
—
5
mAdc
Vdc
DSS
(V = –8 Vdc, V = 55 Vdc)
GS
DS
Drain--Source Breakdown Voltage
V
150
—
(BR)DSS
(V = –8 Vdc, I = 16.2 mAdc)
GS
D
On Characteristics
Gate Threshold Voltage
(V = 10 Vdc, I = 16.2 Adc)
V
–3.8
–3.6
–3.0
–3.0
–2.3
–2.3
Vdc
Vdc
GS(th)
GS(Q)
DS
D
Gate Quiescent Voltage
(V = 48 Vdc, I = 150 mAdc, Measured in Functional Test)
V
DD
D
1. Continuous use at maximum temperature will affect MTTF.
2. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf and search for AN1955.
(continued)
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
2
Table 4. Electrical Characteristics (T = 25C unless otherwise noted) (continued)
A
Characteristic
Symbol
Min
Typ
Max
Unit
(1)
Functional Tests
(In Freescale Test Fixture, 50 ohm system) V = 48 Vdc, I = 150 mA, P = 32 W Avg., f = 2110 MHz,
DD
DQ
out
Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz
Channel Bandwidth @ 5 MHz Offset. [See note on correct biasing sequence.]
Power Gain
G
18.8
35.5
6.8
—
19.6
38.0
7.2
21.8
—
dB
%
ps
D
Drain Efficiency
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
Input Return Loss
PAR
ACPR
IRL
—
dB
dBc
dB
–30.3
–20
–28.0
–9
—
Load Mismatch (In Freescale Test Fixture, 50 ohm system) I = 150 mA, f = 2140 MHz
DQ
VSWR 10:1 at 55 Vdc, 125 W CW Output Power
(3 dB Input Overdrive from 125 W CW Rated Power)
No Device Degradation
Typical Performance (In Freescale Test Fixture, 50 ohm system) V = 48 Vdc, I = 150 mA, 2110–2170 MHz Bandwidth
DD
DQ
P
P
@ 1 dB Compression Point, CW
P1dB
—
—
—
125
160
—
—
—
W
W
out
out
(2)
@ 3 dB Compression Point
P3dB
AM/PM
–21.8
(Maximum value measured at the P3dB compression point across
the 2110–2170 MHz bandwidth)
VBW Resonance Point
VBW
—
150
—
MHz
res
(IMD Third Order Intermodulation Inflection Point)
Gain Flatness in 60 MHz Bandwidth @ P = 32 W Avg.
G
—
—
0.4
—
—
dB
out
F
Gain Variation over Temperature
G
0.02
dB/C
(–30C to +85C)
Output Power Variation over Temperature
P1dB
—
0.02
—
dB/C
(–30C to +85C)
Table 5. Ordering Information
Device
Tape and Reel Information
Package
A2G22S160--01SR3
R3 Suffix = 250 Units, 32 mm Tape Width, 13--inch Reel
NI--400S--2S
1. Part internally input matched.
2. P3dB = P
+ 7.0 dB where P
is the average output power measured using an unclipped W--CDMA single--carrier input signal where
avg
avg
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
NOTE: Correct Biasing Sequence for GaN Depletion Mode Transistors
Turning the device ON
1. Set V to the pinch--off (V ) voltage, typically –5 V
GS
P
2. Turn on V to nominal supply voltage (50 V)
DS
3. Increase V until I current is attained
GS
DS
4. Apply RF input power to desired level
Turning the device OFF
1. Turn RF power off
2. Reduce V down to V , typically –5 V
GS
P
3. Reduce V down to 0 V (Adequate time must be allowed for V to
DS
DS
reduce to 0 V to prevent severe damage to device.)
4. Turn off V
GS
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
3
V
GG
C9
V
C7
C6
DD
C16
C13
C12
C5
C8
C10
R1
C14
C15
C11
C2
C3 C4
C1
AFG22S160--01S
Rev. 4
D64348
Figure 2. A2G22S160--01SR3 Test Circuit Component Layout — 2110–2170 MHz
Table 6. A2G22S160--01SR3 Test Circuit Component Designations and Values — 2110–2170 MHz
Part
Description
Part Number
Manufacturer
ATC
C1, C9, C10, C11, C12, C15 10 pF Chip Capacitors
ATC600F100JT250XT
C2, C3
C4
1.8 pF Chip Capacitors
1.2 pF Chip Capacitor
ATC600F1R8BT250XT
ATC600F1R2BT250XT
ATC100B471JT200XT
ATC100B102JT50XT
GRM32ER72A105KA01L
GRM31CR61H106KA12L
C5750X7S2A106M230KB
EEV-FK2A221M
ATC
ATC
C5
470 pF Chip Capacitor
1000 pF Chip Capacitor
1 F Chip Capacitors
ATC
C6
ATC
C7, C13
C8
Murata
Murata
TDK
10 F Chip Capacitor
C14
C16
R1
10 F Chip Capacitor
220 F, 100 V Electrolytic Capacitor
2.37 . 1/4 W Chip Resistor
Panasonic-ECG
Vishay
MTL
CRCW12062r37FNEA
D64348
PCB
Rogers RO4350B, 0.020, = 3.66
r
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
4
TYPICAL CHARACTERISTICS — 2110–2170 MHz
44
42
40
38
36
20.2
20
G
V
DQ
= 48 Vdc, P = 32 W (Avg.)
out
ps
DD
I
= 150 mA, Single--Carrier W--CDMA
19.8
19.6
19.4
19.2
19
3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
D
–9
–2.6
–2.8
–3
–30
ACPR
–30.2
–30.4
–12
–15
–18
–21
18.8
18.6
18.4
18.2
–3.2
–3.4
–3.6
–30.6
–30.8
PARC
IRL
–31
–24
2060 2080 2100 2120 2140 2160 2180 2200 2220
f, FREQUENCY (MHz)
Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 32 Watts Avg.
–10
V
= 48 Vdc, P = 27 W (PEP), I = 150 mA
out DQ
DD
Two--Tone Measurements, (f1 + f2)/2 = Center
Frequency of 2140 MHz
–20
–30
–40
–50
–60
IM3--U
IM3--L
IM5--L
IM5--U
IM7--L
IM7--U
1
10
100
200
TWO--TONE SPACING (MHz)
Figure 4. Intermodulation Distortion Products
versus Two--Tone Spacing
21
1
0
60
50
40
30
20
10
0
–26
V
= 48 Vdc, I = 150 mA, f = 2140 MHz
DQ
DD
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
–28
–30
–32
–34
–36
–38
20.5
–1
–2
–3
–4
–5
20
19.5
19
D
–1 dB = 15.5 W
G
ps
–2 dB = 22.4 W
PARC
–3 dB = 30.4 W
18.5
18
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
ACPR
2
10
18
26
34
42
P
, OUTPUT POWER (WATTS)
out
Figure 5. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
5
TYPICAL CHARACTERISTICS — 2110–2170 MHz
65
55
45
35
25
15
5
24
22
20
18
16
14
12
–10
–15
–20
–25
–30
–35
–40
2170 MHz
2140 MHz
D
2140 MHz
2110 MHz
2140 MHz
2170 MHz
2110 MHz
V
= 48 Vdc, I = 150 mA
DQ
DD
Single--Carrier W--CDMA, 3.84 MHz
Channel Bandwidth, Input Signal
PAR = 9.9 dB @ 0.01%
2170 MHz
Probability on CCDF
2110 MHz
G
ps
ACPR
1
10
100
200
P
, OUTPUT POWER (WATTS) AVG.
out
Figure 6. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
5
22
21
20
19
18
17
16
V
P
I
= 48 Vdc
= 0 dBm
= 150 mA
DD
in
0
Gain
DQ
–5
–10
–15
–20
–25
IRL
1800 1900 2000 2100 2200 2300 2400 2500 2600
f, FREQUENCY (MHz)
Figure 7. Broadband Frequency Response
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
6
Table 7. Load Pull Performance — Maximum Power Tuning
V
= 28 Vdc, I = 136 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
DD
DQ
Max Output Power
P1dB
(1)
Z
AM/PM
()
f
Z
Z
in
()
load
()
D
source
()
(%)
52.3
52.9
53.2
Gain (dB)
20.2
(dBm)
50.3
(W)
106
110
(MHz)
2110
4.15 – j6.27
4.07 – j5.17
4.09 – j4.55
5.00 + j5.62
8.53 – j8.62
10.0 – j9.31
12.0 – j9.99
–24
–26
–18
2140
2170
4.98 + j4.73
4.50 + j4.20
20.2
50.4
19.9
50.3
108
Max Output Power
P3dB
(2)
Z
()
AM/PM
()
f
Z
Z
()
load
D
source
()
in
(%)
61.3
61.1
60.8
Gain (dB)
(dBm)
(W)
(MHz)
2110
2140
2170
4.15 – j6.27
5.06 + j5.47
10.3 – j7.91
10.6 – j8.37
12.0 – j9.08
18.0
51.7
147
–28
–29
–21
4.07 – j5.17
4.09 – j4.55
5.10 + j4.68
4.76 + j3.87
18.2
18.2
51.7
51.8
148
150
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.
= Impedance as measured from gate contact to ground.
= Measured impedance presented to the output of the device at the package reference plane.
source
in
load
Table 8. Load Pull Performance — Maximum Drain Efficiency Tuning
V
= 28 Vdc, I = 136 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
DD
DQ
Max Drain Efficiency
P1dB
(1)
Z
AM/PM
()
f
Z
Z
in
()
load
()
D
source
()
(%)
60.3
61.5
59.6
Gain (dB)
(dBm)
(W)
(MHz)
2110
4.15 – j6.27
4.07 – j5.17
4.09 – j4.55
6.23 + j5.33
6.50 – j4.70
4.69 – j4.08
9.05 – j4.91
21.9
49.3
86
–25
–31
–15
2140
2170
7.85 + j2.84
4.69 + j3.48
23.1
21.6
48.5
49.2
71
83
Max Drain Efficiency
P3dB
(2)
Z
()
AM/PM
()
f
Z
Z
()
load
D
source
()
in
(%)
72.2
72.8
71.1
Gain (dB)
(dBm)
(W)
(MHz)
2110
2140
2170
4.15 – j6.27
6.45 + j3.06
5.89 – j2.96
6.46 – j2.95
8.12 – j3.23
20.8
49.9
97
–34
–29
–22
4.07 – j5.17
4.09 – j4.55
5.06 + j2.23
4.10 + j2.54
21.0
20.2
49.9
50.4
99
110
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.
= Impedance as measured from gate contact to ground.
= Measured impedance presented to the output of the device at the package reference plane.
source
in
load
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Z
Z
in
Z
load
source
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
7
P1dB -- TYPICAL LOAD PULL CONTOURS — 2140 MHz
4
2
4
46
50
47
48
46.5
2
0
47.5
52
0
48
48.5
54
56
–2
–4
–6
–8
–10
–12
–2
49
–4
E
E
49.5
60
58
–6
50
–8
52
P
50
P
–10
–12
46
48
4
6
10
12
14
16
2
8
4
6
10
12
14
16
2
8
REAL ()
REAL ()
Figure 8. P1dB Load Pull Output Power Contours (dBm)
Figure 9. P1dB Load Pull Efficiency Contours (%)
4
2
4
2
22.5
23
23.5
E
0
–2
0
–2
–4
–6
–8
–10
–12
21.5
22
–4
E
21
20.5
20
–6
-- 3 4
-- 3 2
-- 3 0
–28
–20
–22
–8
P
–24
P
–26
–10
–12
19.5
-- 3 6
4
6
10
REAL ()
12
14
16
2
8
4
6
10
12
14
16
2
8
REAL ()
Figure 10. P1dB Load Pull Gain Contours (dB)
Figure 11. P1dB Load Pull AM/PM Contours ()
NOTE:
P
E
= Maximum Output Power
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
8
P3dB -- TYPICAL LOAD PULL CONTOURS — 2140 MHz
4
2
4
58
62
60
48.5
47.5
48
58
49.5
2
0
56
49
50
0
70
50.5
–2
–4
–6
–8
–10
–12
–2
51
E
66
58
E
72
64
–4
68
51.5
–6
60
56
–8
P
P
–10
–12
4
6
10
REAL ()
12
14
16
2
8
4
6
10
REAL ()
12
14
16
2
8
Figure 12. P3dB Load Pull Output Power Contours (dBm)
Figure 13. P3dB Load Pull Efficiency Contours (%)
4
2
4
2
0
20
20.5
21
21.5
0
–2
19.5
–2
E
E
19
–4
–4
18.5
18
–6
–6
–38
–36
–30
–28
P
–34
–32
–8
–8
P
–22
–26
–10
–12
–10
–12
–24
17.5
4
6
10
8
REAL ()
12
14
16
2
4
6
10
REAL ()
12
14
16
2
8
Figure 14. P3dB Load Pull Gain Contours (dB)
Figure 15. P3dB Load Pull AM/PM Contours ()
NOTE:
P
E
= Maximum Output Power
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
9
V
GG
V
DD
C5
C6
C7
C8
C9
C16
C12
C10
C4
C11
R1
C13
C15
C2
C3
C14
C1
A2G22S160--01S
Rev. 4
D64348
Figure 16. A2G22S160--01SR3 Test Circuit Component Layout — 1805–1880 MHz
Table 9. A2G22S160--01SR3 Test Circuit Component Designations and Values — 1805–1880 MHz
Part
Description
10 pF Chip Capacitors
Part Number
Manufacturer
ATC
C1, C8, C9, C10, C11, C15
ATC600F100JT250XT
C2
1.1 pF Chip Capacitor
1.8 pF Chip Capacitor
470 pF Chip Capacitor
1000 pF Chip Capacitor
1 F Chip Capacitors
ATC600F1R2BT250XT
ATC600F1R8BT250XT
ATC100B471JT200XT
ATC100B102JT50XT
GRM32ER72A105KA01L
GRM31CR61H106KA12L
C5750X7S2A106M230KB
ATC600F0R7BT250XT
EEV-FK2A221M
ATC
C3
ATC
C4
ATC
C5
ATC
C6, C12
C7
Murata
Murata
TDK
10 F Chip Capacitor
C13
C14
C16
R1
10 F Chip Capacitor
0.7 pF Chip Capacitor
220 F, 100 V Electrolytic Capacitor
2.37 , 1/4 W Chip Resistor
ATC
Panasonic-ECG
Vishay
MTL
CRCW12062R37FNEA
D64348
PCB
Rogers RO4350B, 0.020, = 3.66
r
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
10
TYPICAL CHARACTERISTICS — 1805–1880 MHz
41
40
39
38
37
19
18.8
18.6
18.4
18.2
18
V
= 48 Vdc, P = 32 W (Avg.), I = 150 mA
out DQ
DD
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
G
ps
D
–6
–2.6
–2.7
–2.8
–2.9
–3
–31.5
–32
17.8
17.6
17.4
17.2
17
–9
PARC
ACPR
IRL
–12
–15
–18
–32.5
–33
–33.5
–34
–3.1
–21
1760 1780 1800 1820 1840 1860 1880 1900 1920
f, FREQUENCY (MHz)
Figure 17. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 32 Watts Avg.
60
50
40
30
20
10
0
22
20
18
16
14
12
10
–15
D
1880 MHz
1840 MHz
1805 MHz
1880 MHz
1805 MHz
1840 MHz
–20
–25
–30
–35
–40
–45
ACPR
V
= 48 Vdc, I = 150 mA
DQ
DD
Single--Carrier W--CDMA, 3.84 MHz
Channel Bandwidth, Input Signal
PAR = 9.9 dB @ 0.01%
Probability on CCDF
1840 MHz
G
ps
1805 MHz
1880 MHz
10
1
100
200
P
, OUTPUT POWER (WATTS) AVG.
out
Figure 18. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
10
5
21
20
19
18
17
16
15
V
P
= 48 Vdc
= 0 dBm
= 150 mA
DD
in
I
DQ
Gain
0
–5
–10
–15
–20
IRL
1400 1500 1600 1700 1800 1900 2000 2100 2200
f, FREQUENCY (MHz)
Figure 19. Broadband Frequency Response
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
11
Table 10. Load Pull Performance — Maximum Power Tuning
V
= 28 Vdc, I = 140 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
DD
DQ
Max Output Power
P1dB
(1)
Z
AM/PM
()
f
Z
Z
in
()
load
()
D
source
()
(%)
60.9
59.2
56.5
Gain (dB)
19.9
(dBm)
51.6
(W)
145
137
(MHz)
1805
1.26 – j5.77
1.64 – j5.93
1.97 – j6.03
1.57 + j5.91
8.58 – j5.21
9.10 – j5.90
8.40 – j6.54
–41
–38
–34
1840
1880
1.84 + j6.11
2.06 + j6.39
19.9
51.4
19.7
51.1
129
Max Output Power
P3dB
(2)
Z
()
AM/PM
()
f
Z
Z
()
load
D
source
()
in
(%)
68.4
67.1
64.2
Gain (dB)
(dBm)
(W)
(MHz)
1805
1840
1880
1.26 – j5.77
1.46 + j5.88
9.56 – j3.93
9.50 – j4.67
9.42 – j5.46
18.3
52.2
167
–34
–32
–29
1.64 – j5.93
1.97 – j6.03
1.64 + j6.03
1.98 + j6.41
17.7
17.8
52.1
51.9
163
156
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.
= Impedance as measured from gate contact to ground.
= Measured impedance presented to the output of the device at the package reference plane.
source
in
load
Table 11. Load Pull Performance — Maximum Drain Efficiency Tuning
V
= 28 Vdc, I = 140 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
DD
DQ
Max Drain Efficiency
P1dB
(1)
Z
AM/PM
()
f
Z
Z
in
()
load
()
D
source
()
(%)
70.2
69.9
68.8
Gain (dB)
(dBm)
(W)
(MHz)
1805
1.26 – j5.77
1.64 – j5.93
1.97 – j6.03
1.51 + j6.34
6.08 – j0.80
5.51 – j1.09
5.18 – j1.44
21.8
50.3
107
–38
–36
–34
1840
1880
1.71 + j6.74
2.05 + j7.16
22.1
22.1
50.0
49.6
100
92
Max Drain Efficiency
P3dB
(2)
Z
()
AM/PM
()
f
Z
Z
()
load
D
source
()
in
(%)
77.2
77.5
77.0
Gain (dB)
(dBm)
(W)
(MHz)
1805
1840
1880
1.26 – j5.77
1.58 + j6.43
6.86 – j0.08
6.28 – j0.28
5.75 – j0.50
20.0
51.2
130
–36
–35
–37
1.64 – j5.93
1.97 – j6.03
1.91 + j6.84
2.42 + j7.30
20.3
20.3
50.8
50.3
120
108
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Z
Z
Z
= Measured impedance presented to the input of the device at the package reference plane.
= Impedance as measured from gate contact to ground.
= Measured impedance presented to the output of the device at the package reference plane.
source
in
load
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Z
Z
in
Z
load
source
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
12
P1dB -- TYPICAL LOAD PULL CONTOURS — 1840 MHz
4
2
4
48
47.5
54
56
48.5
49
2
0
49.5
0
62
68
E
50
E
66
–2
–4
–6
–8
–10
–12
–2
50.5
58
64
60
54
–4
51
P
P
–6
–8
–10
–12
48.5
50
4
6
10
REAL ()
12
14
16
2
8
4
6
10
REAL ()
12
14
16
2
8
Figure 20. P1dB Load Pull Output Power Contours (dBm)
Figure 21. P1dB Load Pull Efficiency Contours (%)
4
2
4
2
23
22.5
22
21.5
0
–2
0
–2
E
E
21
20.5
20
–4
–4
–6
P
P
–6
19.5
19
–38
–36
–40
–8
–8
–32
–34
–24
–10
–12
–10
–12
–28
–30
–26
4
6
10
8
REAL ()
12
14
16
2
4
6
10
REAL ()
12
14
16
2
8
Figure 22. P1dB Load Pull Gain Contours (dB)
Figure 23. P1dB Load Pull AM/PM Contours ()
NOTE:
P
E
= Maximum Output Power
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
13
P3dB -- TYPICAL LOAD PULL CONTOURS — 1840 MHz
4
2
4
48
2
76
74
P
0
0
E
E
72
70
68
66
–2
–4
–6
–8
–10
–12
–2
64
–4
–6
P
62
52
–8
49
51.5
51
50
49.5
–10
–12
48.5
50.5
4
6
10
REAL ()
12
14
16
2
8
4
6
10
REAL ()
12
14
16
2
8
Figure 24. P3dB Load Pull Output Power Contours (dBm)
Figure 25. P3dB Load Pull Efficiency Contours (%)
4
4
2
21.5
21
2
20.5
20
19.5
0
–2
0
–2
E
E
19
18.5
18
–4
–4
–6
P
P
17.5
–38
–36
–6
–34
–30
–32
–28
–26
–40
–8
–8
–10
–12
–10
–12
–42
4
6
10
8
REAL ()
12
14
16
2
4
6
10
8
REAL ()
12
14
16
2
Figure 26. P3dB Load Pull Gain Contours (dB)
Figure 27. P3dB Load Pull AM/PM Contours ()
NOTE:
P
E
= Maximum Output Power
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
14
PACKAGE DIMENSIONS
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
15
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
16
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
RF High Power Model
s2p File
Development Tools
Printed Circuit Boards
To Download Resources Specific to a Given Part Number:
1. Go to http://www.freescale.com/rf
2. Search by part number
3. Click part number link
4. Choose the desired resource from the drop down menu
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
Description
0
May 2015
Initial Release of Data Sheet
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
17
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Document Number: A2G22S160--01S
Rev. 0, 5/2015
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