935233400112 [NXP]
IC SPECIALTY CONSUMER CIRCUIT, PDIP24, 0.400 INCH, PLASTIC, SOT-234, SDIP-24, Consumer IC:Other;型号: | 935233400112 |
厂家: | NXP |
描述: | IC SPECIALTY CONSUMER CIRCUIT, PDIP24, 0.400 INCH, PLASTIC, SOT-234, SDIP-24, Consumer IC:Other 光电二极管 商用集成电路 |
文件: | 总39页 (文件大小:302K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA9178
YUV one chip picture improvement
based on luminance vector-, colour
vector- and spectral processor
Preliminary specification
1999 Sep 24
File under Integrated Circuits, IC02
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
FEATURES
• Picture content dependent non-linear Y, U and V
processing by luminance histogram analysis
• Variable gamma control
• Adaptive black and white stretch control
• Skin tone correction
The adaptive black stretch function of the TDA9178 offers
the possibility of having a larger ‘weight’ for the black parts
of the video signal; the white stretch function offers an
additional overall gain for increased light production.
• Green enhancement
• Blue stretch
• Luminance Transient Improvement (LTI)
• Smart peaking for detail enhancement
• Colour Transient Improvement (CTI)
• SCAn VElocity Modulation (SCAVEM) output
• Line Width Control (LWC)
To maintain a proper colour reproduction, the saturation of
the U- and V-colour difference signals is also controlled as
a function of the actual non-linearity in the luminance
channel.
In the colour vector processor, the dynamic skin tone
correction locally changes the hue of colours that match
skin tones to the correct hue. The green enhancement
circuit activates medium saturated green towards to more
saturated green. The blue stretch circuit can be activated
which shifts colours near white towards blue.
• Video Dependent Coring (VDC)
• Colour Dependent Sharpness (CDS)
• Noise measurement
• Feature Mode (FM) detector
• Cue Flash (CF) detector
The spectral processor provides 1D luminance transient
improvement, luminance detail enhancement by smart
peaking and a 1 D colour transient improvement.
• Three additional pins for access to 6-bit ADC and
I2C-bus
The TDA9178 can be used as a cost effective alternative
to (but also in combination with) scan velocity modulation.
• Adjustable chrominance delay
• TV standard independent
In the spectral processor line width control (or aperture
control) can be user defined. The TDA9178 is capable of
adjusting the amount of coring according to the video level
with the video dependent coring. The TDA9178 is also
capable to give extra sharpness in the cases of saturated
red and magenta parts of the screen using the colour
dependent sharpness feature.
•
I2C-bus controlled
• 1fH and 2fH
• DEmonstration MOde (DEMO).
GENERAL DESCRIPTION
The TDA9178 is a transparent analog video processor
with YUV input and output interfaces. It offers three main
functions: luminance vector processing, colour vector
processing and spectral processing. Beside these three
main functions, there are some additional functions.
An embedded noise detector measures noise during the
field retrace in parts which are expected to be free from
video or text information. With the noise detector a variety
of ‘smart noise control’ architectures can be set up.
A feature mode detector is available for detecting signal
sources like VCR (in still picture mode) that re-insert the
levels of the retrace part. For this kind of signals the noise
measurement of the TDA9178 is not reliable.
In the luminance vector processor, the luminance transfer
function is controlled in a non-linear way by the
distribution, in 5 discrete histogram sections, of the
luminance values measured in a picture. As a result, the
contrast ratio of the most important parts of the scene will
be improved. Black restoration is available in the event of
a set-up in the luminance signal.
An output signal (on the I2C-bus and on a separate pin) is
available that detects when the picture content has been
changed significantly, called cue flash.
An embedded 6-bit ADC can be used for interfacing three
analog low frequency voltage signals (e.g. ambient light
control or beam current voltage level) to the I2C-bus.
A variable gamma function, after the histogram
conversion, offers the possibilities of alternative brightness
control or factory adjustment of the picture tube.
1999 Sep 24
2
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
In the demonstration mode all the features selected by the user are automatically toggled between on and off.
The TDA9178 concept has a maximum flexibility which can be controlled by the embedded I2C-bus. The supply voltage
is 8 V. The device is mounted in a 24-lead SDIP package, or in a 24-lead SO package.
QUICK REFERENCE DATA
SYMBOL
VCC
PARAMETER
supply voltage
CONDITIONS
MIN.
7.2
TYP. MAX. UNIT
8.0
8.8
V
V
V
V
V
Vi(Y)
luminance input voltage (excluding sync) AMS = 0
AMS = 1
−
−
−
−
0.315 0.45
1.0
−
1.41
1.9
−
Vi(UV)
UV input voltage
VFS(ADC)
full-scale ADC input voltage
2.0
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
SOT234-1
SOT137-1
TDA9178
SDIP24
SO24
plastic shrink dual in-line package; 24 leads (400 mil)
TDA9178T
plastic small outline package; 24 leads; body width 7.5 mm
1999 Sep 24
3
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n.c. n.c.
12
13
21
SOUT
luminance vector processing
spectral processing
SMART PEAKING
6
8
9
LUMINANCE TRANSIENT
IMPROVEMENT
19
17
16
Y
LUMINANCE
PROCESSING
YIN
UIN
VIN
YOUT
UOUT
VOUT
+
INPUT
STAGE
OUTPUT
STAGE
U, V
VIDEO DEPENDENT
CORING
black stretch
histogram processing
gamma control
COLOUR DEPENDENT
SHARPNESS
colour vector
processing
SATURATION
CORRECTION
DELAY
CONTROL
COLOUR TRANSIENT
IMPROVEMENT
15
DEC
DIG
20
18
V
CC
SUPPLY
V
EE
24
23
n.c.
n.c.
skin tone correction
green enhancement
blue stretch
COLOUR
PROCESSING
1
WINDOW
GENERATION
SC
22
2
CF
n.c.
NOISE
MEASURING
3
4
5
ADEXT1
ADEXT2
ADEXT3
ANALOG
TO
DIGITAL
CALIBRATE
10
cue flash
TP
FEATURE
MODE
CONVERTER
DETECTION
7
ADR
SDA
SCL
14
11
2
I C-BUS CONTROL
MGR897
Fig.1 Block diagram.
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
PINNING
SYMBOL PIN
DESCRIPTION
sandcastle input
SYMBOL PIN
DESCRIPTION
SC
1
2
n.c.
13
14
15
16
17
18
19
20
21
22
23
24
not connected
n.c.
not connected
ADC input 1
SDA
DECDIG
VOUT
UOUT
VEE
serial data input/output (I2C-bus)
decoupling digital supply
V signal output
ADEXT1
ADEXT2
ADEXT3
YIN
3
4
ADC input 2
5
ADC input 3
U signal output
6
luminance input
address selection input
U signal input
V signal input
ground
ADR
UIN
7
YOUT
VCC
luminance output
supply voltage
8
VIN
9
SOUT
CF
SCAVEM output
cue flash output
not connected
TP
10
11
12
test pin
serial clock input (I2C-bus)
SCL
n.c.
n.c.
not connected
n.c.
not connected
handbook, halfpage
handbook, halfpage
SC
n.c.
SC
n.c.
1
2
1
2
24
23
22
21
20
24
23
22
21
20
n.c.
n.c.
n.c.
n.c.
ADEXT1
ADEXT2
ADEXT3
YIN
3
CF
ADEXT1
ADEXT2
ADEXT3
YIN
3
CF
SOUT
SOUT
4
4
V
V
5
5
CC
CC
19 YOUT
19 YOUT
6
6
TDA9178
TDA9178T
V
V
ADR
ADR
18
18
7
7
EE
EE
UIN
8
17 UOUT
UIN
8
17 UOUT
VIN
VOUT
DEC
VIN
VOUT
DEC
9
16
15
14
13
9
16
15
14
13
TP
TP
10
11
10
11
DIG
DIG
SCL
SDA
n.c.
SCL
SDA
n.c.
n.c. 12
n.c. 12
MGR898
MGR899
Fig.2 Pin configuration (SOT234-1).
Fig.3 Pin configuration (SOT137-1).
1999 Sep 24
5
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
FUNCTIONAL DESCRIPTION
Each field the capacitors are discharged and the
measurement starts all over again.
Y input selection and amplification
Parts in the scene that do not contribute to the information
in that scene, like sub or side titles, should be omitted from
the histogram measurement. No measurements are
performed outside the internal fixed window period.
The gain of the luminance input amplifier and output
amplifier can be adjusted to signal amplitudes of
0.315 and 1.0 V typically (excluding sync) by I2C-bus
bit AMS. The sync part is processed transparently to the
output, independently of the feature settings.
The Y, U and V input signals are clamped during the
burstkey period, defined by the sandcastle reference and
should be DC-coupled (the circuit uses internal clamp
capacitors). During the clamp pulse (see Figs 7, 8, 9
and 10) an artificial black level is inserted in the Y input
signal to correctly preset the internal circuitry.
Very rapid picture changes, also related to the field
interlace, can result in flicker effects. The histogram values
are averaged at the field rate thus cancelling the flicker
effects.
Adaptive black stretch
The so-called adaptive black stretch gain is one of the
factors that control the gamma of the picture. This gain is
controlled by the measured black offset value in the black
stretch circuit and the I2C-bus adaptive black stretch DAC:
bits BT5 to BT0. For pictures with no black offset the black
stretch gain equals unity so the gamma is not changed and
the DAC setting has no influence. In case of a black offset,
the black stretch gain is increased so the gamma of the
picture is reduced. This procedure results in a maximum of
visible details over the whole range of luminances.
However, depending on personal taste, sometimes higher
values of gamma are preferred. Therefore the amount of
gamma reduction can be adjusted by the DAC.
Luminance vector processor
In the luminance vector processor the transfer is controlled
by a black stretch, the histogram processing and a gamma
control circuit. The luminance vector processor also
creates the cue flash signal.
BLACK STRETCH
A black detector measures and stores the level of the most
black part of the scene within an internal defined fixed
window in each field into a time constant. The time
constant and the response time of the loop are internally
fixed. Any difference between this value and the value
measured during the clamp is regarded as black offset.
In a closed loop offsets until a predefined value of the full-
scale value are fed back to the input stage for
compensation. The loop gain is a function of the histogram
and variable gamma settings. The black offset correction
can be switched on and off by the I2C-bus bit BON.
Related to the corrected black offset the nominal signal
amplitude is set again to 100% full scale through an
amplitude stretch function. Luminance values beyond full
scale are unaffected. Additionally, the measured black
offset is also used to set the adaptive black stretch gain
(see also Section “Adaptive black stretch”).
Adaptive white-point stretching
For pictures with many details in white parts, the histogram
conversion procedure makes a transfer with large gain in
the white parts. The amount of light coming out of the
scene is reduced accordingly. The white stretcher
introduces additional overall gain for increased light
production, and so violating the principle of having a
full-scale reference. The white-point stretching can be
switched on or off by means of the I2C-bus bit WPO.
Standard deviation
For scenes in which segments of the histogram distribution
are very dominant with respect to the others, the non-linear
amplification should be reduced in comparison to scenes
with a flat histogram distribution. The standard deviation
detector measures the spread of the histogram distribution
and modulates the user setting of the non-linear amplifier.
HISTOGRAM PROCESSING
For the luminance signal the histogram distribution is
measured in real-time over five segments within an
internally defined fixed window in each field. During the
period that the luminance is in one segment, a
corresponding internal capacitor is loaded by a current
source. At the end of the field five segment voltages are
stored into on-board memories. The voltages stored in the
memories determine the non-linear processing of the
luminance signal to achieve a picture with a maximum of
information (visible details).
Non-linear amplifier
The stored segment voltages determine the individual gain
of each segment in such a way that continuity is granted
for the complete luminance range.
1999 Sep 24
6
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
The maximum and minimum gain of each segment is
limited. Apart from the adaptive white-point stretching the
black and white references are not affected by the
non-linear processing. The amount of non-linearity can be
controlled by the I2C-bus non-linearity DAC:
bits NL5 to NL0.
It comprises three main processing units: the step
improvement processor, the contour processor and the
smart sharpness controller.
Transient improvement processor
The step improvement processor (see Fig.11) comprises
two main functions:
VARIABLE GAMMA
• MINMAX generator
• MINMAX fader.
On top of the histogram conversion a variable gamma
function is applied for an alternative brightness control, or
for factory adjustment. It is intended as an alternative for
the DC-offset of the classic brightness user control.
It maintains the black and white references. The gamma
ranges from 0.5 to 1.5. The gamma can be set by the
I2C-bus variable gamma DAC: bits VG5 to VG0.
The MINMAX generator utilizes all taps of an embedded
luminance delay line to calculate the minimum and
maximum envelope of all signals momentarily stored in the
delay line. The MINMAX fader chooses between the
minimum and maximum envelopes, depending on the
polarity of a decision signal derived from the contour
processor. Figures 12, 13 and 14 show some waveforms
of the step improvement processor and illustrate that fast
transients result with this algorithm. The MINMAX
generator also outputs a signal that represents the
momentary envelope of the luminance input signal.
This envelope information is used by the smart sharpness
controller.
CUE FLASH
In the present TV environment there is a lot of measured
information like ambient light and noise. This information
can be used to make an update of settings of the several
algorithms after a picture has changed. The cue flash
signal detects when a picture changes significantly. When
the picture content has changed, the I2C-bus bit CF is set
to logic 1 in the status register. After reading the status
register, bit CF is reset to logic 0. On the output pin CF the
cue flash information is present (active LOW) for only one
line in the vertical retrace part. This pin is configured as an
open drain output and therefore should be pulled up to the
5 V supply.
Line width control (also called aperture control) can be
performed by I2C-bus line width DAC: bits LW5 to LW0.
This control can be used to compensate for horizontal
geometry errors caused by the gamma, for blooming of the
spot of the CRT, or for compensating SCAVEM.
Contour processor
Spectral processor
The contour processor comprises two contour generators
with different frequency characteristics. The contour
generator generates a second-order derivative of the
incoming luminance signal which is supplied to the smart
sharpness controller. In the smart sharpness controller,
this signal is added to the properly delayed original
luminance input signal, making up the peaking signal for
detail enhancement. The peaking path features a low
peaking frequency of 2 MHz (at 1fH), or a high peaking
frequency of 3 MHz (at 1fH), selectable by I2C-bus
bit CFS.
In the spectral processor the luminance transfer is
controlled by smart peaking, colour dependent sharpness
and luminance transient improvement, defined by the
sharpness improvement processor. The colour transfer is
controlled by a colour transient improvement circuit; an
additional output is available to provide a SCAVEM circuit.
ADJUSTABLE CHROMINANCE DELAY
The colour vector processor drives a delay line for
correcting delay errors between the luminance input signal
and the chrominance input signals (U and V).
The chrominance delay can be adjusted in 6 steps of
12 ns (1fH) or 6 ns (2fH) by the I2C-bus bits CD2 to CD0.
The contour generators utilize three taps of the embedded
luminance delay line. Figure 15 illustrates the normalized
frequency transfer of the filter.
SHARPNESS IMPROVEMENT PROCESSOR
The sharpness improvement processor increases the
slope of large luminance transients of vertical objects and
enhances transients of details in natural scenes by contour
correction.
1999 Sep 24
7
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
Smart sharpness controller
The smart peaking algorithm has been designed such that
the luminance output amplitude will never exceed 110% of
the luminance input signal amplitude. Therefore the
normal peaking range (12 dB) will be reduced at large
transients, and in case of colour dependent sharpness
there is even more reduction.
The smart sharpness controller (see Fig.16) is a fader
circuit that fades between peaked luminance and
step-improved luminance, controlled by the output of a
step discriminating device known as the step detector.
It also contains a variable coring level stage.
However, by setting bit OSP (Overrule Smart Peaking)
one can undo the extra peaking reduction in case of colour
dependant sharpness. It must be emphasized that setting
OSP may lead to unwanted large luminance output
signals, for instance in details in red coloured objects.
The step detector is basically a differentiator, so both
amplitude of the step and its slope add to the detection
criterion. The smart sharpness controller has four user
controls:
• Steepness control, performed by the I2C-bus DAC:
bits SP5 to SP0
COLOUR TRANSIENT IMPROVEMENT
• Peaking control, performed by the I2C-bus DAC:
bits PK5 to PK0
The colour transient improvement circuit (see Fig.17)
increases the slope of the colour transients of vertical
objects. Each channel of the CTI circuit basically consists
of two delay cells: an electronic potentiometer and an edge
detector circuit that controls the wiper position of the
potentiometer. Normally the wiper of the potentiometer will
be in position B (mid position), so passing the input
signal B to the output with a single delay. The control
signal is obtained by the signals A and C.
• Video dependent coring, switched on or switched off by
the I2C-bus bit VDC
• Coring level control, performed by the I2C-bus DAC:
bits CR5 to CR0.
The steepness setting controls the amount of steepness in
the edge-correction processing path.
The peaking setting controls the amount of contour
correction for proper detail enhancement. The envelope
signal generated by the step improvement processor
modulates the peaking setting in order to reduce the
amount of peaking for large sine wave excursions.
When an edge occurs the value of the control signal will
fade between +1 and −1 and finally will become zero
again. A control signal value of +1 fades the wiper in
position C, passing the two times delayed input signal to
the output. A control signal of −1 fades the wiper in
position A, so an undelayed input signal is passed to the
output. The result is an output signal which has steeper
edges than the input signal. Contrary to other existing
CTI algorithms, the transients remain time correct with
respect to the luminance signal, as the algorithm steepens
edges proportionally, without discontinuity.
With video dependent coring, it is possible to have more
reduction of the peaking in the black parts of a scene than
in the white parts, and therefore automatically reducing the
visibility of the background noise.
The coring setting controls the coring level in the peaking
path for rejection of high-frequency noise.
SCAVEM
All four settings facilitate reduction of the impact of the
sharpness features, e.g. for noisy luminance signals.
A luminance output is available for SCAVEM processing.
This luminance signal is not affected by the spectral
processing functions.
COLOUR DEPENDENT SHARPNESS
The colour dependent sharpness circuit increases the
luminance sharpness in saturated red and magenta parts
of the screen. Because of the limited bandwidth of the
colour signals, there is no need to increase the high
frequencies of the colour signals. Instead, the details in the
luminance signal will be enhanced. In this circuit a limited
number of colours are enhanced (red and magenta).
Contrary to normal peaking algorithm, extra gain is applied
for low frequencies (2 MHz at 1fH). This is needed,
because the information that is lacking below 2 MHz (at
1fH) is most important. In large coloured parts the normal
peaking is still active to enhance the fine details.
Colour vector processor
The colour processing part contains skin tone correction,
green enhancement and blue stretch. The colour vector
processing is dependent on the amplitude and sign of the
colour difference signals. Therefore, both the polarity and
the nominal amplitude of the colour difference signals are
relevant when using the colour vector processor facility.
1999 Sep 24
8
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
SKIN TONE CORRECTION
The enclosed correction area can be increased to 140% by
the I2C-bus bit SBL (so-called: Size). The blue stretch can
be switched on or off by the I2C-bus bit DBL.
Skin tones are very sensitive for transmission (hue) errors,
because we have an absolute feeling for skin tones.
To make a picture look free of hue error, the goal is to
make sure that skin tones are put at a correct colour.
SATURATION CORRECTION
The non-linear luminance processing done by the
histogram modification and variable gamma, influences
the colour reproduction; mainly the colour saturation.
Therefore, the U and V signals are linear processed for
saturation compensation.
The dynamic skin tone correction circuit achieves this goal
by instantaneously and locally changing the hue of those
colours which are located in the area in the UV plane that
matches skin tones (see Fig.4).
The correction is dependent on luminance, saturation and
distance to the preferred axis and can be done towards
two different angles. The preferred angle can be chosen by
bit ASK in the I2C-bus settings. The settings are
123° (ASK = 0) and 117° (ASK = 1). The enclosed
correction area can be increased to 140% with the I2C-bus
bit SSK (so-called: Size). The enclosed detection ‘angle’ of
the correcting area can be increased to 160% with the
I2C-bus bit WSK (so-called: Width). The skin tone
correction can be switched on or off with the I2C-bus
bit DSK.
Noise measuring
A video line which is supposed to be free from video
information (‘empty line’) is used to measure the amount of
noise. The measured RMS value of the noise can be used
for reducing several features, by the I2C-bus interface,
such as luminance vector processing and spectral
processing. For the TDA9178 the empty line is chosen
three lines after recognition of the vertical blanking from
the sandcastle pulse input. Figures 7, 8, 9 and 10 show
the measurement locations for different broadcast norms.
GREEN ENHANCEMENT
The noise detector is capable of measuring the
signal-to-noise ratio between −45 and −20 dB. The output
scale runs linearly with dB. The noise samples are
averaged for over 20 fields to reduce the fluctuations in the
measurement process. It is obvious, that for signal
sources (like VCR in still picture mode) that re-insert the
levels of the retrace part, the measurement is not reliable
(see Section “Feature mode detector”). The result of the
averaging process will update the contents of the I2C-bus
register: bits ND5 to ND0 at a rate of 1⁄32 of the field
frequency. If a register access conflict occurs, the data of
the noise register is made invalid by setting the flag bit DV
(Data Valid) to zero.
The green enhancement circuit (see Fig.5) is intended to
shift low saturated green colours towards more saturated
green colours. This shift is achieved by instantaneously
and locally changing those colours which are located in the
area in the UV plane that matches low saturated green.
The saturation shift is dependent on the luminance,
saturation and distance to the detection axis of 208°.
The direction of shift in the colour is fixed by hardware.
The amount of green enhancement can be increased to
160% by the I2C-bus bit GGR. The enclosed detection
‘angle’ of the correcting area can be increased to 160%
with the I2C-bus bit WGR (so-called: Width). The enclosed
correction area can be increased to 140% with the I2C-bus
bit SGR (so-called: Size). The green enhancement can be
switched on or switched off with the I2C-bus bit DGR.
Feature mode detector
A detector is available for detecting signal sources (like
VCR in still picture mode) that re-inserted the levels of the
retrace part. For this kind of signals the noise
BLUE STRETCH
measurement of the TDA9178 is not reliable, but this
detector sets bit FM in the ND-register to logic 1.
For normal video signals bit FM is set to logic 0.
This circuit measures transients (like synchronization
pulses) on the luminance input during the internal V-pulse.
The feature mode detector is setting bit FM to logic 1 when
no transients are present during 2 lines in the vertical
retrace part over 3 fields (like the synchronization pulses).
The blue stretch circuit (see Fig.6) is intended to shift
colours near white towards more blueish coloured white to
give a brighter impression. This shift is achieved by
instantaneously and locally changing those colours which
are located in the area in the UV plane that matches
colours near white. The shift is dependent on the
luminance and saturation. The direction of shift (towards
an angle of 330°) in the colour is fixed by hardware.
The amount of blue stretch can be increased to 160% by
the I2C-bus bit GBL.
1999 Sep 24
9
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
I2C-bus
Successive approximation ADC
The I2C-bus is always in standby mode and responds on a
properly addressed command. Bit PDD (Power-Down
Detected) in the status register is set each time an
interruption of the power supply occurs and is reset only by
reading the status register. A 3-bit identification code can
also be read from the status register, which code can be
used to automatically configure the application by
software.
Pins ADEXT1, ADEXT2 and ADEXT3 are connected to a
6-bit successive approximation ADC via a multiplexer.
The multiplexer toggles between the inputs with each field.
At each field flyback, a conversion is started for two of the
three inputs and the result is stored in the corresponding
bus register ADEXT1, ADEXT2 or ADEXT3. The input pin
ADEXT1 is updated every field, while input fields
ADEXT2 and ADEXT3 are updated once in two
consecutive fields (see Figs 7, 8, 9 and 10). Once in
32 fields the ADEXT2 input is not updated, because then
the noise measurement is updated.
The input control registers can be written sequentially by
the I2C-bus by the embedded automatic subaddress
increment feature or by addressing them directly.
The output control functions cannot be addressed
separately. Reading out the output control functions
always starts at subaddress 00H and all subsequent
words are read out by the automatic subaddress
increment procedure.
In this way, any slow varying analog signal can be given
access to the I2C-bus. If a register access conflict occurs,
the data of that register is made invalid by setting the flag
bit DV (Data Valid) to zero.
Smart noise control
The bits in the I2C-bus are preset to logic 0 at power-on
except for bits AMS and VG5: therefore the TDA9178 is in
1.0 V luminance signal range and the variable gamma is
set to 20H (gamma correction 0%).
With the help of the internal noise detector and a
user-preferred noise algorithm, the user can make a fully
automatic I2C-bus feature reduction, briefly called ‘Smart
Noise Control’.
I2C-BUS SPECIFICATION
Demonstration mode
The slave address of the IC is given in Table “Slave
address”. If pin ADR of the TDA9178 is connected to
ground, the I2C-bus address is 40H; if pin ADR is
connected to pin DECDIG, the I2C-bus address is E0H.
The circuit operates on clock frequencies up to 400 kHz.
By the I2C-bus bit DEM all the picture improvement
features can be demonstrated in one picture. By setting
bit DEM to logic 1, all the features selected by the user are
active for 5 s in 1fH mode (in 2fH mode: 2.5 s), and for
another 5 s in 1fH mode (in 2fH mode: 2.5 s) all features
selected are turned off (then the TDA9178 is ‘transparent’
to the incoming signal).
Slave address
A6
A5
A4
A3
A2
A1
A0
R/W
Internal window
ADR
1
ADR
0
0
0
0
X
To determine the histogram levels and the black offset the
TDA9178 performs several measurements. An internally
defined window serves to exclude parts in the scene like
‘subtitling’ or ‘logos’. The internal window can be regarded
as a weighting function which has a value of one within a
square near the centre of the screen and which gradually
decreases to zero towards the edges.
Auto-increment mode is available for subaddresses.
When bit WLB (Window Letter Box) is made logic 1, the
height of the window is reduced by a factor of 2⁄3.
This prevents the contribution of the black bars above and
below a 16 : 9 scene to the measurements.
1999 Sep 24
10
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
Control functions
DATA BYTE
FUNCTIONS
Inputs
TYPE
SUBADDRESS
D7
D6
D5
D4
D3
D2
D1
D0
Control 1
REG
00
01
02
03
04
05
06
07
08
09
0A
DEM VDC WLB FHS
OSP WPO
CFS
0
LDH
0
AMS
Control 2
0
0
CD2 CD1 CD0
Control 3
SGR WGR GGR DGR SSK WSK ASK DSK
Control 4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BON
BT5
NL5
VG5
PK5
SP5
CTI
BT4
NL4
VG4
PK4
SP4
CDS
BT3
NL3
VG3
PK3
SP3
SBL
BT2
NL2
VG2
PK2
SP2
GBL
BT1
NL1
VG1
PK1
SP1
DBL
BT0
NL0
VG0
PK0
SP0
Adaptive black stretch
Non-linearity amplifier
Variable gamma
Peaking
DAC
Steepness
Coring
CR5 CR4 CR3 CR2 CR1 CR0
Line width
LW5
X
LW4
CF
LW3
ID2
LW2
ID1
LW1
ID0
LW0
PDD
Outputs
Status
REG
00
01
02
03
04
X
FM
X
X
Noise detection
ADEXT1 (output)
ADEXT2 (output)
ADEXT3 (output)
DV
DV
DV
DV
ND5 ND4 ND3 ND2 ND1 ND0
AD5
AD5
AD5
AD4
AD4
AD4
AD3
AD3
AD3
AD2
AD2
AD2
AD1
AD1
AD1
AD0
AD0
AD0
X
X
1999 Sep 24
11
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
Input signals
Table 8 Chrominance delay
Table 1 Amplitude mode selection
CD2 CD1 CD0
FUNCTION
0
1
0
1
0
1
40 ns at 1fH or 20 ns at 2fH
−32 ns at 1fH or +16 ns at 2fH
AMS
FUNCTION
0
0.315 V luminance (black to white) at
YIN
Table 9 Overrule smart peaking
1
1.0 V luminance (black to white) at YIN
OSP
FUNCTION
Table 2 Luminance determined histogram
0
smart peaking (maximum peaking
reduced if Coxing)
LDH
FUNCTION
1
overrule smart peaking
0
1
histogram segments fixed
histogram segments determined by peak
white
Table 10 White-point stretch on/off
WPO
FUNCTION
Table 3 Contour filter selection
0
1
white-point stretch on
white-point stretch off
CFS
FUNCTION
0
peaking frequency is 2 MHz at 1fH or
4 MHz at 2fH
Table 11 Dynamic skin tone on/off
1
peaking frequency is 3 MHz at 1fH or
6 MHz at 2fH
DSK
FUNCTION
0
1
skin tone off
skin tone on
Table 4 Line frequency selection
FHS
FUNCTION
Table 12 Dynamic skin tone angle
0
1
1fH
2fH
ASK
FUNCTION
0
1
angle correction 123°
angle correction 117°
Table 5 Window letterbox format
WLB
FUNCTION
Table 13 Dynamic skin tone width
0
1
normal internal window format
WSK
FUNCTION
‘Letterbox’ internal window format
0
1
default detection angle
60% increased detection angle
Table 6 Video dependent coring on/off
VDC
FUNCTION
video dependent coring off
video dependent coring on
Table 14 Dynamic skin tone size
0
1
SSK
FUNCTION
0
1
default area
40% increased area
Table 7 Demonstration mode on/off
DEM
FUNCTION
Table 15 Green enhancement on/off
0
1
DEMO off
DGR
FUNCTION
DEMO on: auto-toggle selected features
on/off (cycle is 10 s at 1fH or 5 s at 2fH)
0
1
green enhancement off
green enhancement on
1999 Sep 24
12
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
Table 16 Green enhancement gain
Table 24 Black offset compensation on/off
GGR
FUNCTION
BON
FUNCTION
0
1
default enhancement
60% increased gain
0
1
black offset compensation off
black offset compensation on
Table 17 Green enhancement width
Table 25 Adaptive black stretch
WGR
FUNCTION
BT5 BT4 BT3 BT2 BT1 BT0
FUNCTION
0%
100%
0
1
default detection angle
0
1
0
1
0
1
0
1
0
1
0
1
60% increased detection angle
Table 18 Green enhancement size
Table 26 Non-linearity amplifier
NL5 NL4 NL3 NL2 NL1 NL0
SGR
FUNCTION
FUNCTION
0
1
default area
0
1
0
1
0
1
0
1
0
1
0
1
0%
40% increased area
100%
Table 19 Blue stretch on/off
Table 27 Variable gamma
VG5 VG4 VG3 VG2 VG1 VG0
DBL
FUNCTION
FUNCTION
0
1
blue stretch off
blue stretch on
0
1
0
1
0
1
0
1
0
1
0
1
−100%
100%
Table 20 Blue stretch gain
Table 28 Peaking amplitude
PK5 PK4 PK3 PK2 PK1 PK0
GBL
FUNCTION
FUNCTION
0
1
default gain
60% increased gain
0
1
0
1
0
1
0
1
0
1
0
1
0%
100%
Table 21 Blue stretch size
Table 29 Steepness correction
SP5 SP4 SP3 SP2 SP1 SP0
SBL
FUNCTION
FUNCTION
0
1
default area
40% increased area
0
1
0
1
0
1
0
1
0
1
0
1
0%
100%
Table 22 Colour dependent sharpness on/off
Table 30 Coring level
CR5 CR4 CR3 CR2 CR1 CR0
CDS
FUNCTION
FUNCTION
0
1
colour dependent sharpness off
colour dependent sharpness on
0
1
0
1
0
1
0
1
0
1
0
1
0%
30%
Table 23 Colour transient improvement on/off
CTI
0
FUNCTION
colour transient improvement off
colour transient improvement on
1
1999 Sep 24
13
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
Table 31 Line width correction
Table 35 Noise detector
ND5 ND4 ND3 ND2 ND1 ND0
LW5 LW4 LW3 LW2 LW1 LW0
FUNCTION
FUNCTION
−45 dB
−20 dB
0
1
0
1
0
1
0
1
0
1
0
33% duty
factor at 2 MHz
sine wave/1fH
0
1
0
1
0
1
0
1
0
1
0
1
1
67% duty
Table 36 ADEXT1, ADEXT2 and ADEXT3
factor at 2 MHz
sine wave/1fH
AD5 AD4 AD3 AD2 AD1 AD0
FUNCTION
0
0
0
0
0
0
external
voltage = 0 V
Output signals
Table 32 Power-down detection
1
1
1
1
1
1
external
voltage = 2 V
PDD
FUNCTION
Table 37 Data valid bit of
0
1
no power-down detected since last read
power-down detected
noise detector/ADEXT1, 2 and 3 registers
DV
FUNCTION
Table 33 Identification code
0
data not valid because of possible register
access collision
ID2 ID1 ID0
FUNCTION
TDA9178/N1
1
data is valid
0
1
0
Table 38 Feature mode detector
Table 34 Cue flash
FM
0
FUNCTION
CF
FUNCTION
normal video signal detected
0
1
no cue flash since last read
cue flash detected
1
feature mode detected (noise detector is
not reliable)
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); all voltages referenced to ground.
SYMBOL PARAMETER MIN. MAX.
−0.5 +8.8
UNIT
VCC
Vn
supply voltage
V
voltage on any pin
−0.5
−55
−10
−
VCC + 0.5
+150
+70
V
Tstg
Tamb
Tj
storage temperature
°C
°C
°C
operating ambient temperature
operating junction temperature
150
HANDLING
All pins are protected against ESD by means of internal clamping diodes. The protection circuit meets the following
specification:
Human body model: C = 100 pF; R = 1.5 kΩ; all pins >3000 V
Machine model: C = 200 pF; R = 0 Ω; all pins >200 V.
At an ambient temperature of 90 °C, all pins meet the following specification:
Itrigger > 100 mA or Vpin > 1.5VCC(max)
Itrigger < −100 mA or Vpin < −0.5VCC(max)
1999 Sep 24
14
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
PARAMETER
CONDITIONS
in free air
VALUE
UNIT
thermal resistance from junction to ambient
TDA9178 (SDIP24)
56
65
K/W
K/W
TDA9178T (SO24)
QUALITY SPECIFICATION
In accordance with “SNW-FQ-611 part E”.
CHARACTERISTICS
V
CC = 8 V; Tamb = 25 °C; unless otherwise specified.
SYMBOL PARAMETER
Supply
CONDITIONS
MIN.
TYP.
MAX.
UNIT
SUPPLY VOLTAGE (PIN VCC
)
VCC
ICC
supply voltage
supply current
7.2
−
8.0
8.8
V
1fH mode
2fH mode
100
105
−
−
mA
mA
−
DIGITAL SUPPLY DECOUPLING (PIN DECDIG
)
VDECDIG
IDECDIG
decoupling voltage
−
−
5
−
V
decoupling load current
−
1
mA
Input and output selection
LUMINANCE INPUT (PIN YIN)
Vi(Y)
input voltage (excluding sync)
AMS = 0
AMS = 1
no clamp
−
−
−
0.315
1.0
−
0.45
1.41
0.1
V
V
Ii(bias)(Y)
input bias current
µA
LUMINANCE OUTPUT (PIN YOUT)
Vo(cl)
output voltage level during
clamping
AMS = 1
AMS = 0
−
2.7
−
V
V
−
0.8
−
GY(i-o)
luminance gain input to output
transparent
at AMS = 1;
at 1 V (p-p)
0.93
1.04
1.15
transparent
at AMS = 0;
at 0.3 V (p-p)
0.96
1.07
1.18
S/N(Y)
BY
signal-to-noise ratio of luminance
output
transparent
52
5
−
−
−
0
−
dB
luminance bandwidth
1fH mode (−1 dB);
transparent
−
MHz
MHz
%
2fH mode (−1 dB);
transparent
6
−
Ebl
black level error
transparent
−1.0
+1.0
1999 Sep 24
15
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
SYMBOL
Ro
Io(bias)
CL
PARAMETER
output resistance
CONDITIONS
MIN.
TYP.
MAX.
150
UNIT
−
−
−
−
Ω
output bias current
load capacitance
1.3
−
mA
pF
−
15
COLOUR DIFFERENCE INPUTS U AND V (PINS UIN AND VIN)
Vi(U)(p-p)
Vi(V)(p-p)
Ii(bias)
input voltage U
(peak-to-peak value)
−
−
−
1.33
1.05
−
1.9
1.9
0.1
V
input voltage V
(peak-to-peak value)
V
input bias current
no clamp
µA
COLOUR DIFFERENCE OUTPUTS U AND V (PINS UOUT AND VOUT)
Vo(cl)
output voltage level during
clamping
−
2.7
−
V
GUV(i-o)
Eoffset
∆Gtrack
BUV
gain inputs to output
offset error
transparent
transparent
transparent
0.90
−1
1.00
1.10
+1
5
0
−
−
%
UV gain tracking error
bandwidth
−
%
1fH mode;
2.5
−
MHz
transparent (−3 dB)
2fH mode;
5
−
−
MHz
transparent (−3 dB)
Ro
output resistance
output bias current
load capacitance
−
−
−
−
150
−
Ω
Io(bias)
CL
1.3
−
mA
pF
15
Luminance vector processing
BLACK STRETCH
BLOScor(i)
input black offset correction
8
10
12
%
HISTOGRAM
White-point stretch
GWP(max)
maximum luminance gain for white maximum non-linearity
−
1.1
−
stretch
setting gain
Non-linear amplifier
Gnla(min)
Gnla(max)
Gnla
minimum segment gain
maximum non-linearity
setting gain
−
−
−
0.4
−
−
−
maximum segment gain
maximum non-linearity
setting gain
2.0
non-linear control curve
63 steps
0 to 100
%
%
VARIABLE GAMMA
Gg(var)(min)L
Gg(var)(max)
Gnla
minimum variable gamma setting
−
−
−
0.5
−
−
−
maximum variable gamma setting
non-linear control curve
1.5
63 steps
16
0 to 100
1999 Sep 24
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Colour vector processing
SKIN TONE; note 1 and Fig.4
ϕcor
correction angle
ASK = 0; DSK = 1
ASK = 1; DSK = 1
−
−
−
123
−
−
−
deg
117
45
deg
deg
ϕap
correction range (or aperture angle) DSK = 1; SSK = 1;
WSK = 0
GREEN ENHANCEMENT; note 1 and Fig.5
ϕcor
ϕap
correction angle
DGR = 1
−
−
208
45
−
−
deg
deg
correction range (or aperture angle) DGR = 1; SGR = 0;
WGR = 0
BLUE STRETCH; note 2 and Fig.6
ϕ(str) stretch angle
DBL = 1
note 3
−
−
330
12
−
−
deg
dB
Spectral processing
GENERAL
Qmax
maximum contour amplitude at
centre frequency
Contour filter low frequency peaking
fpc(l) peaking centre frequency
1fH mode; CFS = 0
2fH mode; CFS = 0
−
−
2.0
4.0
−
−
MHz
MHz
Contour filter high frequency peaking
fpc(h)
peaking centre frequency
1fH mode; CFS = 1
2fH mode; CFS = 1
−
−
3.0
6.0
−
−
MHz
MHz
Step detector
fdc
detection centre frequency
1fH mode
2fH mode
−
−
1.18
2.36
−
−
MHz
MHz
PEAKING
GPK
peaking control curve
coring control curve
63 steps
63 steps
−
−
0 to 100
0 to 45
−
−
%
%
CORING
GCR
LUMINANCE TRANSIENT IMPROVEMENT
tr(min)
GSP
Line width control
tsd(max) maximum step displacement
minimum rise time 10% to 90%
note 4
−
−
30
−
−
ns
%
steepness control curve
63 steps
0 to 100
1fH mode
2fH mode
−
−
−
140
−
−
−
ns
ns
%
70
GLW
line width control curve (duty factor) 63 steps at 1 MHz
sine wave at 1fH
33 to 67
1999 Sep 24
17
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
COLOUR TRANSIENT IMPROVEMENT
tr(min)
minimum rise time 10% to 90%
note 5
−
50
−
ns
COLOUR DEPENDENT SHARPNESS
fpc
peaking centre frequency
1fH mode
2fH mode
note 3
−
−
−
2.0
4.0
6
−
−
−
MHz
MHz
dB
Qmax
maximum contour amplitude at
centre frequency
SCAVEM
SCAVEM OUTPUT (PIN SOUT)
Vo(cl) output voltage level during
−
2.2
−
V
clamping
GY
gain luminance input to SCAVEM
output
0.93
1.04
1.15
BY
bandwidth
1fH mode (−1 dB)
2fH mode (−1 dB)
5
−
−
MHz
MHz
Ω
6.0
−
−
−
Ro
output resistance
output bias current
load capacitance
−
150
−
Io(bias)
CL
0.8
−
−
mA
pF
−
15
−
td(SOUT-YOUT) delay w.r.t. YOUT
−
−20
ns
Successive approximation ADC
ADC INPUTS (PINS ADEXT1, ADEXT2 AND ADEXT3)
VFS
full-scale input voltage range
input bias current
with respect to ground
−
−
−
−
−
−
−
−
2.0
−
−
V
Ii(bias)
RES
DLE
ILE
0.1
−
µA
data path resolution
6
bit
differential linearity error
integral linearity error
conversion frequency
−
1
LSB
LSB
Hz
−
1
fcon
ADEXT1
1fV
0.5fV
8
−
ADEXT2; ADEXT3
each channel
−
Hz
Qadt
conversion time (video lines)
−
lines
Timing
SANDCASTLE INPUT (PIN SC)
Ii(bias)
Vsc(bn)
Vsc(bc)
tW(bk)
input bias current
−
−
1
µA
V
detection level for blank
detection level for clamp
burst key pulse width
no clamping
0.9
−
1.15
1.40
0.9Vtop
−
V
1fH mode
2fH mode
1.8
0.9
6
−
−
−
−
−
µs
µs
lines
V
−
tV
vertical retrace time
−
Vbk(var)(p-p)
ripple on sandcastle burst key level
(peak-to-peak value)
−
0.04Vtop
1999 Sep 24
18
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Overall output group delay performance
td(YUV)
input to output delay of YUV signals 1fH mode; transparent
2fH mode; transparent
−
−
300
−
−
ns
180
0
ns
ns
ns
tdm(UV-Y)
adjustment delay U and V signals
w.r.t. Y signal
1fH mode; transparent −32
2fH mode; transparent −16
+40
+20
0
Noise measurement
Rnoise range of noise detector
tcon conversion time
see Figure 18
−45
−
−20
dB
s
−
32fV
−
Cue flash
CUE FLASH OUTPUT (PIN CF); OPEN COLLECTOR
Vo(max)
maximum output voltage
pull-up to external
supply
−
−
−
−
5.5
1
V
Isink(max)
maximum sink current
mA
Notes
1. The amount of correction depends on the parameters of the incoming YUV signals; therefore it is not possible to give
exact figures for the correction angle. The aperture angle of the correction range of 45° (±22.5°) is just given as an
indication and is valid for an input signal with a luminance signal amplitude of 75% and a colour saturation of 50%.
2. The amount of correction depends on the parameters of the incoming YUV signals; therefore it is not possible to give
exact figures for the correction angle.
3. The contour signal cannot be measured separately from the luminance input signal. The contour signal is also
processed by the smart noise controller. The frequency transfer in the peaking mode of the luminance signal can be
derived from the frequency transfer of the selected contour signal, taking into account the summation of the contour
signal and the luminance input signal. The frequency transfer is most easily measured by sine excitation with a
relatively small signal amplitude of 10% of the selected dynamic range of the luminance input, to avoid interaction
with the step detector.
4. Peaking set to minimum. Input signal is a sine wave with the nominal peak-to-peak amplitude corresponding to the
selected input range.
5. Input signal is a 250 kHz block with a rise time of 260 ns and a nominal peak-to-peak amplitude corresponding to the
selected input range.
1999 Sep 24
19
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
red
V
I-axis
fully saturated colours
yellow
−U
MGR900
Fig.4 Skin tone correction range for a correction angle of 123°.
yellow
−U
detection-axis
fully saturated colours
−V
green
MGR901
Fig.5 Green enhancement correction range.
1999 Sep 24
20
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
U
blue
detection-axis
fully saturated colours
−V
cyan
MGR902
Fig.6 Blue stretch correction range.
1999 Sep 24
21
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NTSC-signal, field A
video input
sandcastle input
burst key pulse
clamping pulse
internal V-pulse
+ FM detection
noise detector
measuring
ADEXT1
conversion
ADEXT2,
ADEXT3
conversion
cue flash output
MGR903
Fig.7 Timing pulses for NTSC input signal, field A.
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NTSC-signal, field B
video input
sandcastle input
burst key pulse
clamping pulse
internal V-pulse
+ FM detection
noise detector
measuring
ADEXT1
conversion
ADEXT2,
ADEXT3
conversion
cue flash output
MGR904
Fig.8 Timing pulses for NTSC input signal, field B.
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PAL-signal, field A
video input
sandcastle input
burst key pulse
clamping pulse
internal V-pulse
+ FM detection
noise detector
measuring
ADEXT1
conversion
ADEXT2,
ADEXT3
conversion
cue flash output
MGR933
Fig.9 Timing pulses for PAL and SECAM input signal, field A.
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ahdnbok,uflapegwidt
PAL-signal, field B
video input
sandcastle input
burst key pulse
clamping pulse
internal V-pulse
+ FM detection
noise detector
measuring
ADEXT1
conversion
ADEXT2,
ADEXT3
conversion
cue flash output
MGR934
Fig.10 Timing pulses for PAL and SECAM input signal, field B.
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
line width
control
MINMAX
SELECTOR
Y
FADER
step
DELAY
CLAMPS
MINMAX
Y
in
Y
envelope
MGR905
Fig.11 Block diagram of the step improvement processor.
MGR906
1000
handbook, halfpage
V
o
(mV)
(1)
800
600
400
(2)
200
0
0
0.5
1.0
1.5
2.0
t (µs)
(1) 90% of nominal amplitude.
(2) 30% of nominal amplitude.
Fig.12 Response signals for maximum step improvement, no peaking and nominal line width.
1999 Sep 24
26
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
MGR907
1000
handbook, halfpage
V
o
(mV)
(1)
800
600
400
200
(2)
0
0
0.5
1.0
1.5
2.0
t (µs)
(1) 90% of nominal amplitude.
(2) 30% of nominal amplitude.
Fig.13 Response signals for maximum step improvement, no peaking and minimum line width.
MGR908
1000
handbook, halfpage
V
o
(mV)
(1)
800
600
400
(2)
200
0
0
0.5
1.0
1.5
2.0
t (µs)
(1) 90% of nominal amplitude.
(2) 30% of nominal amplitude.
Fig.14 Response signals for maximum step improvement, no peaking and maximum line width.
1999 Sep 24
27
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
MGR909
100
handbook, halfpage
contour
(%)
(1)
80
60
(2)
40
20
0
5
6
7
10
10
10
f (Hz)
(1) 1fH mode.
(2) 2fH mode.
Fig.15 Frequency transfers of contour filter at f = 2.0 MHz.
STEP
DETECTOR
delay
cells
coring
control
Y
Y
envelope
step
Y
CORING
contour
Y
FADER
c
Y
step
peaking steepness
MGR910
control
control
Fig.16 Block diagram of smart sharpness controller.
28
1999 Sep 24
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
handbook, halfpage
UV
DELAY
control
DELAY
in
B
A
C
UV
out
MGR911
Fig.17 Block diagram of colour transient improvement.
MGR912
80
handbook, halfpage
DAC-
value
60
40
20
0
−50
−40
−30
−20
−10
S/N (dB)
Fig.18 Typical noise measurement curve of input noise (dB) versus DAC-value.
29
1999 Sep 24
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
TEST AND APPLICATION INFORMATION
The TDA9178 is especially designed for YUV applications. A typical application diagram is shown in Fig.19.
SC
n.c.
n.c.
1
2
24
23
sandcastle
n.c.
CF
ADEXT1
22
21
20
ADEXT1
ADEXT2
3
CF
100 kΩ
SOUT
ADEXT2
ADEXT3
YIN
SOUT
8 V
4
5
6
7
100 kΩ
V
CC
100
nF
10
µF
100 kΩ
YOUT
ADEXT3
YIN
19
18
YOUT
0 V
TDA9178
1
0
V
EE
ADR
UOUT
VOUT
DEC
UIN
UOUT
VOUT
UIN
17
16
8
VIN
9
VIN
TP
SCL
n.c.
DIG
10
11
12
15
14
13
100 nF
100 Ω
SDA
n.c.
SCL
SDA
100 Ω
MGR913
Fig.19 YUV application.
1999 Sep 24
30
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
PACKAGE OUTLINES
SDIP24: plastic shrink dual in-line package; 24 leads (400 mil)
SOT234-1
D
M
E
A
2
A
A
L
1
c
(e )
w M
e
Z
1
b
1
M
H
b
24
13
pin 1 index
E
1
12
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
max.
A
A
2
max.
1
(1)
(1)
Z
w
UNIT
b
b
c
D
E
e
e
L
M
M
1
1
E
H
min.
max.
1.3
0.8
0.53
0.40
0.32
0.23
22.3
21.4
9.1
8.7
3.2
2.8
10.7
10.2
12.2
10.5
mm
4.7
0.51
3.8
1.778
10.16
0.18
1.6
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-02-04
SOT234-1
1999 Sep 24
31
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
D
E
A
X
c
H
v
M
A
E
y
Z
24
13
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
12
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
15.6
15.2
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
mm
2.65
0.25
0.01
1.27
0.050
1.4
0.25 0.25
0.01
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.61
0.014 0.009 0.60
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches 0.10
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-01-24
97-05-22
SOT137-1
075E05
MS-013AD
1999 Sep 24
32
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
SOLDERING
Introduction
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
WAVE SOLDERING
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mount components are mixed on
one printed-circuit board. However, wave soldering is not
always suitable for surface mount ICs, or for printed-circuit
boards with high population densities. In these situations
reflow soldering is often used.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
Through-hole mount packages
SOLDERING BY DIPPING OR BY SOLDER WAVE
• For packages with leads on two sides and a pitch (e):
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joints for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
MANUAL SOLDERING
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
300 and 400 °C, contact may be up to 5 seconds.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Surface mount packages
REFLOW SOLDERING
MANUAL SOLDERING
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
1999 Sep 24
33
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
Suitability of IC packages for wave, reflow and dipping soldering methods
SOLDERING METHOD
WAVE
REFLOW(1) DIPPING
suitable(2)
MOUNTING
PACKAGE
Through-hole mount DBS, DIP, HDIP, SDIP, SIL
−
suitable
Surface mount
BGA, LFBGA, SQFP, TFBGA
not suitable
not suitable(3)
suitable
suitable
−
−
HBCC, HLQFP, HSQFP, HSOP, HTQFP,
HTSSOP, SMS
PLCC(4), SO, SOJ
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
suitable
suitable
−
−
−
not recommended(4)(5) suitable
not recommended(6)
suitable
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
1999 Sep 24
34
Philips Semiconductors
Preliminary specification
YUV one chip picture improvement based on luminance
vector-, colour vector- and spectral processor
TDA9178
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1999 Sep 24
35
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For all other countries apply to: Philips Semiconductors,
Internet: http://www.semiconductors.philips.com
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
68
SCA
© Philips Electronics N.V. 1999
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545004/01/pp36
Date of release: 1999 Sep 24
Document order number: 9397 750 04621
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TDA9178; YUV one chip picture improvement based on luminance vector-, colour vector- and spectral processor
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Description
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Automotive
Consumer Multimedia
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Communications
The TDA9178 is a transparent analog video processor with YUV input and output interfaces. It offers three main functions: luminance
vector processing, colour vector processing and spectral processing. Beside these three main functions, there are some additional
functions.
PC/PC-peripherals
Cross reference
In the luminance vector processor, the luminance transfer function is controlled in a non-linear way by the distribution, in 5 discrete
histogram sections, of the luminance values measured in a picture. As a result, the contrast ratio of the most important parts of the scene
will be improved. Black restoration is available in the event of a set-up in the luminance signal.
Models
Packages
Application notes
Selection guides
Other technical documentation
End of Life information
Datahandbook system
A variable gamma function, after the histogram conversion, offers the possibilities of alternative brightness control or factory adjustment of
the picture tube.
The adaptive black stretch function of the TDA9178 offers the possibility of having a larger ‘weight’ for the black parts of the video signal;
the white stretch function offers an additional overall gain for increased light production.
To maintain a proper colour reproduction, the saturation of the U- and V-colour difference signals is also controlled as a function of the
actual non-linearity in the luminance channel.
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In the colour vector processor, the dynamic skin tone correction locally changes the hue of colours that match skin tones to the correct hue.
The green enhancement circuit activates medium saturated green towards to more saturated green. The blue stretch circuit can be
activated which shifts colours near white towards blue.
TDA9178
The spectral processor provides 1D luminance transient improvement, luminance detail enhancement by smart peaking and a 1 D colour
transient improvement. The TDA9178 can be used as a cost effective alternative to (but also in combination with) scan velocity modulation.
TDA9178
In the spectral processor line width control (or aperture control) can be user defined. The TDA9178 is capable of adjusting the amount of
coring according to the video level with the video dependent coring. The TDA9178 is also capable to give extra sharpness in the cases of
saturated red and magenta parts of the screen using the colour dependent sharpness feature.
An embedded noise detector measures noise during the field retrace in parts which are expected to be free from video or text information.
With the noise detector a variety of ‘smart noise control’ architectures can be set up.
A feature mode detector is available for detecting signal sources like VCR (in still picture mode) that re-insert the levels of the retrace part.
For this kind of signals the noise measurement of the TDA9178 is not reliable.
An output signal (on the I²C-bus and on a separate pin) is available that detects when the picture content has been changed significantly,
called cue flash.
An embedded 6-bit ADC can be used for interfacing three analog low frequency voltage signals (e.g. ambient light control or beam current
voltage level) to the I²C-bus.
In the demonstration mode all the features selected by the user are automatically toggled between on and off.
The TDA9178 concept has a maximum flexibility which can be controlled by the embedded I²C-bus. The supply voltage is 8 V. The device
is mounted in a 24-lead SDIP package, or in a 24-lead SO package.
Features
l Picture content dependent non-linear Y, U and V processing by luminance histogram analysis
l Variable gamma control
l Adaptive black and white stretch control
l Skin tone correction
l Green enhancement
l Blue stretch
l Luminance Transient Improvement (LTI)
l Smart peaking for detail enhancement
l Colour Transient Improvement (CTI)
l SCAn VElocity Modulation (SCAVEM) output
l Line Width Control (LWC)
l Video Dependent Coring (VDC)
l Colour Dependent Sharpness (CDS)
l Noise measurement
l Feature Mode (FM) detector
l Cue Flash (CF) detector
l Three additional pins for access to 6-bit ADC and I²C-bus
l Adjustable chrominance delay
l TV standard independent
l I²C-bus controlled
l 1fH and 2fH
l DEmonstration MOde (DEMO).
Datasheet
File
size
(kB)
Publication
release date Datasheet status
Page
count
Type nr. Title
Datasheet
Download
TDA9178 YUV one chip picture improvement
based on luminance vector-, colour
vector- and spectral processor
24-Sep-99
Preliminary
Specification
36
227
Products, packages, availability and ordering
North American
Partnumber
Order code
(12nc)
Partnumber
marking/packing
package device status
buy online
TDA9178/N1 TDA9178N
TDA9178T/N1
9352 334 00112 Standard Marking * Tube
9352 334 10112 Standard Marking * Tube
SOT234 Samples available
SOT137 Samples available
-
-
Standard Marking * Reel Pack,
9352 334 10118
SMD, 13"
SOT137 Samples available
SOT137 Samples available
Standard Marking * Reel Dry
9352 334 10518
-
Pack, SMD, 13"
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Royal Philips Electronics
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