7LVC646APWDH [NXP]

Octal bus transceiver/register 3-State; 八路总线收发器/寄存器三态
7LVC646APWDH
型号: 7LVC646APWDH
厂家: NXP    NXP
描述:

Octal bus transceiver/register 3-State
八路总线收发器/寄存器三态

总线驱动器 总线收发器 逻辑集成电路 光电二极管
文件: 总16页 (文件大小:142K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
74LVC646A  
Octal bus transceiver/register (3-State)  
Product specification  
1998 Jul 29  
Supercedes data of 1998 Mar 25  
IC24 Data Handbook  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
Octal bus transceiver/register (3-State)  
74LVC646A  
for multiplexed transmission of data directly from the internal  
FEATURES  
registers. Data on the ‘A’ or ‘B’ bus will be clocked in the internal  
registers, as the appropriate clock (CPAB or CPBA) goes to a HIGH  
logic level. Output enable (OE) and direction (DIR) inputs are  
provided to control the transceiver function. In the transceiver mode,  
data present at the high-impedance port may be stored in either the  
‘A’ or ‘B’ register, or in both. The select source inputs (SAB and  
SBA) can multiplex stored and real-time (transparent mode) data.  
Wide supply voltage range of 1.2V to 3.6V  
Flow-through pin-out architecture  
In accordance with JEDEC standard no. 8-1A  
CMOS low power consumption  
Direct interface with TTL levels  
The direction (DIR) input determines which bus will receive data  
when OE is active (LOW). In the isolation mode (OE = HIGH), ‘A’  
data may be stored in the ‘B’ register and/or ‘B’ data may be stored  
in the ‘A’ register.  
5 Volt tolerant inputs/outputs, for interfacing with 5 Volt logic  
DESCRIPTION  
The 74LVC646A is a high performance, low-power, low-voltage  
Si-gate CMOS device, superior to most advanced CMOS  
compatible TTL families.  
When an output function is disabled, the input function is still  
enabled and may be used to store and transmit data. Only one of  
the two buses, ‘A’ or ‘B’ may be driven at a time.  
Inputs can be driven from either 3.3V or 5.0V devices. In 3-State  
operation, outputs can handle 5V. This feature allows the use of  
these devices as translators in a mixed 3.3V/5V environment.  
The ‘646A’ is functionally identical to the ‘648A’ but has non-inverting  
data paths.  
The 74LVC646A consist of non-inverting bus transceiver circuits  
with 3-State outputs, D-type flip-flops and control circuitry arranged  
QUICK REFERENCE DATA  
GND = 0V; T  
= 25°C; t = t 2.5 ns  
amb  
r f  
SYMBOL  
PARAMETER  
CONDITIONS  
TYPICAL  
UNIT  
Propagation delay  
An to Yn  
C = 50pF  
L
t
f
/t  
ns  
PHL PLH  
V
CC  
= 3.3V  
3.9  
250  
5.0  
10  
Maximum clock frequency  
Input capacitance  
MHz  
pF  
max  
C
C
C
I
Input/output capacitance  
Power dissipation capacitance per gate  
pF  
I/O  
PD  
Notes 1, 2  
26  
pF  
NOTES:  
1. C is used to determine the dynamic power dissipation (P in µW)  
PD  
D
2
2
P
= C   V  
x f )Σ (C   V  
  f ) where:  
D
PD  
CC  
i
L
CC o  
f = input frequency in MHz; C = output load capacitance in pF;  
i
L
f = output frequency in MHz; V = supply voltage in V;  
o
CC  
2
Σ (C   V  
  f ) = sum of the outputs.  
L
CC  
o
2. The condition is V = GND to V  
I
CC.  
ORDERING AND PACKAGE INFORMATION  
OUTSIDE NORTH  
AMERICA  
PACKAGES  
TEMPERATURE RANGE  
NORTH AMERICA  
PKG. DWG. #  
24-Pin Plastic SO  
–40°C to +85°C  
74LVC646A D  
74LVC646A D  
SOT137-1  
24-Pin Plastic SSOP Type II  
24-Pin Plastic TSSOP Type I  
–40°C to +85°C  
–40°C to +85°C  
74LVC646A DB  
74LVC646A PW  
74LVC646A DB  
SOT340-1  
SOT355-1  
7LVC646APW DH  
2
1998 Jul 29  
853-2105 19803  
Philips Semiconductors  
Product specification  
Octal bus transceiver/register (3-State)  
74LVC646A  
PIN CONFIGURATION  
PIN DESCRIPTION  
PIN NUMBER SYMBOL  
FUNCTION  
‘A’ to ‘B’ clock input  
(LOW-to-HIGH, edge-triggered)  
1
CP  
AB  
CP  
S
1
2
V
24  
AB  
AB  
CC  
2
3
S
Select ‘A’ to ‘B’ source input  
Direction control input  
AB  
23 CP  
BA  
DIR  
DIR  
A
3
22  
S
BA  
4, 5, 6, 7, 8,  
9, 10, 11  
A to A  
‘A’ data inputs/outputs  
Ground (0V)  
0
7
7
4
21 OE  
0
12  
GND  
A
A
A
A
A
A
A
5
20  
19  
B
B
B
B
B
B
B
B
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
20, 19, 18, 17,  
16, 15, 14, 13  
6
B to B  
0
‘B’ data inputs/outputs  
7
18  
17  
16  
15  
14  
13  
21  
22  
OE  
Output enable input (active LOW)  
Select ‘B’ to ‘A’ source input  
8
S
BA  
9
‘B’ to ‘A’ clock input  
(LOW-to-HIGH, edge-triggered)  
23  
24  
CP  
V
BA  
10  
11  
12  
Positive supply voltage  
CC  
GND  
SV00766  
FUNCTION TABLE  
INPUTS  
CP  
DATA I/O *  
FUNCTION  
OE  
DIR  
CP  
S
AB  
S
BA  
A to A  
B to B  
AB  
BA  
0
7
0
7
X
X
X
X
X
X
X
X
X
X
input  
un *  
un *  
input  
store A, B unspecified *  
store B, A unspecified *  
H
H
X
X
X
X
X
X
store A and B data,  
isolation hold storage  
input  
output  
input  
input  
input  
H or L  
H or L  
L
L
L
L
X
X
X
X
X
L
H
real-time B data to A bus  
stored B data to A bus  
H or L  
L
L
H
H
X
X
X
L
H
X
X
real-time A data to B bus  
stored A data to B bus  
output  
H or L  
*
The data output functions may be enabled or disabled by  
various signals at the OE and DIR inputs. Data input  
functions are always enabled, i.e., data at the bus inputs will  
be stored on every LOW-to-HIGH transition on the clock  
inputs.  
un  
H
L
= unspecified  
= HIGH voltage level  
= LOW voltage level  
= Don’t care  
X
= LOW-to-HIGH level transition  
3
1998 Jul 29  
Philips Semiconductors  
Product specification  
Octal bus transceiver/register (3-State)  
74LVC646A  
LOGIC SYMBOL  
FUNCTIONAL DIAGRAM  
21  
4
A
A
A
A
A
A
A
A
B
B
B
B
B
B
B
B
20  
19  
18  
17  
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
OE  
5
6
CP  
S
CP  
S
23  
1
2
AB  
BA  
22  
20  
19  
AB  
BA  
B
7
A
A
A
A
A
A
A
A
4
0
1
2
3
4
5
6
7
0
16  
15  
14  
13  
8
B
B
B
B
B
B
B
5
1
2
3
4
5
6
7
9
6
18  
17  
16  
15  
14  
13  
10  
11  
7
8
9
21 OE  
10  
11  
3
2
DIR  
S
AB  
DIR  
22  
1
S
BA  
3
CP  
AB  
BA  
23  
CP  
SV00765  
SV00763  
LOGIC SYMBOL (IEEE/IEC)  
23  
C4  
1
C5  
21  
G3  
22  
G6  
2
G7  
3
3EN2  
3EN1  
1  
1
6
6
4D  
4
1
20  
19  
1
5D  
7
7
2
1
5
6
18  
17  
16  
15  
14  
13  
7
8
9
10  
11  
SV00764  
4
1998 Jul 29  
Philips Semiconductors  
Product specification  
Octal bus transceiver/register (3-State)  
74LVC646A  
LOGIC DIAGRAM  
OE  
DIR  
S
BA  
CP  
BA  
S
AB  
CP  
AB  
V
CC  
S
D
Y
1
MUX  
D
A
n
D
Q
2
FF  
n
CP  
V
CC  
S
D
Y
1
MUX  
B
n
D
Q
n
D
2
FF  
CP  
8 identical channels  
SV00762  
5
1998 Jul 29  
Philips Semiconductors  
Product specification  
Octal bus transceiver/register (3-State)  
74LVC646A  
RECOMMENDED OPERATING CONDITIONS  
LIMITS  
SYMBOL  
PARAMETER  
CONDITIONS  
UNIT  
MAX  
MIN  
2.7  
1.2  
0
DC supply voltage (for max. speed performance)  
DC supply voltage (for low-voltage applications)  
DC input voltage range  
3.6  
V
CC  
V
3.6  
V
I
5.5  
V
V
DC output voltage range; output HIGH or LOW state  
DC output voltage range; output 3-State  
Operating free-air temperature range  
0
V
CC  
V
O
0
5.5  
T
amb  
–40  
+85  
°C  
V
CC  
V
CC  
= 1.2 to 2.7V  
= 2.7 to 3.6V  
0
0
20  
10  
t , t  
r
Input rise and fall times  
ns/V  
f
1
ABSOLUTE MAXIMUM RATINGS  
In accordance with the Absolute Maximum Rating System (IEC 134)  
Voltages are referenced to GND (ground = 0V)  
SYMBOL  
PARAMETER  
DC supply voltage  
CONDITIONS  
RATING  
–0.5 to +6.5  
–50  
UNIT  
V
CC  
I
IK  
V
mA  
V
DC input diode current  
V t0  
I
V
I
DC input voltage  
Note 2  
–0.5 to +6.5  
"50  
I
DC output diode current  
V
O
uV or V t 0  
mA  
OK  
CC  
O
DC output voltage; output HIGH or LOW  
DC output voltage; output 3-State  
DC output diode current  
Note 2  
Note 2  
–0.5 to V +0.5  
CC  
V
V
O
–0.5 to 6.5  
"50  
I
O
V
O
= 0 to V  
CC  
mA  
mA  
°C  
I
, I  
DC V or GND current  
"100  
GND CC  
CC  
T
stg  
Storage temperature range  
–65 to +150  
Power dissipation per package  
– plastic mini-pack (SO)  
– plastic shrink mini-pack (SSOP and  
TSSOP)  
above +70°C derate linearly with 8 mW/K  
above +60°C derate linearly with 5.5 mW/K  
500  
500  
P
TOT  
mW  
NOTES:  
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the  
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to  
absolute-maximum-rated conditions for extended periods may affect device reliability.  
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
6
1998 Jul 29  
Philips Semiconductors  
Product specification  
Octal bus transceiver/register (3-State)  
74LVC646A  
DC ELECTRICAL CHARACTERISTICS  
Over recommended operating conditions voltages are referenced to GND (ground = 0V)  
LIMITS  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
Temp = -40°C to +85°C  
UNIT  
1
MIN  
TYP  
MAX  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 1.2V  
V
CC  
V
HIGH level Input voltage  
LOW level Input voltage  
V
V
IH  
= 2.7 to 3.6V  
= 1.2V  
2.0  
GND  
0.8  
V
IL  
= 2.7 to 3.6V  
= 2.7V; V = V or V ; I = –12mA  
V
V
V
V
*0.5  
I
IH  
IL  
O
CC  
CC  
CC  
CC  
= 3.0V; V = V or V ; I = –100µA  
*0.2  
*0.6  
*0.8  
V
CC  
I
IH  
IL  
O
V
OH  
HIGH level output voltage  
LOW level output voltage  
V
= 3.0V; V = V or V I  
= –18mA  
I = –24mA  
I
IH  
IL; O  
= 3.0V; V = V or V  
IL; O  
I
IH  
= 2.7V; V = V or V ; I = 12mA  
0.40  
0.20  
0.55  
"5  
I
IH  
IL  
O
= 3.0V; V = V or V ; I = 100µA  
GND  
V
OL  
V
I
IH  
IL  
O
= 3.0V; V = V or V  
I = 24mA  
IL; O  
I
IH  
I
Input leakage current  
= 3.6V; V = 5.5V or GND NotforI/Opins  
"0.1  
"0.1  
0.1  
µA  
µA  
µA  
µA  
µA  
I
I
I
/I  
Input current for common I/O pins  
3-State output OFF-state current  
Power off leakage current  
Quiescent supply current  
= 3.6V; V = V or GND  
"15  
"10  
"10  
10  
IHZ ILZ  
I
CC  
I
= 3.6V; V = V or V ; V = 5.5V or GND  
I IH IL O  
OZ  
I
= 0.0V; V or V = 5.5V  
0.1  
OFF  
I
O
I
= 3.6V; V = V or GND; I = 0  
0.1  
CC  
I
CC  
O
Additional quiescent supply current per  
input pin  
I  
CC  
V
CC  
= 2.7V to 3.6V; V = V –0.6V; I = 0  
5
500  
µA  
I
CC  
O
NOTES:  
1. All typical values are at V = 3.3V and T  
= 25°C.  
amb  
CC  
7
1998 Jul 29  
Philips Semiconductors  
Product specification  
Octal bus transceiver/register (3-State)  
74LVC646A  
AC CHARACTERISTICS  
GND = 0 V; t = t v 2.5 ns; C = 50 pF  
r
f
L
LIMITS  
V
1.2V  
=
CC  
SYMBOL  
PARAMETER  
WAVEFORM  
V
CC  
= 3.3V ±0.3V  
V
CC  
= 2.7V  
UNIT  
1
MIN  
TYP  
MAX  
MIN  
MAX  
TYP  
Propagation delay  
An, Bn to Bn, An  
t
/t  
Figures 1, 6  
Figures 2, 6  
Figures 3, 6  
Figures 4, 6  
Figures 4, 6  
Figures 5, 6  
Figures 5, 6  
1.5  
3.9  
6.8  
7.6  
8.5  
7.8  
6.1  
7.9  
6.0  
1.5  
7.8  
8.6  
9.5  
8.8  
7.1  
8.9  
7.0  
15  
19  
19  
20  
10  
20  
12  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
PHL PLH  
Propagation delay  
t
t
t
t
t
t
t
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
4.6  
4.9  
4.5  
3.9  
4.6  
3.5  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
PHL/ PLH  
CP , CP to B , A  
n
AB  
BA  
n
Propagation delay  
, S to B , A  
n
t
PHL/ PLH  
S
AB  
BA  
n
3-State output enable time  
OEn to An, Bn  
/t  
PZH PZL  
3-State output disable time  
OEn to An, Bn  
/t  
PHZ PLZ  
3-State output enable time  
DIR to An, Bn  
/t  
PZH PZL  
3-State output disable time  
DIR to An, Bn  
/t  
PHZ PLZ  
Clock pulse width  
HIGH or LOW  
t
Figure 1, 3  
Figure 2  
3.3  
1.6  
1.9  
3.3  
1.6  
ns  
ns  
W
CP or CP  
AB  
BA  
Set-up time  
t
su  
0.35  
An, Bn to CP , CP  
AB  
BA  
Hold time  
An, Bn to CP , CP  
t
Figure 2  
Figure 2  
1.0  
–0.3  
250  
1.0  
ns  
ns  
h
AB  
BA  
f
Maximum clock pulse frequency  
150  
125  
max  
NOTE:  
1. These typical values are at V = 3.3V and T  
= 25°C.  
amb  
CC  
8
1998 Jul 29  
Philips Semiconductors  
Product specification  
Octal bus transceiver/register (3-State)  
74LVC646A  
AC WAVEFORMS  
V
V
V
= 1.5V at V w 2.7V  
M
CC  
= 0.5V * V at V t 2.7V  
M
CC  
CC  
and V are the typical output voltage drop that occur with the  
OL  
OH  
output load.  
V
X
V
X
V
Y
V
Y
= V + 0.3V at V w 2.7V  
OL CC  
= V + 0.1V at V < 2.7V  
OL  
CC  
CC  
= V – 0.3V at V w 2.7V  
OH  
CC  
V
I
= V – 0.1V at V < 2.7V  
OH  
CC  
CC  
S
, S  
AB  
BA  
V
M
INPUT  
GND  
t
t
PHL  
PLH  
V
OH  
B
, A  
V
n
n
I
V
M
OUTPUT  
A
n
, B  
n
INPUT  
V
M
V
OL  
GND  
t
t
PHL  
PLH  
V
OH  
B
, A  
n
n
V
M
OUTPUT  
SV00759  
V
OL  
Figure 3. Input S , S to output B , A propagation delay  
AB  
BA  
n
n
times.  
SV00761  
V
I
Figure 1. Input An, Bn to output Bn, An propagation delays.  
OE INPUT  
GND  
V
M
t
t
PZL  
PLZ  
V
CC  
OUTPUT  
LOW–to–OFF  
OFF–to–LOW  
V
M
V
I
V
X
V
V
OL  
A
, B  
n
INPUT  
n
V
t
M
t
PZH  
t
PHZ  
GND  
V
OH  
t
t
h
h
Y
t
OUTPUT  
HIGH–to–OFF  
OFF–to–HIGH  
su  
su  
V
M
V
OH  
CP , CP  
GND  
AB  
BA  
V
outputs  
disabled  
outputs  
enabled  
outputs  
enabled  
M
OUTPUT  
V
OL  
t
W
1/f  
max  
V
OH  
B
, A  
n
n
SV00758  
OUTPUT  
Figure 4. Input OE to output A , B 3-State enable and disable  
n
n
V
OL  
t
t
PLH  
times.  
PHL  
SV00760  
Figure 2. A , B to CP , CP set-up and hold times, clock  
n
n
AB  
BA  
CP , CP pulse width, maximum clock pulse frequency and  
AB  
BA  
the CP , CP to output B , A propagation delays.  
AB  
BA  
n
n
9
1998 Jul 29  
Philips Semiconductors  
Product specification  
Octal bus transceiver/register (3-State)  
74LVC646A  
AC WAVEFORMS (Continued)  
TEST CIRCUIT  
V
V
V
= 1.5V at V w 2.7V  
M
CC  
S
1
2 x V  
Open  
= 0.5V * V at V t 2.7V  
CC  
V
M
CC  
CC  
CC  
and V are the typical output voltage drop that occur with the  
OL  
OH  
GND  
output load.  
500  
500Ω  
V
V
O
I
V
X
V
X
V
Y
V
Y
= V + 0.3V at V w 2.7V  
OL CC  
PULSE  
GENERATOR  
D.U.T.  
= V + 0.1V at V < 2.7V  
OL  
CC  
CC  
= V – 0.3V at V w 2.7V  
OH  
CC  
50pF  
C
L
R
T
= V – 0.1V at V < 2.7V  
OH  
CC  
CC  
Test  
/t  
S
1
V
I
V
V
CC  
I
t
Open  
PLH PHL  
DIR INPUT  
GND  
V
M
t 2.7V  
2.7V – 3.6V  
V
t
/t  
2 x V  
CC  
CC  
PLZ PZL  
2.7V  
t
/t  
GND  
PHZ PZH  
t
t
PZH  
PHZ  
SY00003  
V
OH  
V
Y
V
Figure 6. Load circuitry for switching times.  
A
A
OUTPUT  
n
M
GND  
t
PZL  
V
CC  
t
PLZ  
V
OUTPUT  
M
n
V
X
V
V
OL  
t
PHZ  
PHZ  
V
OH  
Y
t
PZH  
V
V
B
OUTPUT  
M
M
n
V
OL  
t
t
PZL  
V
OH  
B
OUTPUT  
n
V
X
V
OL  
SV00757  
Figure 5. Input DIR to output A , B 3-State enable and disable  
n
n
times.  
10  
1998 Jul 29  
Philips Semiconductors  
Product specification  
Octal bus transceiver/register (3-State)  
74LVC646A  
APPLICATION INFORMATION  
Real-time transfer; bus B to bus A  
Real-time transfer; bus A to bus B  
SV00777  
SV00778  
(1)  
OE  
L
(14)  
DIR  
L
(28)  
CP  
(16)  
CP  
(27)  
(15)  
(1)  
OE  
L
(14)  
DIR  
H
(28)  
CP  
(16)  
CP  
(27)  
(15)  
S
AB  
S
BA  
S
AB  
S
BA  
AB  
BA  
AB  
BA  
X
X
X
L
X
X
L
X
Storage from A, B or A and B  
Transfer storage data to A or B  
SV00779  
SV00780  
(1)  
OE  
X
(14)  
DIR  
X
(28)  
CP  
(16)  
CP  
(27)  
(15)  
(1)  
OE  
L
(14)  
DIR  
L
(28)  
CP  
(16)  
CP  
(27)  
(15)  
S
AB  
S
BA  
AB  
BA  
S
AB  
S
BA  
AB  
BA  
X
X
X
X
X
X
L
X
H or L  
X
X
H
H
X
X
X
L
H
H or L  
H
X
X
11  
1998 Jul 29  
Philips Semiconductors  
Product specification  
Octal bus transceiver/register (3-State)  
74LVC646A  
SO20: plastic small outline package; 20 leads; body width 7.5 mm  
SOT163-1  
12  
1998 Jul 29  
Philips Semiconductors  
Product specification  
Octal bus transceiver/register (3-State)  
74LVC646A  
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm  
SOT339-1  
13  
1998 Jul 29  
Philips Semiconductors  
Product specification  
Octal bus transceiver/register (3-State)  
74LVC646A  
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm  
SOT360-1  
14  
1998 Jul 29  
Philips Semiconductors  
Product specification  
Octal bus transceiver/register (3-State)  
74LVC646A  
NOTES  
15  
1998 Jul 29  
Philips Semiconductors  
Product specification  
Octal bus transceiver/register (3-State)  
74LVC646A  
Data sheet status  
[1]  
Data sheet  
status  
Product  
status  
Definition  
Objective  
specification  
Development  
This data sheet contains the design target or goal specifications for product development.  
Specification may change in any manner without notice.  
Preliminary  
specification  
Qualification  
This data sheet contains preliminary data, and supplementary data will be published at a later date.  
Philips Semiconductors reserves the right to make chages at any time without notice in order to  
improve design and supply the best possible product.  
Product  
specification  
Production  
This data sheet contains final specifications. Philips Semiconductors reserves the right to make  
changes at any time without notice in order to improve design and supply the best possible product.  
[1] Please consult the most recently issued datasheet before initiating or completing a design.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or  
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended  
periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips  
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or  
modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications  
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.  
RighttomakechangesPhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard  
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 1998  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
print code  
Date of release: 08-98  
9397-750-04516  
Document order number:  
Philips  
Semiconductors  

相关型号:

7LVC823APWDH

IC LVC/LCX/Z SERIES, 9-BIT DRIVER, TRUE OUTPUT, PDSO24, Bus Driver/Transceiver
NXP

7LVC823APWDH-T

IC LVC/LCX/Z SERIES, 9-BIT DRIVER, TRUE OUTPUT, PDSO24, Bus Driver/Transceiver
NXP

7LVC827APWDH

10-bit buffer/line driver with 5-volt tolerant inputs/outputs 3-State
NXP

7LVC827APWDH-T

IC LVC/LCX/Z SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24, Bus Driver/Transceiver
NXP

7LVC841APWDH

10-bit transparent latch with 5-volt tolerant inputs/outputs 3-State
NXP

7LVC841APWDH-T

IC LVC/LCX/Z SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24, Bus Driver/Transceiver
NXP

7LVT2241PWDH

3.3V Octal buffer/line driver with 30ohm series termination resistors; 3-State
NXP

7LVT2244PWDH

3.3V Octal buffer/line driver with 30ohm series termination resistors 3-State
NXP

7LVT2245PWDH

3.3V Octal transceiver with 30ohm termination resistors 3-State
NXP

7LVT244APWDH

3.3V Octal buffer/line driver 3-State
NXP

7LVT244BPWDH

3.3V Octal buffer/line driver 3-State
NXP

7LVT2952PWDH

3.3V LVT octal registered transceiver 3-State
NXP