74LVT646DB [NXP]
3.3V Octal bus transceiver/register 3-State; 3.3V八路总线收发器/寄存器三态
| 型号： | 74LVT646DB |
| 厂家： | 
NXP |
| 描述： | 3.3V Octal bus transceiver/register 3-State |
| 文件： | 总14页 (文件大小：113K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74LVT646
3.3V Octal bus transceiver/register
(3-State)
Product specification
1998 Feb 19
Supersedes data of 1994 May 20
IC23 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
3.3V Octal bus transceiver/register (3-State)
74LVT646
FEATURES
DESCRIPTION
The LVT646 is a high-performance BiCMOS product designed for
• Combines 74LVT245 and 74LVT574 type functions in one device
• Independent registers for A and B buses
• Multiplexed real–time and stored data
• Output capability: +64mA/–32mA
• TTL input and output switching levels
• Input and output interface capability to systems at 5V supply
V
CC
operation at 3.3V.
This device consists of bus transceiver circuits with 3-State outputs,
D-type flip-flops, and control circuitry arranged for multiplexed
transmission of data directly from the input bus or the internal
registers.
Data on the A or B bus will be clocked into the registers as the
appropriate clock pin goes High.
Output Enable (OE) and DIR pins are provided to control the
transceiver function. In the transceiver mode, data present at the
high impedance port may be stored in either the A or B register or
both.
• Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
• Live insertion/extraction permitted
• No bus current loading when output is tied to 5V bus
• Latch-up protection exceeds 500mA per JEDEC Std 17
• Power-up 3-State
The Select (SAB, SBA) pins determine whether data is stored or
transferred through the device in real–time. The DIR determines
which bus will receive data when the OE is active (Low).
In the isolation mode (OE = High), data from Bus A may be stored in
the B register and/or data from Bus B may be stored in the A
register.
When an output function is disabled, the input function is still
enabled and may be used to store and transmit data. Only one of
the two buses, A or B may be driven at a time. The examples on the
next page demonstrate the four fundamental bus management
functions that can be performed with the 74LVT646.
• Power-up reset
• ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
QUICK REFERENCE DATA
CONDITIONS
= 25°C; GND = 0V
SYMBOL
PARAMETER
TYPICAL
UNIT
ns
T
amb
t
t
Propagation delay
An to Bn or Bn to An
2.8
2.7
PLH
PHL
C = 50pF; V = 3.3V
L
CC
Input capacitance
CP, S, OE, DIR
C
V
I/O
= 0V or 3.0V
4
pF
IN
C
I/O capacitance
Outputs disabled; V = 0V or 3.0V
10
pF
I/O
I/O
I
Total supply current
Outputs disabled; V = 3.6V
0.13
mA
CCZ
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
74LVT646 D
DWG NUMBER
SOT163-1
24-Pin Plastic SOL
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
74LVT646 D
74LVT646 DB
74LVT646 PW
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
74LVT646 DB
SOT399-1
74LVT646PW DH
SOT360-1
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
CPAB /
CPBA
A to B clock input / B to A
clock input
1, 23
1
2
24
23
22
21
20
19
18
17
16
15
14
13
V
CPAB
SAB
DIR
A0
CC
CPBA
SBA
OE
B0
A to B select input / B to
A select input
2, 22
3
SAB / SBA
DIR
3
4
Direction control input
5
A1
4, 5, 6, 7, 8, 9, 10,
11
Data inputs/outputs (A
side)
A0 – A7
6
A2
B1
20, 19, 18, 17, 16,
15, 14, 13
Data inputs/outputs (B
side)
7
A3
B2
B0 – B7
8
A4
B3
Output enable input
(active-low)
9
A5
B4
21
OE
10
11
12
A6
B5
12
24
GND
Ground (0V)
A7
B6
V
CC
Positive supply voltage
GND
B7
SV00045
2
1998 Feb 19
853-1747 18987
Philips Semiconductors
Product specification
3.3V Octal bus transceiver/register (3-State)
74LVT646
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
G3
21
3EN1 [BA]
3EN2 [AB]
3
23
22
1
C4
G5
4
5
6
7
8
9
10 11
C6
G7
2
A0 A1 A2 A3 A4 A5 A6 A7
20
≥1
1
5
5
4D
1
4
1
2
CPAB
SAB
6D
7
7
≥1
3
23
22
21
DIR
2
CPBA
SBA
OE
1
19
18
17
16
15
14
5
6
7
B0 B1 B2 B3 B4 B5 B6 B7
8
9
20 19 18 17 16 15 14 13
SV00046
10
11
13
SV00047
LOGIC DIAGRAM
21
3
OE
DIR
23
22
1
CPBA
SBA
CPAB
2
SAB
1of 8 Channels
1D
C1
Q
4
20
B0
A0
1D
C1
Q
5
6
19
18
B1
B2
B3
B4
B5
B6
B7
A1
A2
17
16
7
8
A3
A4
A5
A6
A7
DETAIL A X 7
9
15
14
10
11
13
SV00048
3
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal bus transceiver/register (3-State)
74LVT646
REAL TIME BUS TRANSFER
BUS B TO BUS A
REAL TIME BUS TRANSFER
BUS A TO BUS B
STORAGE FROM
A, B, OR A AND B
TRANSFER STORED DATA
TO A OR B
A
B
A
B
A
B
A
B
OE DIR CPAB CPBA SAB SBA
OE DIR CPAB CPBA SAB SBA
OE DIR CPAB CPBA SAB SBA
OE DIR CPAB CPBA SAB SBA
L
L
X
X
X
L
L
H
X
X
L
X
L
L
H
L
↑
X
↑
X
↑
X
X
X
X
X
X
L
L
L
X
H or L
X
X
H
H
X
H
H or L
H
X
↑
SV00049
FUNCTION TABLE
INPUTS
DATA I/O
OPERATING MODE
OE
DIR
CPAB
CPBA
SAB
SBA
An
Bn
Unspecified
output*
X
X
↑
X
X
X
Input
Store A, B unspecified
Store B, A unspecified
Unspecified
output*
X
X
X
↑
X
X
Input
Input
H
H
X
X
↑
↑
X
X
X
X
Store A and B data
Isolation, hold storage
Input
Output
Input
H or L
H or L
L
L
L
L
X
X
X
X
X
L
H
Real time B data to A bus
Stored B data to A bus
Input
H or L
L
L
H
H
X
X
X
L
H
X
X
Real time A data to B bus
Stored A data to B bus
Output
H or L
H
L
X
↑
=
=
=
=
High voltage level
Low voltage level
Don’t care
Low-to-High clock transition
*
The data output function may be enabled or disabled by various signals at the OE input. Data input functions are always enabled, i.e.,
data at the bus pins will be stored on every Low-to-High transition of the clock.
4
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal bus transceiver/register (3-State)
74LVT646
1, 2
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
–0.5 to +4.6
–50
UNIT
V
V
CC
I
IK
DC input diode current
V < 0
I
mA
V
3
V
I
DC input voltage
–0.5 to +7.0
–50
I
DC output diode current
V
O
< 0
mA
V
OK
3
V
OUT
DC output voltage
Output in Off or High state
Output in Low state
–0.5 to +7.0
128
I
DC output current
mA
OUT
Output in High state
–64
T
stg
Storage temperature range
–65 to 150
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
2.7
0
MAX
3.6
V
CC
DC supply voltage
Input voltage
V
V
V
I
5.5
V
High-level input voltage
Input voltage
2.0
V
IH
V
0.8
–32
32
V
IL
I
High-level output current
Low-level output current
mA
OH
I
mA
OL
Low-level output current; current duty cycle ≤ 50%, f ≥ 1kHz
Input transition rise or fall rate; Outputs enabled
Operating free-air temperature range
64
∆t/∆v
10
ns/V
T
amb
–40
+85
°C
5
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal bus transceiver/register (3-State)
74LVT646
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40°C to +85°C
UNIT
TYP
MIN
MAX
NO TAG
V
Input clamp voltage
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2.7V; I = –18mA
–0.9
–1.2
V
V
IK
IK
= 2.7 to 3.6V; I = –100µA
V
-0.2
V
-0.1
OH
CC
CC
V
OH
High-level output voltage
= 2.7V; I = –8mA
2.4
2.5
OH
= 3.0V; I = –32mA
2.0
2.2
0.1
OH
= 2.7V; I = 100µA
0.2
0.5
OL
= 2.7V; I = 24mA
0.3
OL
V
OL
Low–level output voltage
= 3.0V; I = 16mA
0.25
0.3
0.4
V
OL
= 3.0V; I = 32mA
0.5
OL
= 3.0V; I = 64mA
0.4
0.55
0.55
OL
5
V
RST
Power-up output low voltage
= 3.6V; I = 1mA; V = GND or V
CC
0.13
V
O
I
V
V
V
= 3.6V; V = V or GND
±0.1
1
±1
10
20
CC
CC
CC
I
CC
Control pins
I/O Data pins
= 0 or 3.6V; V = 5.5V
I
I
Input leakage current
= 3.6V; V = 5.5V
1
µA
I
I
4
V
CC
V
CC
V
CC
= 3.6V; V = V
CC
0.1
–1
1
1
-5
I
= 3.6V; V = 0
I
I
Output off current
= 0V; V or V = 0 to 4.5V
±100
µA
µA
OFF
I
O
V
CC
V
CC
V
CC
= 3V; V = 0.8V
75
150
I
6
= 3V; V = 2.0V
–75
–150
I
Bus Hold current A inputs
I
HOLD
= 0V to 3.6V; V = 3.6V
±500
CC
Current into an output in the
I
V
= 5.5V; V = 3.0V
60
15
125
µA
µA
EX
O
CC
High state when V > V
O
CC
Power up/down 3-State output
V
CC
≤ 1.2V; V = 0.5V to V ; V = GND or V
;
CC
O
CC
I
I
±100
PU/PD
3
current
OE/OE =Don’t care
I
V
V
V
V
= 3.6V; Outputs High, V = GND or V I 0
CC, O =
0.13
3
0.19
12
CCH
CC
CC
CC
CC
I
I
Quiescent supply current
= 3.6V; Outputs Low, V = GND or V I 0
CC, O =
mA
mA
CCL
I
I
= 3.6V; Outputs Disabled; V = GND or V
I 0
CC, O =
0.13
0.19
CCZ
I
Additional supply current per
= 3V to 3.6V; One input at V -0.6V,
CC
∆I
0.1
0.2
CC
2
input pin
Other inputs at V or GND
CC
NOTES:
1. All typical values are at and T
= 25°C.
amb
2. This is the increase in supply current for each input at the specified voltage level other than V or GND
CC
3. This parameter is valid for any V between 0V and 1.2V with a transition time of up to 10msec. From V = 1.2V to V = 3.3V ± 0.3V a
CC
CC
CC
transition time of 100µsec is permitted. This parameter is valid for T
= 25°C only.
amb
4. Unused pins at V or GND.
CC
5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
6. This is the bus hold overdrive current required to force the input to the opposite logic state.
6
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal bus transceiver/register (3-State)
74LVT646
AC CHARACTERISTICS
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω; T = –40°C to +85°C.
amb
R
F
L
L
LIMITS
= 3.3V ± 0.3V
SYMBOL
PARAMETER
WAVEFORM
V
CC
V
CC
= 2.7V
UNIT
1
MIN
TYP
MAX
MAX
f
Maximum clock frequency
1
1
150
180
MHz
ns
MAX
t
t
Propagation delay
CPAB to Bn or CPBA to An
1.8
2.1
3.8
3.8
5.7
5.7
6.7
6.4
PLH
PHL
t
t
Propagation delay
An to Bn or Bn to An
1.3
1.0
2.8
2.7
4.7
4.6
5.4
5.3
PLH
PHL
2
ns
ns
ns
ns
ns
ns
t
t
Propagation delay
SAB to Bn or SBA to An
2
3
1.4
1.4
3.7
3.8
6.2
6.2
7.2
6.8
PLH
PHL
t
t
t
t
Output enable time
OE to An or Bn
5
6
1.0
1.0
4.0
4.1
5.8
6.0
7.2
7.3
PZH
t
PZL
Output disable time
OE to An or Bn
5
6
2.3
2.2
4.3
3.8
6.5
5.8
6.9
5.9
PHZ
t
PLZ
Output enable time
DIR to An or Bn
5
6
1.0
1.2
3.4
3.4
6.5
6.3
7.5
7.1
PZH
t
PZL
Output disable time
DIR to An or Bn
5
6
1.7
1.5
4.1
3.5
7.2
5.8
8.1
6.3
PHZ
t
PLZ
NOTE:
1. All typical values are at V = 3.3V and T
= 25°C.
CC
amb
AC SETUP REQUIREMENTS
GND = 0V, t =2.5ns, t = 2.5ns, C = 50pF, R = 500Ω; T = –40°C to +85°C
R
F
L
L
amb
LIMITS
SYMBOL
PARAMETER
WAVEFORM
V
CC
= 3.3V± 0.3V
V
CC
= 2.7V
UNIT
Min
Typ
Min
1
t (H)
t (L)
s
Setup time
1.5
2.0
1.0
1.0
1.6
2.4
s
4
4
1
ns
ns
ns
An to CPAB, Bn to CPBA
1
t (H)
Hold time
0.0
0.0
–1.0
–1.0
0.0
0.0
h
t (L)
h
An to CPAB, Bn to CPBA
t (H)
Pulse width, High or Low
CPAB or CPBA
3.3
3.3
1.0
2.0
3.3
3.3
w
t (L)
w
NOTE:
1. This data sheet limit may vary among suppliers.
7
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal bus transceiver/register (3-State)
74LVT646
AC WAVEFORMS
V
M
= 1.5V, V = GND to 2.7V
IN
2.7V
1/f
MAX
1.5V
t
An
or
Bn
2.7V
0V
1.5V
1.5V
1.5V
1.5V
1.5V
CPBA or
CPAB
1.5V
1.5V
0V
t (H)
t (L)
s
t
(H)
t (L)
h
s
h
t
(H)
(L)
w
w
2.7V
CPBA
or
CPAB
t
t
PLH
PHL
V
OH
1.5V
1.5V
1.5V
An or Bn
0V
V
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
OL
SV00050
SV00123
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
Waveform 4. Data Setup and Hold Times
2.7V
0V
OE, DIR
DIR
2.7V
1.5V
t
1.5V
SBA or SAB
V
V
M
M
t
0V
t
PHZ
PZH
V
t
OH
PLH
PHL
V
OH
V
–0.3V
OH
An or Bn
1.5V
An or Bn
V
V
M
M
0V
V
OL
SV00124
SV00121
Waveform 5. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
Waveform 2. Propagation Delay, SAB to Bn or SBA to An, An
to Bn or Bn to An
2.7V
0V
OE, DIR
DIR
2.7V
1.5V
t
1.5V
SBA or SAB
An or Bn
1.5V
t
1.5V
0V
t
PZL
PLZ
t
PHL
PLH
3V
+0.3V
V
OH
1.5V
An or Bn
V
OL
1.5V
1.5V
V
OL
V
OL
SV00125
SV00122
Waveform 6. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
Waveform 3. Propagation Delay, SBA to An or SAB to Bn
8
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal bus transceiver/register (3-State)
74LVT646
TEST CIRCUIT AND WAVEFORM
6.0V
V
CC
t
W
AMP (V)
90%
Open
GND
90%
NEGATIVE
PULSE
V
V
M
V
V
OUT
M
10%
R
R
IN
L
10%
90%
PULSE
GENERATOR
D.U.T.
0V
t
t
(t
(t
)
t
t
(t
)
R
THL
F
TLH
R
T
C
L
L
)
(t
)
F
TLH
R
THL
AMP (V)
90%
M
Test Circuit for 3-State Outputs
POSITIVE
PULSE
V
V
M
10%
10%
t
W
0V
SWITCH POSITION
V
= 1.5V
M
TEST
SWITCH
Open
6V
Input Pulse Definition
t
/t
PLH PHL
t
/t
PLZ PZL
t
/t
GND
PHZ PZH
INPUT PULSE REQUIREMENTS
DEFINITIONS
FAMILY
R = Load resistor; see AC CHARACTERISTICS for value.
L
Amplitude
Rep. Rate
t
t
R
t
F
W
C = Load capacitance includes jig and probe capacitance;
L
see AC CHARACTERISTICS for value.
74LVT
2.7V
v10MHz
500ns v2.5ns v2.5ns
R = Termination resistance should be equal to Z
T
of
OUT
pulse generators.
SV00092
9
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal bus transceiver/register (3-State)
74LVT646
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
10
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal bus transceiver/register (3-State)
74LVT646
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm
SOT340-1
11
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal bus transceiver/register (3-State)
74LVT646
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
SOT355-1
12
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal bus transceiver/register (3-State)
74LVT646
NOTES
13
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal bus transceiver/register (3-State)
74LVT646
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 05-96
9397-750-03544
Document order number:
Philips
Semiconductors
相关型号：
74LVT646DB/T3
IC LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, SOP-24, Bus Driver/Transceiver
NXP
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