74LVCV2G66GT [NXP]
POWER SUPPLY SUPPORT CKT;
| 型号： | 74LVCV2G66GT |
| 厂家： | 
NXP |
| 描述： | POWER SUPPLY SUPPORT CKT 光电二极管 |
| 文件： | 总25页 (文件大小：263K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74LVCV2G66
Overvoltage tolerant bilateral switch
Rev. 6 — 22 July 2015
Product data sheet
1. General description
The 74LVCV2G66 is a low-power, low-voltage, high-speed Si-gate CMOS device.
The 74LVCV2G66 provides two single pole single throw analog or digital switches. Each
switch includes an overvoltage tolerant input/output terminal (pin nZ), an output/input
terminal (pin nY) and low-power active HIGH enable input (pin nE).
The overvoltage tolerant switch terminals allow the switching of signals in excess of VCC
The low-power enable input eliminates the necessity of using current limiting resistors in
portable applications when using control logic signals much lower than VCC. These inputs
are also overvoltage tolerant.
.
2. Features and benefits
Wide supply voltage range from 2.3 V to 5.5 V
Ultra low-power operation
Very low ON resistance:
8.0 (typical) at VCC = 2.7 V
7.5 (typical) at VCC = 3.3 V
7.3 (typical) at VCC = 5.0 V.
5 V tolerant input for interfacing with 5 V logic
High noise immunity
Switch handling capability of 32 mA
CMOS low-power consumption
Latch-up performance exceeds 250 mA
Incorporates overvoltage tolerant analog switch technology
Switch accepts voltages up to 5.5 V independent of VCC
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
Description
Version
74LVCV2G66DP 40 C to +125 C
74LVCV2G66DC 40 C to +125 C
74LVCV2G66GT 40 C to +125 C
74LVCV2G66GD 40 C to +125 C
74LVCV2G66GM 40 C to +125 C
TSSOP8 plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
SOT505-2
SOT765-1
SOT833-1
SOT996-2
SOT902-2
VSSOP8 plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
XSON8
XSON8
XQFN8
plastic extremely thin small outline package; no leads;
8 terminals; body 1 1.95 0.5 mm
plastic extremely thin small outline package; no leads;
8 terminals; body 3 2 0.5 mm
plastic, extremely thin quad flat package; no leads;
8 terminals; body 1.6 1.6 0.5 mm
4. Marking
Table 2.
Marking codes
Type number
Marking code[1]
74LVCV2G66DP
74LVCV2G66DC
74LVCV2G66GT
74LVCV2G66GD
74LVCV2G66GM
Y66
Y66
Y66
Y66
Y66
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
ꢀ<
ꢀ(
ꢁ=
ꢀ=
ꢁ<
ꢀ
ꢀ
ꢂ
ꢂ
;ꢀ
ꢀ
ꢀ
;ꢀ
ꢁ(
ꢀꢀꢁDDJꢂꢃꢄ
ꢀꢀꢁDDKꢅꢀꢅ
Fig 1. Logic symbol
Fig 2. IEC logic symbol
74LVCV2G66
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
2 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
Z
Y
E
V
CC
001aaa532
Fig 3. Logic diagram (one switch)
6. Pinning information
6.1 Pinning
ꢀꢁ/9&9ꢂ*ꢃꢃꢃ
ꢀ=
ꢀ<
ꢀ
ꢁ
ꢃ
ꢇ
ꢆ
ꢅ
ꢄ
ꢈ
9
&&
ꢀ(
ꢁ<
ꢁ=
74LVCV2G66
ꢁ(
1
2
3
4
8
1Z
1Y
V
CC
7
6
5
1E
2Y
2Z
*1'
2E
GND
DDDꢆꢀꢁꢅꢇꢃꢈ
7UDQVSDUHQWꢉWRSꢉYLHZ
001aai213
Fig 4. Pin configuration SOT505-2 and SOT765-1
Fig 5. Pin configuration SOT833-1
ꢀꢁ/9&9ꢂ*ꢃꢃ
WHUPLQDOꢉꢀ
LQGH[ꢉDUHD
74LVCV2G66
ꢀ(
ꢀ
ꢅ
ꢄ
ꢈ
ꢀ=
ꢀ<
1Z
1Y
1
2
3
4
8
7
6
5
V
CC
1E
2Y
2Z
ꢁ<
ꢁ=
ꢁ
ꢃ
2E
ꢁ(
GND
DDDꢆꢀꢁꢅꢇꢃꢂ
001aai214
Transparent top view
7UDQVSDUHQWꢉWRSꢉYLHZ
Fig 6. Pin configuration SOT996-2
Fig 7. Pin configuration SOT902-2
74LVCV2G66
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
3 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
6.2 Pin description
Table 3.
Symbol
Pin description
Pin
Description
SOT505-2, SOT765-1,
SOT902-2
SOT996-2 and SOT833-1
1Z
1
2
3
4
5
6
7
8
7
6
5
4
3
2
1
8
independent input or output (overvoltage tolerant)
independent input or output
enable input (active HIGH)
ground (0 V)
1Y
2E
GND
2Z
independent input or output (overvoltage tolerant)
independent input or output
enable input (active HIGH)
supply voltage
2Y
1E
VCC
7. Functional description
Table 4.
Function table[1]
Input nE
Switch
L
OFF-state
ON-state
H
[1] H = HIGH voltage level; L = LOW voltage level.
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
VI
Parameter
Conditions
Min
0.5
0.5
50
-
Max
+6.5
+6.5
-
Unit
V
supply voltage
[1]
input voltage
V
IIK
input clamping current
switch clamping current
switch voltage
VI < 0.5 V or VI > 6.5 V
VI < 0.5 V or VI > 6.5 V
enable and disable mode
VSW > 0.5 V or VSW < 6.5 V
mA
mA
V
ISK
50
+6.5
50
100
-
VSW
ISW
0.5
-
switch current
mA
mA
mA
C
ICC
supply current
-
IGND
Tstg
Ptot
ground current
100
65
-
storage temperature
total power dissipation
+150
250
[2]
Tamb = 40 C to +125 C
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP8 package: above 55 C, the value of Ptot derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110 C, the value of Ptot derates linearly with 8 mW/K.
For XSON8 and XQFN8 packages: above 118 C, the value of Ptot derates linearly with 7.8 mW/K.
74LVCV2G66
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
4 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
9. Recommended operating conditions
Table 6.
Symbol
VCC
Recommended operating conditions
Parameter
Conditions
Min
2.3
0
Typ
Max
5.5
Unit
V
supply voltage
input voltage
-
-
-
-
-
-
VI
5.5
V
[1]
VSW
switch voltage
ambient temperature
enable and disable mode
0
5.5
V
Tamb
40
-
+125
20
C
[2]
[2]
t/V
input transition rise and fall rate VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 5.5 V
ns/V
ns/V
-
10
[1] To avoid sinking GND current from terminal nZ when switch current flows in terminal nY, the voltage drop across the bidirectional switch
must not exceed 0.4 V. If the switch current flows into terminal nZ, no GND current flows from terminal nY. In this case, there is no limit
for the voltage drop across the switch.
[2] Applies to control signal levels.
10. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
VIH
HIGH-level
input voltage
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
0.6VCC
-
-
0.6VCC
-
V
2.0
-
-
-
2.0
-
-
V
0.55VCC
-
0.55VCC
V
VIL
LOW-level
input voltage
-
-
-
-
-
0.1VCC
0.5
-
-
-
-
0.1VCC
0.5
V
-
-
V
0.15VCC
5
0.15VCC
5
V
[2]
II
inputleakage pin nE; VI = 5.5 V or GND;
0.1
A
current
VCC = 0 V to 5.5 V
[2][3]
IS(OFF)
OFF-state
leakage
current
VCC = 2.3 V to 5.5 V; see Figure 8
-
-
-
-
0.1
0.1
0.1
10
10
10
-
-
-
-
10
10
40
A
A
A
A
[2][3]
[2]
IS(ON)
ON-state
leakage
current
VCC = 2.3 V to 5.5 V; see Figure 9
VI = 5.5 V or GND;
ICC
supply
current
VSW = GND or VCC
;
VCC = 2.3 V to 5.5 V
[2]
ICC
additional
supply
pin nE; VI = VCC 0.6 V;
0.1
5
50
V
SW = GND or VCC
;
current
VCC = 3.0 V to 5.5 V
CI
input
capacitance
-
-
2.5
8.0
-
-
-
-
-
-
pF
pF
CS(OFF) OFF-state
capacitance
74LVCV2G66
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
5 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
Table 7.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C
40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
CS(ON)
ON-state
-
16
-
-
-
pF
capacitance
[1] All typical values are measured at Tamb = 25 C.
[2] These typical values are measured at VCC = 3.3 V.
[3] For overvoltage signals (VSW > VCC), the condition VY < VZ must be observed.
10.1 Test circuits
9
9
&&
&&
Q(
Q=
Q(
Q=
9
9
,+
,/
Q<
Q<
,
,
6
6
*1'
*1'
9
,
9
2
9
,
9
2
ꢀꢀꢁDDJꢂꢅꢅ
ꢀꢀꢁDDJꢂꢅꢃ
VI = GND and VO = GND or 5.5 V.
VI = 5.5 V or GND and VO = open circuit.
Fig 8. Test circuit for measuring OFF-state leakage
current
Fig 9. Test circuit for measuring ON-state leakage
current
10.2 ON resistance
Table 8.
Resistance RON
At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Figure 11 and Figure 12.
Symbol
Parameter
Conditions
40 C to +85 C 40 C to +125 C Unit
Min Typ[1] Max
Min
Max
RON(peak)
ON resistance
(peak)
VSW = GND to VCC; VI = VIH; see Figure 10
ISW = 8 mA; VCC = 2.3 V to 2.7 V
ISW = 12 mA; VCC = 2.7 V
-
-
-
-
13
10
30
25
20
15
-
-
-
-
30
25
20
15
ISW = 24 mA; VCC = 3.0 V to 3.6 V
ISW = 32 mA; VCC = 4.5 V to 5.5 V
8.3
7.4
RON(rail)
ON resistance (rail) VSW = GND; VI = VIH; see Figure 10
ISW = 8 mA; VCC = 2.3 V to 2.7 V
ISW = 12 mA; VCC = 2.7 V
-
-
-
-
8.5
8.0
7.5
7.3
20
18
15
10
-
-
-
-
20
18
15
10
ISW = 24 mA; VCC = 3.0 V to 3.6 V
ISW = 32 mA; VCC = 4.5 V to 5.5 V
VSW = VCC; VI = VIH
ISW = 8 mA; VCC = 2.3 V to 2.7 V
ISW = 12 mA; VCC = 2.7 V
-
-
-
-
8.5
7.2
6.5
5.7
20
18
15
10
-
-
-
-
20
18
15
10
ISW = 24 mA; VCC = 3.0 V to 3.6 V
ISW = 32 mA; VCC = 4.5 V to 5.5 V
74LVCV2G66
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
6 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
Table 8.
Resistance RON …continued
At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graphs see Figure 11 and Figure 12.
Symbol
Parameter
Conditions
40 C to +85 C 40 C to +125 C Unit
Min Typ[1] Max
Min
Max
[2]
RON(flat)
ON resistance
(flatness)
VSW = GND to VCC; VI = VIH
ISW = 8 mA; VCC = 2.5 V
ISW = 12 mA; VCC = 2.7 V
ISW = 24 mA; VCC = 3.3 V
ISW = 32 mA; VCC = 5.0 V
-
-
-
-
17
10
5
-
-
-
-
-
-
-
-
-
-
-
-
3
[1] All typical values are measured at Tamb = 25 C and nominal VCC
.
[2] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and
temperature.
10.3 ON resistance test circuit and graphs
001aaa536
16
R
ON
(Ω)
V
= 2.5 V
2.7 V
3.3 V
5.0 V
CC
12
9
6:
8
4
0
9
&&
Q(
Q<
9
,+
Q=
*1'
9
,
,
6:
0
2
4
6
V (V)
I
ꢀꢀꢁDDJꢂꢃꢀ
VI = GND to 5.5 V; RON = VSW / ISW
.
VI = GND to 5.5 V; Tamb = 25 C.
Fig 10. Test circuit for measuring ON resistance
Fig 11. Typical ON resistance as a function of input
voltage
74LVCV2G66
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
7 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
001aaa537
001aaa538
16
16
°
= +85 C
T
amb
R
(Ω)
R
ON
(Ω)
ON
°
+25 C
°
= +85 C
T
amb
°
−40 C
°
+25 C
12
12
°
+125 C
°
−40 C
°
+125 C
8
4
0
8
4
0
0
2
4
6
0
2
4
6
V (V)
I
V (V)
I
a. VCC = 2.5 V
b. VCC = 2.7 V
001aaa539
001aaa540
16
16
R
R
ON
ON
(Ω)
(Ω)
°
= +85 C
T
amb
12
8
12
8
°
+25 C
°
= +85 C
T
amb
°
−40 C
°
+25 C
°
+125 C
°
−40 C
°
+125 C
4
4
0
0
0
2
4
6
0
2
4
6
V (V)
I
V (V)
I
c. VCC = 3.3 V
d. VCC = 5.0 V
Fig 12. ON resistance as a function of input voltage at various supply voltages
11. Dynamic characteristics
Table 9.
Dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 15.
Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit
Min
propagation delay nY to nZ or nZ to nY; see Figure 13 [2][3]
Typ[1]
Max
Min
Max
tpd
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
-
0.4
0.4
0.3
0.2
1.2
1.0
0.8
0.6
-
-
-
-
2.0
1.5
1.5
1.0
ns
ns
ns
ns
-
-
-
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
74LVCV2G66
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
8 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
Table 9.
Dynamic characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 15.
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
ten
enable time
disable time
nE to nY or nZ; see Figure 14 [4]
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
1.0
1.0
1.0
1.0
4.7
4.4
3.8
2.7
12
8.5
7.5
5.0
1.0
1.0
1.0
1.0
15
11
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
nE to nY or nZ; see Figure 14 [5]
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
9.5
6.5
tdis
1.0
1.0
1.0
1.0
6.0
7.9
6.5
4.4
16
15
1.0
1.0
1.0
1.0
20
19
ns
ns
ns
ns
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
13.5
9.0
17
11.5
CPD
power dissipation CL = 50 pF; fi = 10 MHz; VI = GND to 5.5 V [6]
capacitance
VCC = 2.5 V
VCC = 3.3 V
VCC = 5.0 V
-
-
-
9.7
10.3
11.3
-
-
-
-
-
-
-
-
-
pF
pF
pF
[1] Typical values are measured at Tamb = 25 C and nominal VCC
.
[2] tpd is the same as tPLH and tPHL
.
[3] Propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified capacitance when
driven by an ideal voltage source (zero output impedance).
[4] ten is the same as tPZH and tPZL
.
[5] dis is the same as tPLZ and tPHZ
t
.
[6] CPD is used to determine the dynamic power dissipation (PD in W).
PD = CPD VCC2 fi N + {(CL + CS(ON)) VCC2 fo} where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
CS(ON) = maximum ON-state switch capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
{(CL + CS(ON)) VCC2 fo} = sum of the outputs.
74LVCV2G66
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
9 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
11.1 Waveforms and test circuit
9
,
Q<ꢉRUꢉQ=ꢉ
ꢉLQSXW
9
9
0
0
*1'
W
W
3/+
3+/
9
2+
Q=ꢉRUꢉQ<ꢉ
ꢉRXWSXW
9
9
0
0
9
2/
ꢀꢀꢁDDDꢇꢂꢁ
Measurement points are given in Table 10.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 13. Input (nY or nZ) to output (nZ or nY) propagation delays
9
,
Q(ꢉLQSXW
9
0
*1'
W
W
3=/
3/=
9
&&
RXWSXWꢉ
Q<ꢉRUꢉQ=
Q<ꢉRUꢉQ=
/2:ꢊWRꢊ2))ꢉ
2))ꢊWRꢊ/2:
9
0
9
;
9
2/
W
W
3=+
3+=
9
2+
9
<
RXWSXWꢉ
+,*+ꢊWRꢊ2))ꢉ
2))ꢊWRꢊ+,*+
9
0
*1'
VZLWFKꢉ
HQDEOHG
VZLWFKꢉ
VZLWFKꢉ
HQDEOHG
GLVDEOHG
ꢀꢀꢁDDDꢇꢂꢉ
Measurement points are given in Table 10.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 14. Enable and disable times
Table 10. Measurement points
Supply voltage
VCC
Input
Output
VM
VM
VX
VY
2.3 V to 2.7 V
2.7 V
0.5VCC
1.5 V
1.5 V
0.5VCC
0.5VCC
1.5 V
VOL + 0.1VCC
VOL + 0.3 V
VOL + 0.3 V
VOL + 0.3 V
VOH 0.1VCC
VOH 0.3 V
VOH 0.3 V
VOH 0.3 V
3.0 V to 3.6 V
4.5 V to 5.5 V
1.5 V
0.5VCC
74LVCV2G66
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
10 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
9
(;7
9
&&
5
/
9
9
2
,
*
'87
5
7
&
/
5
/
PQDꢊꢁꢊ
Test data is given in Table 11.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
VEXT = External voltage for measuring switching times.
Fig 15. Test circuit for measuring switching times
Table 11. Test data
Supply voltage
VCC
Input
VI
Load
CL
VEXT
tr, tf
RL
tPLH, tPHL
open
tPZH, tPHZ
GND
tPZL, tPLZ
2VCC
2.3 V to 2.7 V
2.7 V
VCC
2.7 V
2.7 V
VCC
2.0 ns
2.5 ns
2.5 ns
2.5 ns
30 pF
50 pF
50 pF
50 pF
500
500
500
500
open
GND
6.0 V
3.0 V to 3.6 V
4.5 V to 5.5 V
open
GND
6.0 V
open
GND
2VCC
11.2 Additional dynamic characteristics
Table 12. Additional dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C.
Symbol
Parameter
Conditions
Min
Typ
Max Unit
THD
total harmonic distortion
fi = 1 kHz; RL = 10 k; CL = 50 pF; see Figure 16
VCC = 2.3 V
VCC = 3.0 V
VCC = 4.5 V
-
-
-
0.42
0.36
0.47
-
-
-
%
%
%
fi = 10 kHz; RL = 10 k; CL = 50 pF; see Figure 16
VCC = 2.3 V
VCC = 3.0 V
VCC = 4.5 V
-
-
-
0.11
0.07
0.01
-
-
-
%
%
%
f(3dB)
3 dB frequency response RL = 600 ; CL = 50 pF; see Figure 17
VCC = 2.3 V
-
-
-
160
200
210
-
-
-
MHz
MHz
MHz
VCC = 3.0 V
VCC = 4.5 V
RL = 50 ; CL = 5 pF; see Figure 17
VCC = 2.3 V
-
-
-
180
180
180
-
-
-
MHz
MHz
MHz
VCC = 3.0 V
VCC = 4.5 V
74LVCV2G66
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
11 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
Table 12. Additional dynamic characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb = 25 C.
Symbol
Parameter
Conditions
Min
Typ
Max Unit
iso
isolation (OFF-state)
RL = 600 ; CL = 50 pF; fi = 1 MHz; see Figure 18
VCC = 2.3 V
-
65
65
62
-
-
-
dB
dB
dB
VCC = 3.0 V
-
-
VCC = 4.5 V
RL = 50 ; CL = 5 pF; fi = 1 MHz; see Figure 18
VCC = 2.3 V
VCC = 3.0 V
VCC = 4.5 V
-
-
-
37
36
36
-
-
-
dB
dB
dB
Vct
crosstalk voltage
between digital inputs and switch; RL = 600 ; CL = 50 pF; fi = 1 MHz;
tr = tf = 2 ns; see Figure 19
VCC = 2.3 V
VCC = 3.0 V
VCC = 4.5 V
-
-
-
91
-
-
-
mV
mV
mV
119
205
Xtalk
crosstalk
between switches; RL = 600 ; CL = 50 pF; fi = 1 MHz; see Figure 20
VCC = 2.3 V
VCC = 3.0 V
VCC = 4.5 V
-
-
-
56
55
55
-
-
-
dB
dB
dB
between switches; RL = 50 ; CL = 5 pF; fi = 1 MHz; see Figure 20
VCC = 2.3 V
VCC = 3.0 V
VCC = 4.5 V
-
-
-
29
28
28
-
-
-
dB
dB
dB
Qinj
charge injection
CL = 0.1 nF; Vgen = 0 V; Rgen = 0 ; fi = 1 MHz; RL = 1 M; see Figure 21
VCC = 2.5 V
VCC = 3.3 V
VCC = 4.5 V
VCC = 5.5 V
-
-
-
-
< 0.003
0.003
-
-
-
-
pC
pC
pC
pC
0.0035
0.0035
74LVCV2G66
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
12 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
11.3 Test circuits
V
0.5V
CC
CC
nE
V
R
L
IH
10 μF
nY/nZ
nZ/nY
V
O
f
600 Ω
C
L
D
i
001aag492
Test conditions:
VCC = 2.3 V: Vi = 2 V (p-p).
VCC = 3 V: Vi = 2.5 V (p-p).
V
CC = 4.5 V: Vi = 4 V (p-p).
Fig 16. Test circuit for measuring total harmonic distortion
V
0.5V
CC
CC
nE
V
R
L
IH
0.1 μF
50 Ω
nY/nZ
nZ/nY
V
O
f
C
L
dB
i
001aag491
To obtain 0 dBm level at the output, adjust fi voltage. Increase fi frequency until dB meter reads 3 dB.
Fig 17. Test circuit for measuring the frequency response when switch is in ON-state
0.5V
V
0.5V
CC
CC
CC
nE
R
L
V
R
L
IL
0.1 μF
nY/nZ
nZ/nY
V
O
f
50 Ω
C
L
dB
i
001aag493
To obtain 0 dBm level at the input, adjust fi voltage.
Fig 18. Test circuit for measuring isolation (OFF-state)
74LVCV2G66
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
13 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
V
CC
nE
nY/nZ
nZ/nY
V
O
logic
input
G
R
L
C
L
50 Ω
600 Ω
0.5V
0.5V
001aag494
CC
CC
Fig 19. Test circuit for measuring crosstalk voltage (between digital inputs and switch)
0.5V
CC
1E
V
IH
R
L
0.1 μF
50 Ω
R
i
1Y or 1Z
1Z or 1Y
600 Ω
CHANNEL
ON
C
50 pF
L
f
V
O1
i
0.5V
CC
2E
V
R
L
IL
2Y or 2Z
2Z or 2Y
CHANNEL
OFF
C
50 pF
L
R
600 Ω
i
V
O2
001aag496
20 log10 (VO2 / VO1) or 20 log10 (VO1 / VO2).
Fig 20. Test circuit for measuring crosstalk between switches
74LVCV2G66
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
14 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
V
CC
nE
R
gen
nY/nZ
nZ/nY
V
O
R
1 MΩ
C
L
0.1 nF
G
logic
input
L
V
gen
001aag495
a. Test circuit
logic
input (nE)
off
on
off
V
O
ΔV
O
mna675
b. Input and output pulse definitions
Qinj = VO CL.
VO = output voltage variation.
Rgen = generator resistance.
V
gen = generator voltage.
Fig 21. Test circuit for measuring charge injection
74LVCV2G66
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
15 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
12. Application information
The 74LVCV2G66 is used to reduce component count and footprint in low-power portable
applications.
Typical ‘66’ devices do not have low-power enable inputs causing a high ICC. To reduce
power consumption in portable (battery) applications, a current limiting resistor is used.
(see Figure 22a). The low-power enable inputs of the 74LVCV2G66 have much lower
ICC, eliminating the necessity of the current limiting resistor (see Figure 22b).
5 V
1 MΩ
5 V
V
CC
V
CC
nE
nY
nE
nY
3 V
3 V
nZ
nZ
'66' device
(a)
74LVCV2G66
(b)
001aaa550
Fig 22. Application example
74LVCV2G66
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
16 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
13. Package outline
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Fig 23. Package outline SOT505-2 (TSSOP8)
74LVCV2G66
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
17 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
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Fig 24. Package outline SOT765-1 (VSSOP8)
74LVCV2G66
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
18 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
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Fig 25. Package outline SOT833-1 (XSON8)
74LVCV2G66
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© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
19 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
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Fig 26. Package outline SOT996-2 (XSON8)
74LVCV2G66
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
20 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
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74LVCV2G66
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
21 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
14. Abbreviations
Table 13. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal-Oxide Semiconductor
Device Under Test
15. Revision history
Table 14. Revision history
Document ID
Release date
20150722
Data sheet status
Change notice
Supersedes
74LVCV2G66 v.6
Modifications:
Product data sheet
-
74LVCV2G66 v.5
• Added type numbers 74LVCV2G66GT and.74LVCV2G66GM
20130329 Product data sheet
74LVCV2G66 v.5
Modifications:
-
74LVCV2G66 v.4
• For type number 74LVCV2G66GD XSON8U has changed to XSON8.
74LVCV2G66 v.4
Modifications:
20111122
Product data sheet
-
74LVCV2G66 v.3
• Legal pages updated.
74LVCV2G66 v.3
74LVCV2G66 v.2
74LVCV2G66 v.1
20100616
20080703
20040402
Product data sheet
-
-
-
74LVCV2G66 v.2
Product data sheet
Product data sheet
74LVCV2G66 v.1
-
74LVCV2G66
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
22 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use — NXP Semiconductors products are not designed,
16.2 Definitions
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
16.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
74LVCV2G66
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
23 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74LVCV2G66
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 22 July 2015
24 of 25
74LVCV2G66
NXP Semiconductors
Overvoltage tolerant bilateral switch
18. Contents
1
2
3
4
5
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7
8
9
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 5
10
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
ON resistance. . . . . . . . . . . . . . . . . . . . . . . . . . 6
ON resistance test circuit and graphs. . . . . . . . 7
10.1
10.2
10.3
11
Dynamic characteristics . . . . . . . . . . . . . . . . . . 8
Waveforms and test circuit . . . . . . . . . . . . . . . 10
Additional dynamic characteristics . . . . . . . . . 11
Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
11.1
11.2
11.3
12
13
14
15
Application information. . . . . . . . . . . . . . . . . . 16
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 22
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 22
16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 23
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 23
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 24
16.1
16.2
16.3
16.4
17
18
Contact information. . . . . . . . . . . . . . . . . . . . . 24
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2015.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 22 July 2015
Document identifier: 74LVCV2G66
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