74LVC1G17GM [NXP]
Single Schmitt-trigger buffer; 单施密特触发缓冲器
| 型号： | 74LVC1G17GM |
| 厂家： | 
NXP |
| 描述： | Single Schmitt-trigger buffer |
| 文件： | 总16页 (文件大小：94K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
74LVC1G17
Single Schmitt-trigger buffer
Product specification
2004 Nov 30
Supersedes data of 2004 Oct 18
Philips Semiconductors
Product specification
Single Schmitt-trigger buffer
74LVC1G17
FEATURES
DESCRIPTION
• Wide supply voltage range from 1.65 V to 5.5 V
• High noise immunity
The 74LVC1G17 is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
• Complies with JEDEC standard:
– JESD8-7 (1.65 V to 1.95 V)
The input can be driven from either 3.3 V or 5 V devices.
This feature allows the use of this device in a mixed
3.3 V and 5 V environment.
– JESD8-5 (2.3 V to 2.7 V)
– JESD8B/JESD36 (2.7 V to 3.6 V).
• ±24 mA output drive (VCC = 3.0 V)
• CMOS low power consumption
• Latch-up performance exceeds 250 mA
• Direct interface with TTL levels
• Unlimited rise and fall times
This device is fully specified for partial power-down
applications using Ioff. The Ioff circuitry disables the output,
preventing the damaging backflow current through the
device when it is powered down.
The 74LVC1G17 provides a buffer function with
Schmitt-trigger action. It is capable of transforming slowly
changing input signals into sharply defined outputs.
• Input accepts voltages up to 5 V
• ESD protection:
– HBM EIA/JESD22-A114-B exceeds 2000 V
– MM EIA/JESD22-A115-A exceeds 200 V.
• Multiple package options
• Specified from −40 °C to +85 °C and −40 °C to +125 °C.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
tPHL/tPLH
propagation delay A to Y
VCC = 1.8 V; CL = 30 pF; RL = 1 kΩ
4.1
ns
ns
ns
ns
VCC = 2.5 V; CL = 30 pF; RL = 500 Ω 2.8
VCC = 3.3 V; CL = 50 pF; RL = 500 Ω 3.0
VCC = 5.0 V; CL = 50 pF; RL = 500 Ω 2.2
CI
input capacitance
5
pF
pF
CPD
power dissipation capacitance per buffer notes 1 and 2
16.6
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC
.
2004 Nov 30
2
Philips Semiconductors
Product specification
Single Schmitt-trigger buffer
74LVC1G17
FUNCTION TABLE
See note 1.
INPUT
A
OUTPUT
Y
L
L
H
H
Note
1. H = HIGH voltage level;
L = LOW voltage level.
ORDERING INFORMATION
PACKAGE
PACKAGE MATERIAL
TYPE NUMBER
TEMPERATURE
PINS
CODE
MARKING
RANGE
74LVC1G17GW
74LVC1G17GV
74LVC1G17GM
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
5
5
6
SC-88A
SC-74A
XSON6
plastic
plastic
plastic
SOT353
SOT753
SOT886
VJ
V17
VJ
PINNING
PIN SC-88A; SC-74A
PIN XSON6
SYMBOL
DESCRIPTION
1
2
3
4
-
1
2
3
4
5
6
n.c.
not connected
data input A
A
GND
Y
ground (0 V)
data output Y
not connected
supply voltage
n.c.
VCC
5
17
n.c.
A
1
2
3
6
5
4
V
CC
1
2
3
5
4
n.c.
A
V
Y
CC
17
n.c.
Y
GND
GND
001aab808
001aab809
Transparent top view
Fig.1 Pin configuration SC-88A and SC-74A.
Fig.2 Pin configuration XSON6.
2004 Nov 30
3
Philips Semiconductors
Product specification
Single Schmitt-trigger buffer
74LVC1G17
handbook, halfpage
handbook, halfpage
A
Y
2
4
4
2
MNB151
MNB150
Fig.3 Logic symbol.
Fig.4 IEEE/IEC logic symbol.
handbook, halfpage
A
Y
MNB152
Fig.5 Logic diagram.
2004 Nov 30
4
Philips Semiconductors
Product specification
Single Schmitt-trigger buffer
74LVC1G17
RECOMMENDED OPERATING CONDITIONS
SYMBOL
VCC
PARAMETER
supply voltage
CONDITIONS
MIN.
1.65
MAX.
5.5
UNIT
V
VI
input voltage
0
5.5
V
VO
output voltage
active mode
Power-down mode; VCC = 0 V
0
VCC
5.5
V
0
V
Tamb
operating ambient temperature
−40
+125
°C
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage −0.5 +6.5
V
IIK
input diode current
input voltage
VI < 0 V
note 1
−
−50
mA
V
VI
−0.5
−
+6.5
±50
IOK
VO
output diode current
output voltage
VO > VCC or VO < 0 V
mA
V
active mode; notes 1 and 2
−0.5
VCC + 0.5
+6.5
±50
Power-down mode; notes 1 and 2 −0.5
V
IO
output source or sink current
VCC or GND current
VO = 0 V to VCC
−
mA
mA
°C
mW
ICC, IGND
Tstg
−
±100
+150
250
storage temperature
−65
−
Ptot
total power dissipation
Tamb = −40 °C to +125 °C
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
2004 Nov 30
5
Philips Semiconductors
Product specification
Single Schmitt-trigger buffer
74LVC1G17
DC CHARACTERISTICS
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
OTHER
VCC (V)
Tamb = −40 °C to +85 °C; note 1
VOL
LOW-level output voltage VI = VCC or GND
IO = 100 µA
IO = 4 mA
IO = 8 mA
IO = 12 mA
IO = 24 mA
IO = 32 mA
1.65 to 5.5
1.65
2.3
−
−
−
−
−
−
−
−
−
−
−
−
0.1
V
0.45
0.3
V
V
V
V
V
2.7
0.4
3.0
0.55
0.55
4.5
VOH
HIGH-level output
voltage
VI = VCC or GND
IO = −100 µA
IO = −4 mA
1.65 to 5.5
1.65
2.3
V
CC − 0.1
−
−
−
−
−
−
−
V
1.2
1.9
2.2
2.3
3.8
−
−
V
IO = −8 mA
−
V
IO = −12 mA
IO = −24 mA
IO = −32 mA
2.7
−
V
3.0
−
V
4.5
−
V
ILI
input leakage current
VI = 5.5 V or GND 3.6
VI or VO = 5.5 V
±0.1
±0.1
±5
±10
µA
µA
Ioff
power OFF leakage
current
0
−
ICC
quiescent supply current VI = VCC or GND; 5.5
IO = 0 A
−
−
0.1
5
10
µA
µA
∆ICC
additional quiescent
supply current per pin
VI = VCC − 0.6 V;
IO = 0 A
2.3 to 5.5
500
2004 Nov 30
6
Philips Semiconductors
Product specification
Single Schmitt-trigger buffer
74LVC1G17
TEST CONDITIONS
OTHER VCC (V)
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
Tamb = −40 °C to +125 °C
VOL
LOW-level output voltage VI = VCC or GND
IO = 100 µA
IO = 4 mA
IO = 8 mA
IO = 12 mA
IO = 24 mA
IO = 32 mA
1.65 to 5.5
1.65
2.3
−
−
−
−
−
−
−
−
−
−
−
−
0.1
V
0.7
0.45
0.6
0.8
0.8
V
V
V
V
V
2.7
3.0
4.5
VOH
HIGH-level output
voltage
VI = VCC or GND
IO = −100 µA
IO = −4 mA
1.65 to 5.5
1.65
2.3
V
CC − 0.1
−
−
−
−
−
−
−
−
−
V
0.95
1.7
1.9
2.0
3.4
−
−
V
IO = −8 mA
−
V
IO = −12 mA
IO = −24 mA
IO = −32 mA
2.7
−
V
3.0
−
V
4.5
−
V
ILI
input leakage current
VI = 5.5 V or GND 3.6
VI or VO = 5.5 V
±100
±200
µA
µA
Ioff
power OFF leakage
current
0
−
ICC
quiescent supply current VI = VCC or GND; 5.5
IO = 0 A
−
−
−
−
200
µA
µA
∆ICC
additional quiescent
supply current per pin
VI = VCC − 0.6 V;
IO = 0 A
2.3 to 5.5
5000
Note
1. All typical values are measured at maximum VCC and Tamb = 25 °C.
2004 Nov 30
7
Philips Semiconductors
Product specification
Single Schmitt-trigger buffer
74LVC1G17
TRANSFER CHARACTERISTICS
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
OTHER
VCC (V)
Tamb = −40 °C to +85 °C; note 1
VT+
VT−
VH
positive-going threshold see Figs 6 and 7
voltage
1.8
0.82
1.0
1.2
1.5
2.1
2.5
0.6
0.8
1.0
1.5
1.8
0.4
0.4
0.5
0.6
0.6
1.14
V
2.3
3.0
4.5
5.5
1.8
2.3
3.0
4.5
5.5
1.8
2.3
3.0
4.5
5.5
1.03
1.29
1.84
2.19
0.46
0.65
0.88
1.32
1.58
0.26
0.28
0.31
0.40
0.47
1.40
1.71
2.36
2.79
0.75
0.96
1.24
1.84
2.24
0.51
0.57
0.64
0.77
0.88
V
V
V
V
V
V
V
V
V
V
V
V
V
V
negative-going threshold see Figs 6 and 7
voltage
hysteresis voltage
see Figs 6 and 7
(VT+ − VT−)
Tamb = −40 °C to +125 °C
VT+
VT−
VH
positive-going threshold see Figs 6 and 7
voltage
1.8
2.3
3.0
4.5
5.5
1.8
2.3
3.0
4.5
5.5
1.8
2.3
3.0
4.5
5.5
0.79
1.00
1.26
1.81
2.16
0.46
0.65
0.88
1.32
1.58
0.19
0.22
0.25
0.34
0.41
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
1.14
1.40
1.71
2.36
2.79
0.78
0.99
1.27
1.87
2.27
0.51
0.57
0.64
0.77
0.88
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
negative-going threshold see Figs 6 and 7
voltage
hysteresis voltage
see Figs 6 and 7
(VT+ − VT−)
Note
1. All typical values are measured at Tamb = 25 °C.
2004 Nov 30
8
Philips Semiconductors
Product specification
Single Schmitt-trigger buffer
74LVC1G17
TRANSFER CHARACTERISTIC WAVEFORMS
V
O
handbook, halfpage
V
T+
V
I
V
H
V
T−
V
O
V
I
V
H
MNB155
V
T−
V
T+
mnb154
Fig.6 Transfer characteristic.
Fig.7 Definitions of VT+, VT− and VH.
MNA641
10
handbook, halfpage
I
CC
(mA)
8
6
4
2
0
0
1
2
3
V (V)
I
VCC = 3.0 V.
Fig.8 Typical transfer characteristics.
2004 Nov 30
9
Philips Semiconductors
Product specification
Single Schmitt-trigger buffer
74LVC1G17
AC CHARACTERISTICS
GND = 0 V.
TEST CONDITIONS
OTHER VCC (V)
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
Tamb = −40 °C to +85 °C; note 1
tPHL/tPLH propagation delay A to Y see Figs 9 and 10 1.65 to 1.95 1.0
4.1
2.8
3.2
3.0
2.2
11.0
ns
2.3 to 2.7
2.7
0.7
0.7
0.7
0.7
6.5
6.5
5.5
5.0
ns
ns
ns
ns
3.0 to 3.6
4.5 to 5.5
Tamb = −40 °C to +125 °C
tPHL/tPLH propagation delay A to Y see Figs 9 and 10 1.65 to 1.95 1.0
−
−
−
−
−
14.0
8.5
8.5
7.0
6.5
ns
ns
ns
ns
ns
2.3 to 2.7
2.7
0.7
0.7
0.7
0.7
3.0 to 3.6
4.5 to 5.5
Note
1. All typical values are measured at Tamb = 25 °C.
AC WAVEFORMS
V
handbook, halfpage
A input
I
V
M
GND
t
t
PHL
PLH
V
OH
V
Y output
M
V
MNB153
OL
INPUT
VCC
VM
VI
tr = tf
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
0.5 × VCC
0.5 × VCC
1.5 V
VCC
VCC
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
1.5 V
2.7 V
VCC
0.5 × VCC
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.9 Input A to output Y propagation delay times.
10
2004 Nov 30
Philips Semiconductors
Product specification
Single Schmitt-trigger buffer
74LVC1G17
V
EXT
V
CC
R
L
V
I
V
O
PULSE
GENERATOR
D.U.T.
C
L
R
L
R
T
mna616
VEXT
VCC
VI
CL
RL
tPLH/tPHL
tPZH/tPHZ
tPZL/tPLZ
1.65 V to 1.95 V VCC
30 pF
30 pF
50 pF
50 pF
50 pF
1 kΩ
open
open
open
open
open
GND
GND
GND
GND
GND
2 × VCC
2 × VCC
6 V
2.3 V to 2.7 V
2.7 V
VCC
500 Ω
500 Ω
500 Ω
500 Ω
2.7 V
2.7 V
VCC
3.0 V to 3.6 V
4.5 V to 5.5 V
6 V
2 × VCC
Definitions for test circuit:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.10 Load circuitry for switching times.
APPLICATION INFORMATION
MNB156
50
handbook, halfpage
I
CC
(mA)
(1)
40
30
20
(2)
10
0
2
3
4
5
6
V
(V)
CC
(1) Positive-going edge.
Linear change of VI between 0.8 V to 2.0 V.
(2) Negative-going edge.
Fig.11 Average supply current as a function of supply voltage.
11
2004 Nov 30
Philips Semiconductors
Product specification
Single Schmitt-trigger buffer
74LVC1G17
PACKAGE OUTLINES
Plastic surface mounted package; 5 leads
SOT353
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
1
2
3
c
e
b
L
p
w
M B
1
p
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
(2)
UNIT
A
b
c
D
E
e
e
H
L
Q
v
w
y
p
p
1
E
max
0.3
0.2
1.1
0.8
0.25
0.10
2.2
1.8
1.35
1.15
2.2
2.0
0.45
0.15
0.25
0.15
mm
0.1
1.3
0.65
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
97-02-28
04-11-16
SC-88A
SOT353
2004 Nov 30
12
Philips Semiconductors
Product specification
Single Schmitt-trigger buffer
74LVC1G17
Plastic surface mounted package; 5 leads
SOT753
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
c
L
p
1
2
3
detail X
e
b
p
w
M B
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A
1
b
c
D
E
e
H
L
Q
v
w
y
p
p
E
0.100
0.013
0.40
0.25
1.1
0.9
0.26
0.10
3.1
2.7
1.7
1.3
3.0
2.5
0.6
0.2
0.33
0.23
mm
0.95
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
SOT753
SC-74A
02-04-16
2004 Nov 30
13
Philips Semiconductors
Product specification
Single Schmitt-trigger buffer
74LVC1G17
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
SOT886
b
1
2
3
4×
(2)
L
L
1
e
6
5
4
e
1
e
1
6×
(2)
A
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
A
1
UNIT
b
D
E
e
e
L
L
1
1
max max
0.25
0.17
1.5
1.4
1.05
0.95
0.35 0.40
0.27 0.32
mm
0.5 0.04
0.6
0.5
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
REFERENCES
JEDEC JEITA
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
04-07-15
04-07-22
SOT886
MO-252
2004 Nov 30
14
Philips Semiconductors
Product specification
Single Schmitt-trigger buffer
74LVC1G17
DATA SHEET STATUS
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
LEVEL
DEFINITION
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2004 Nov 30
15
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2004
SCA76
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
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Printed in The Netherlands
R20/04/pp16
Date of release: 2004 Nov 30
Document order number: 9397 750 14375
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