74LV132 [NXP]

Quad 2-input NAND Schmitt-trigger; 四路2输入与非施密特触发器
74LV132
型号: 74LV132
厂家: NXP    NXP
描述:

Quad 2-input NAND Schmitt-trigger
四路2输入与非施密特触发器

触发器
文件: 总12页 (文件大小:121K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
74LV132  
Quad 2-input NAND Schmitt-trigger  
Product specification  
1998 Apr 28  
Supersedes data of 1997 Feb 04  
IC24 Data Handbook  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
Quad 2-input NAND Schmitt-trigger  
74LV132  
FEATURES  
APPLICATIONS  
Wide operating voltage: 1.0 to 5.5V  
Wave and pulse shapers  
Optimized for Low Voltage applications: 1.0 to 3.6V  
Astable multivibrators  
Monostable multivibrators  
Accepts TTL input levels between V = 2.7V and V = 3.6V  
CC  
CC  
Typical V  
(output ground bounce) t 0.8V @ V = 3.3V,  
OLP  
CC  
T
= 25°C  
amb  
DESCRIPTION  
The 74LV132 is a low-voltage Si-gate CMOS device and is pin and  
function compatible with 74HC/HCT132.  
Typical V  
(output V undershoot) u 2V @ V = 3.3V,  
OHV  
OH  
CC  
T
= 25°C  
amb  
Output capability: standard  
The 74LV132 contains four 2-input NAND gates which accept  
standard input signals. They are capable of transforming slowly  
changing input signals into sharply defined, jitter-free output signals.  
I category: SSI  
CC  
The gate switches at different points for positive and negative-going  
signals. The difference between the positive voltage V and the  
T+  
negative voltage V is defined as the hysteresis voltage V .  
T–  
H
QUICK REFERENCE DATA  
GND = 0V; T  
= 25°C; t = t v2.5 ns  
amb  
r f  
SYMBOL  
/t  
PARAMETER  
CONDITIONS  
TYPICAL  
UNIT  
Propagation delay  
nA, nB to nY  
C = 15pF  
L
CC  
t
10  
ns  
PHL PLH  
V
= 3.3V  
C
C
Input capacitance  
3.5  
24  
pF  
pF  
I
Power dissipation capacitance per gate  
Notes 1 and 2  
PD  
NOTES:  
1. C is used to determine the dynamic power dissipation (P in µW)  
PD  
D
2
2
P
= C   V  
  f )S (C   V  
  f ) where:  
D
PD  
CC  
i
L
CC o  
f = input frequency in MHz; C = output load capacitance in pF;  
i
L
f = output frequency in MHz; V = supply voltage in V;  
o
CC  
2
S (C   V  
  f ) = sum of the outputs.  
L
CC  
o
2. The condition is V = GND to V  
I
CC  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
74LV132 N  
PKG. DWG. #  
SOT27-1  
14-Pin Plastic DIL  
–40°C to +125°C  
–40°C to +125°C  
–40°C to +125°C  
–40°C to +125°C  
74LV132 N  
74LV132 D  
14-Pin Plastic SO  
74LV132 D  
SOT108-1  
SOT337-1  
SOT402-1  
14-Pin Plastic SSOP Type II  
14-Pin Plastic TSSOP Type I  
74LV132 DB  
74LV132 PW  
74LV132 DB  
74LV132PW DH  
PIN DESCRIPTION  
FUNCTION TABLE  
INPUTS  
OUTPUT  
PIN  
SYMBOL  
NUMBER  
FUNCTION  
nA  
L
nB  
L
nY  
H
1, 4, 9, 12  
2, 5, 10, 13  
3, 6, 8, 11  
7
1A to 4A  
1B to 4B  
1Y to 4Y  
GND  
Data inputs  
Data inputs  
L
H
L
H
H
H
H
Data outputs  
H
L
Ground (0V)  
NOTES:  
H = HIGH voltage level  
L = LOW voltage level  
14  
V
CC  
Positive supply voltage  
2
1998 Apr 28  
853–1912 19290  
Philips Semiconductors  
Product specification  
Quad 2-input NAND Schmitt-trigger  
74LV132  
PIN CONFIGURATION  
LOGIC SYMBOL  
1A  
1
2
14  
V
CC  
1A  
1B  
1Y  
2A  
1
2
3
4
5
1Y  
2Y  
3Y  
4Y  
3
1B  
13 4B  
12 4A  
11 4Y  
10 3B  
2A  
2B  
4
5
6
2B  
2Y  
6
7
9
8
3A  
3Y  
3A  
3B  
GND  
9
8
SV00213  
10  
4A  
4B  
12  
13  
LOGIC SYMBOL (IEEE/IEC)  
11  
1
&
3
SV00215  
2
4
&
LOGIC DIAGRAM  
6
5
9
&
8
A
B
10  
Y
12  
&
11  
13  
SV00217  
SV00216  
RECOMMENDED OPERATING CONDITIONS  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
3.3  
MAX  
UNIT  
V
CC  
DC supply voltage  
See Note1  
1.0  
0
5.5  
V
V
V
V
I
Input voltage  
V
CC  
V
CC  
V
O
Output voltage  
0
Operating ambient temperature range in free  
air  
See DC and AC  
characteristics  
–40  
–40  
+85  
+125  
T
amb  
°C  
V
CC  
V
CC  
V
CC  
V
CC  
= 1.0V to 2.0V  
= 2.0V to 2.7V  
= 2.7V to 3.6V  
= 3.6V to 5.5V  
500  
200  
100  
50  
Input rise and fall times except for  
Schmitt-trigger inputs  
t , t  
r
ns/V  
f
NOTE:  
1. The LV is guaranteed to function down to V = 1.0V (input levels GND or V ); DC characteristics are guaranteed from V = 1.2V to V = 5.5V.  
CC  
CC  
CC  
CC  
3
1998 Apr 28  
Philips Semiconductors  
Product specification  
Quad 2-input NAND Schmitt-trigger  
74LV132  
1, 2  
ABSOLUTE MAXIMUM RATINGS  
In accordance with the Absolute Maximum Rating System (IEC 134).  
Voltages are referenced to GND (ground = 0V).  
SYMBOL  
PARAMETER  
DC supply voltage  
CONDITIONS  
RATING  
UNIT  
V
V
CC  
–0.5 to +7.0  
±I  
DC input diode current  
DC output diode current  
V < –0.5 or V > V + 0.5V  
20  
50  
mA  
mA  
IK  
I
I
CC  
±I  
OK  
V
O
< –0.5 or V > V + 0.5V  
O
CC  
DC output source or sink current  
– standard outputs  
±I  
O
–0.5V < V < V + 0.5V  
mA  
O
CC  
25  
DC V or GND current for types with  
– standard outputs  
CC  
±I  
±I  
,
mA  
GND  
50  
CC  
T
stg  
Storage temperature range  
–65 to +150  
°C  
Power dissipation per package  
– plastic DIL  
– plastic mini-pack (SO)  
for temperature range: –40 to +125°C  
above +70°C derate linearly with 12 mW/K  
above +70°C derate linearly with 8 mW/K  
above +60°C derate linearly with 5.5 mW/K  
750  
500  
400  
P
TOT  
mW  
– plastic shrink mini-pack (SSOP and TSSOP)  
NOTES:  
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the  
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to  
absolute-maximum-rated conditions for extended periods may affect device reliability.  
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
DC CHARACTERISTICS  
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).  
LIMITS  
-40°C to +85°C  
-40°C to +125°C  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
UNIT  
1
MIN  
0.9  
1.4  
2.0  
TYP  
MAX  
MIN  
0.9  
1.4  
2.0  
MAX  
V
V
V
V
V
V
V
V
V
V
V
V
V
= 1.2V  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
= 2.0V  
HIGH level Input  
voltage  
V
V
IH  
= 2.7 to 3.6V  
= 4.5 to 5.5V  
= 1.2V  
0.7*V  
0.7*V  
CC  
CC  
0.3  
0.6  
0.8  
0.3  
0.6  
0.8  
= 2.0V  
LOW level Input  
voltage  
V
V
IL  
= 2.7 to 3.6V  
= 4.5 to 5.5  
0.3*V  
0.3*V  
CC  
CC  
= 1.2V; V = V or V –I = 100µA  
1.2  
2.0  
2.7  
3.0  
4.5  
I
IH  
IL;  
O
= 2.0V; V = V or V –I = 100µA  
1.8  
2.5  
2.8  
4.3  
1.8  
2.5  
2.8  
4.3  
I
IH  
IL;  
O
HIGH level output  
voltage; all outputs  
= 2.7V; V = V or V –I = 100µA  
V
V
V
V
V
I
IH  
IL;  
O
OH  
= 3.0V; V = V or V –I = 100µA  
I
IH  
IL;  
O
= 4.5V; V = V or V –I = 100µA  
I
IH  
IL;  
O
HIGH level output  
voltage;  
STANDARD  
V
V
= 3.0V; V = V or V –I = 6mA  
2.40  
3.60  
2.82  
4.20  
2.20  
3.50  
CC  
I
IH  
IL;  
O
OH  
= 4.5V; V = V or V –I = 12mA  
CC  
I
IH  
IL;  
O
outputs  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 1.2V; V = V or V I  
IL; O  
= 100µA  
= 100µA  
= 100µA  
= 100µA  
= 100µA  
0
0
0
0
0
I
IH  
= 2.0V; V = V or V  
I
0.2  
0.2  
0.2  
0.2  
0.2  
0.2  
0.2  
0.2  
I
IH  
IL; O  
LOW level output  
voltage; all outputs  
= 2.7V; V = V or V  
I
V
OL  
I
IH  
IL; O  
= 3.0V; V = V or V I  
IL; O  
I
IH  
= 4.5V; V = V or V I  
IL; O  
I
IH  
4
1998 Apr 28  
Philips Semiconductors  
Product specification  
Quad 2-input NAND Schmitt-trigger  
74LV132  
DC CHARACTERISTICS (Continued)  
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).  
LIMITS  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
UNIT  
-40°C to +85°C  
-40°C to +125°C  
LOW level output  
voltage;  
STANDARD  
V
V
V
V
= 3.0V; V = V or V I = 6mA  
IL; O  
0.25  
0.40  
0.55  
1.0  
0.50  
0.65  
1.0  
CC  
CC  
CC  
I
IH  
V
V
OL  
= 4.5V; V = V or V I = 12mA  
IL; O  
0.35  
I
IH  
outputs  
Input leakage  
current  
I
= 5.5V; V = V or GND  
µA  
µA  
I
I
CC  
Quiescent supply  
current; SSI  
I
= 5.5V; V = V or GND; I = 0  
20.0  
40  
CC  
CC  
I
CC  
O
Additional  
quiescent supply  
current per input  
I  
CC  
V
CC  
= 2.7V to 3.6V; V = V – 0.6V  
500  
850  
µA  
I
CC  
NOTE:  
1. All typical values are measured at T  
= 25°C.  
amb  
TRANSFER CHARACTERISTICS  
Voltages are referenced to GND = 0V.  
LIMITS  
–40 to +85°C  
CONDITION  
(V)  
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
–40 to +125°C  
1
V
MIN  
TYP  
MAX  
MIN  
MAX  
CC  
1.2  
2.0  
2.7  
3.0  
3.6  
4.5  
5.5  
1.2  
2.0  
2.7  
3.0  
3.6  
4.5  
5.5  
1.2  
2.0  
2.7  
3.0  
3.6  
4.5  
5.5  
0.70  
1.10  
1.45  
1.60  
1.95  
2.50  
3.00  
0.34  
0.65  
0.90  
1.05  
1.30  
1.60  
2.00  
0.30  
0.55  
0.60  
0.65  
0.70  
0.80  
1.00  
0.8  
1.0  
1.2  
1.5  
1.7  
2.1  
1.4  
2.0  
2.2  
2.4  
3.2  
3.9  
0.8  
1.0  
1.2  
1.5  
1.7  
2.1  
1.4  
2.0  
2.2  
2.4  
3.2  
3.9  
Positive going  
threshold  
Figures  
1 and 2  
V
V
T+  
0.3  
0.4  
0.6  
0.8  
0.9  
1.2  
0.9  
1.4  
1.5  
1.8  
2.0  
2.6  
0.3  
0.4  
0.6  
0.8  
0.9  
1.2  
0.9  
1.4  
1.5  
1.8  
2.0  
2.6  
Negative going  
threshold  
Figures  
1 and 2  
V
V
T–  
0.2  
0.3  
0.4  
0.4  
0.4  
0.6  
0.8  
1.1  
1.2  
1.2  
1.4  
1.5  
0.2  
0.3  
0.4  
0.4  
0.4  
0.6  
0.8  
1.1  
1.2  
1.2  
1.4  
1.5  
Hysteresis  
Figures  
1 and 2  
V
V
H
(V – V  
)
T+  
T–  
NOTE:  
1. Unless otherwise stated, all typical values are at T  
= 25°C.  
amb  
5
1998 Apr 28  
Philips Semiconductors  
Product specification  
Quad 2-input NAND Schmitt-trigger  
74LV132  
AC CHARACTERISTICS  
GND = 0V; t = t = 2.5ns; C = 50pF  
r
f
L
LIMITS  
–40 to +85°C  
CONDITION  
(V)  
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
–40 to +125°C  
1
V
CC  
MIN  
TYP  
MAX  
MIN  
MAX  
1.2  
2.0  
2.7  
65  
18  
34  
24  
20  
14  
43  
30  
25  
17  
Propagation delay  
nA, nB, to nY  
t
t
Figure 6  
ns  
15  
PHL/ PLH  
2
3.0 to 3.6  
4.5 to 5.5  
12  
2
9.0  
NOTES:  
1. Unless otherwise stated, all typical values are at T  
= 25°C.  
amb  
2. Typical value measured at V = 3.3V.  
CC  
3. Typical value measured at V = 5.0V.  
CC  
TRANSFER CHARACTERISTIC WAVEFORMS  
10  
V
O
I
CC  
A)  
8
6
4
2
0
V
H
V
V
0
0.3  
0.6  
0.9  
1.2  
T+  
T–  
V
(V)  
IN  
SV00218  
SV00222  
Figure 1. Transfer characteristic.  
Figure 3. Typical LV132 transfer characteristics; V = 1.2V.  
CC  
100  
V
T+  
I
CC  
A)  
V
V
I
V
M
V
T–  
80  
60  
40  
O
SV00220  
Figure 2. Definition of V , V and V ; where V and V are  
T+  
T–  
H
T+  
T–  
between limits of 20% and 70%.  
20  
0
0.4  
0.8  
1.2  
1.6  
2.0  
0
V
(V)  
IN  
SV00224  
Figure 4. Typical LV132 transfer characteristics; V = 2.0V.  
CC  
6
1998 Apr 28  
Philips Semiconductors  
Product specification  
Quad 2-input NAND Schmitt-trigger  
74LV132  
TRANSFER CHARACTERISTIC WAVEFORMS  
(Continued)  
TEST CIRCUIT  
V
cc  
250  
V
V
O
l
I
CC  
PULSE  
GENERATOR  
A)  
D.U.T.  
50pF  
200  
R = 1k  
L
R
T
C
L
150  
100  
Test Circuit for Outputs  
DEFINITIONS  
R
L
C
L
R
T
= Load resistor  
= Load capacitance includes jig and probe capacitiance  
= Termination resistance should be equal to Z of pulse generators.  
OUT  
TEST  
V
V
I
CC  
50  
0
t
t
< 2.7V  
2.7–3.6V  
4.5 V  
V
CC  
PLH/ PHL  
2.7V  
V
CC  
1.8  
(V)  
1.2  
2.4  
3.0  
0
0.6  
V
IN  
SV00902  
SV00225  
Figure 7.Load circuitry for switching times.  
Figure 5. Typical LV132 transfer characteristics; V = 3.0V.  
CC  
AC WAVEFORMS  
V
V
V
= 1.5V at V w 2.7V v 3.6V  
M
CC  
= 0.5V * V at V t 2.7V and w 4.5V  
M
CC  
CC  
and V are the typical output voltage drop that occur with the  
OL  
OH  
output load.  
V
CC  
nA, nB INPUT  
GND  
V
V
M
M
t
t
PLH  
PHL  
V
OH  
nY OUTPUT  
V
M
V
OL  
SV00219  
Figure 6. Input (nA, nB) to output (nY) propagation delays.  
7
1998 Apr 28  
Philips Semiconductors  
Product specification  
Quad 2-input NAND Schmitt-trigger  
74LV132  
DIP14: plastic dual in-line package; 14 leads (300 mil)  
SOT27-1  
8
1998 Apr 28  
Philips Semiconductors  
Product specification  
Quad 2-input NAND Schmitt-trigger  
74LV132  
SO14: plastic small outline package; 14 leads; body width 3.9 mm  
SOT108-1  
9
1998 Apr 28  
Philips Semiconductors  
Product specification  
Quad 2-input NAND Schmitt-trigger  
74LV132  
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm  
SOT337-1  
10  
1998 Apr 28  
Philips Semiconductors  
Product specification  
Quad 2-input NAND Schmitt-trigger  
74LV132  
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm  
SOT402-1  
11  
1998 Apr 28  
Philips Semiconductors  
Product specification  
Quad 2-input NAND Schmitt-trigger  
74LV132  
Data sheet status  
[1]  
Data sheet  
status  
Product  
status  
Definition  
Objective  
specification  
Development  
This data sheet contains the design target or goal specifications for product development.  
Specification may change in any manner without notice.  
Preliminary  
specification  
Qualification  
This data sheet contains preliminary data, and supplementary data will be published at a later date.  
Philips Semiconductors reserves the right to make chages at any time without notice in order to  
improve design and supply the best possible product.  
Product  
specification  
Production  
This data sheet contains final specifications. Philips Semiconductors reserves the right to make  
changes at any time without notice in order to improve design and supply the best possible product.  
[1] Please consult the most recently issued datasheet before initiating or completing a design.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or  
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended  
periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips  
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or  
modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications  
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.  
RighttomakechangesPhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard  
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 1998  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
print code  
Date of release: 08-98  
9397-750-04422  
Document order number:  
Philips  
Semiconductors  

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QUADRUPLE 2-INPUT NAND GATES WITH SCHMITT TRIGGER INPUTS
DIODES

74LV132AS14-13

QUADRUPLE 2-INPUT NAND GATES WITH SCHMITT TRIGGER INPUTS
DIODES

74LV132AT14

QUADRUPLE 2-INPUT NAND GATES WITH SCHMITT TRIGGER INPUTS
DIODES

74LV132AT14-13

QUADRUPLE 2-INPUT NAND GATES WITH SCHMITT TRIGGER INPUTS
DIODES

74LV132BQ

Quad 2-input NAND Schmitt trigger
NXP

74LV132BQ

Quad 2-input NAND Schmitt triggerProduction
NEXPERIA

74LV132BQ,115

74LV132 - Quad 2-input NAND Schmitt trigger QFN 14-Pin
NXP

74LV132BQ-Q100

IC NAND GATE, Gate
NXP

74LV132BQ-Q100

Quad 2-input NAND Schmitt trigger
NEXPERIA

74LV132D

Quad 2-input NAND Schmitt-trigger
NXP