74HC564N,652 [NXP]
74HC564 - Octal D-type flip-flop; positive-edge trigger; 3-state; inverting DIP 20-Pin;
| 型号： | 74HC564N,652 |
| 厂家： | 
NXP |
| 描述： | 74HC564 - Octal D-type flip-flop; positive-edge trigger; 3-state; inverting DIP 20-Pin 驱动 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总18页 (文件大小：96K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74HC564
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
Rev. 03 — 11 November 2004
Product data sheet
1. General description
The 74HC564 is a high-speed Si-gate CMOS device and is pin compatible with low-power
Schottky TTL (LSTTL). The 74HC564 is specified in compliance with JEDEC
standard no. 7A.
The 74HC564 is a octal D-type flip-flop featuring separate D-type inputs for each flip-flop
and inverting 3-state outputs for bus oriented applications. A clock (CP) and an output
enable (OE) input are common to all flip-flops.
The 8 flip-flops will store the state of their individual D-inputs that meet the set-up and hold
times requirements on the LOW-to-HIGH CP transition. When OE is LOW, the contents of
the 8 flip-flops are available at the outputs. When OE is HIGH, the outputs go to the
high-impedance OFF-state. Operation of the OE input does not affect the state of the
flip-flops.
The 74HC564 is functionally identical to the 74HC574 but has inverting outputs. The
74HC564 is functionally identical to the 74HC534, but has a different pinning.
2. Features
■ 3-state inverting outputs for bus oriented applications
■ 8-bit positive-edge triggered register
■ Common 3-state output enable input
■ Independent register and 3-state buffer operation
■ Low-power dissipation
■ Complies with JEDEC standard no. 7A
■ ESD protection:
◆ HBM EIA/JESD22-A114-B exceeds 2000 V
◆ MM EIA/JESD22-A115-A exceeds 200 V.
■ Multiple package options
■ Specified from −40 °C to +80 °C and from −40 °C to +125 °C.
74HC564
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tPHL, tPLH
propagation delay CP CL = 15 pF;
-
15
-
ns
to Qn
V
CC = 5 V
CL = 15 pF;
CC = 5 V
fmax
maximum clock
frequency
-
127
-
MHz
V
CI
input capacitance
-
-
3.5
27
-
-
pF
pF
[1]
CPD
power dissipation
capacitance per
flip-flop
VI = GND to VCC
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
4. Ordering information
Table 2:
Ordering information
Type number
Package
Temperature range
−40 °C to +125 °C
−40 °C to +125 °C
Name
DIP20
SO20
Description
Version
74HC564N
74HC564D
plastic dual in-line package; 20 leads (300 mil) SOT146-1
plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
9397 750 13814
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
2 of 18
74HC564
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
5. Functional diagram
Q0
Q1
Q2
Q3
Q4
Q5
Q6
D0
D1
2
3
19
18
17
16
15
14
13
4 D2
D3
5
FF1 TO
FF8
3 STATE
OUTPUTS
6 D4
D5
7
8 D6
D7
Q7 12
9
11 CP
1 OE
001aab936
Fig 1. Functional diagram
1
EN
C1
11
11
CP
2
19
18
17
16
15
14
13
12
D0
D1
D2
D3
D4
D5
D6
D7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
2
3
4
5
6
7
8
9
19
18
17
16
15
14
13
12
3
4
5
6
7
8
9
1D
OE
1
001aab934
001aab935
Fig 2. Logic symbol
Fig 3. IEC logic symbol
9397 750 13814
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
3 of 18
74HC564
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
D7
D0
D1
D2
D3
D4
D5
D6
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CP
CP
CP
CP
CP
CP
CP
CP
FF
1
FF
2
FF
3
FF
4
FF
5
FF
6
FF
7
FF
8
CP
OE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
001aab937
Fig 4. Logic diagram
6. Pinning information
6.1 Pinning
1
2
20
19
18
17
16
15
14
13
12
11
OE
V
CC
D0
D1
Q0
3
Q1
Q2
Q3
Q4
Q5
Q6
Q7
CP
4
D2
5
D3
564
6
D4
7
D5
8
D6
9
D7
10
GND
001aab844
Fig 5. Pin configuration
9397 750 13814
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
4 of 18
74HC564
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
6.2 Pin description
Table 3:
Symbol
OE
Pin description
Pin
1
Description
3-state output enable input (active LOW)
data input 0
D0
2
D1
3
data input 1
D2
4
data input 2
D3
5
data input 3
D4
6
data input 4
D5
7
data input 5
D6
8
data input 6
D7
9
data input 7
GND
CP
10
11
12
13
14
15
16
17
18
19
20
ground (0 V)
clock input (LOW-to-HIGH, edge-triggered)
3-state flip-flop output 7
3-state flip-flop output 6
3-state flip-flop output 5
3-state flip-flop output 4
3-state flip-flop output 3
3-state flip-flop output 2
3-state flip-flop output 1
3-state flip-flop output 0
positive supply voltage
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
VCC
7. Functional description
7.1 Function table
Table 4:
Function table[1]
Operating mode
Input
OE
L
Internal
flip-flop
Output
CP
Dn
Qn
H
L
Load and read
register
↑
l
L
h
l
H
L
Load register and
disable output
H
↑
Z
h
H
Z
[1] H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition;
Z = high-impedance OFF-state;
↑ = LOW-to-HIGH clock transition.
9397 750 13814
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
5 of 18
74HC564
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
8. Limiting values
Table 5:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max Unit
VCC
IIK
supply voltage
−0.5 +7
V
input diode current
output diode current
VI < −0.5 V or VI > VCC + 0.5 V
-
-
±20
mA
mA
IOK
VO < −0.5 V or
VO > VCC + 0.5 V
±20
±35
±70
IO
output source or sink
current
VO = −0.5 V to VCC + 0.5 V
-
mA
ICC, IGND VCC or GND current
-
mA
Tstg
Ptot
storage temperature
power dissipation
DIP20 package
−65
+150 °C
[1]
[2]
-
-
750
500
mW
SO20 package
mW
[1] Above 70 °C: Ptot derates linearly with 12 mW/K.
[2] Above 70 °C: Ptot derates linearly with 8 mW/K.
9. Recommended operating conditions
Table 6:
Symbol
VCC
Recommended operating conditions
Parameter
Conditions
Min
Typ
Max
Unit
V
supply voltage
input voltage
output voltage
2.0
5.0
6.0
VI
0
-
VCC
VCC
1000
500
400
+125
V
VO
0
-
V
tr, tf
input rise and fall times VCC = 2.0 V
VCC = 4.5 V
-
-
ns
ns
ns
°C
-
6.0
VCC = 6.0 V
-
-
-
Tamb
ambient temperature
−40
9397 750 13814
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
6 of 18
74HC564
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
10. Static characteristics
Table 7:
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Tamb = 25 °C
VIH
Parameter
Conditions
Min Typ Max Unit
HIGH-level input voltage
VCC = 2.0 V
1.5 1.2
3.15 2.4
4.2 3.2
-
-
-
V
V
V
V
V
V
VCC = 4.5 V
VCC = 6.0 V
VIL
LOW-level input voltage
HIGH-level output voltage
VCC = 2.0 V
-
-
-
0.8 0.5
2.1 1.35
2.8 1.8
VCC = 4.5 V
VCC = 6.0 V
VOH
VI = VIH or VIL
IO = −20 µA; VCC = 2.0 V
IO = −20 µA; VCC = 4.5 V
IO = −20 µA; VCC = 6.0 V
IO = −6.0 mA; VCC = 4.5 V
IO = −7.8 mA; VCC = 6.0 V
VI = VIH or VIL
1.9 2.0
4.4 4.5
5.9 6.0
3.98 4.32
5.48 5.81
-
-
-
-
-
V
V
V
V
V
VOL
LOW-level output voltage
IO = 20 µA; VCC = 2.0 V
IO = 20 µA; VCC = 4.5 V
IO = 20 µA; VCC = 6.0 V
IO = 6.0 mA; VCC = 4.5 V
IO = 7.8 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
VI = VIH or VIL; VCC = 6.0 V; VO = VCC or GND
VI = VCC or GND; IO = 0 A; VCC = 6.0 V
-
-
-
-
-
-
-
-
-
0
0
0
0.1
0.1
0.1
V
V
V
V
V
0.15 0.26
0.16 0.26
ILI
input leakage current
3-state OFF-state current
quiescent supply current
input capacitance
-
±0.1 µA
±0.5 µA
IOZ
ICC
CI
-
-
8.0
-
µA
3.5
pF
Tamb = −40 °C to +85 °C
VIH HIGH-level input voltage
VCC = 2.0 V
1.5
-
-
-
-
-
-
-
V
V
V
V
V
V
VCC = 4.5 V
3.15
-
VCC = 6.0 V
4.2
-
VIL
LOW-level input voltage
HIGH-level output voltage
VCC = 2.0 V
-
-
-
0.5
1.35
1.8
VCC = 4.5 V
VCC = 6.0 V
VOH
VI = VIH or VIL
IO = −20 µA; VCC = 2.0 V
IO = −20 µA; VCC = 4.5 V
IO = −20 µA; VCC = 6.0 V
IO = −6.0 mA; VCC = 4.5 V
IO = −7.8 mA; VCC = 6.0 V
1.9
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
4.4
5.9
3.84
5.34
9397 750 13814
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
7 of 18
74HC564
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
Table 7:
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Typ Max Unit
VOL
LOW-level output voltage
VI = VIH or VIL
IO = 20 µA; VCC = 2.0 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
V
V
V
V
V
IO = 20 µA; VCC = 4.5 V
0.1
IO = 20 µA; VCC = 6.0 V
0.1
IO = 6.0 mA; VCC = 4.5 V
IO = 7.8 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
VI = VIH or VIL; VCC = 6.0 V; VO = VCC or GND
VI = VCC or GND; IO = 0 A; VCC = 6.0 V
0.33
0.33
ILI
input leakage current
±1.0 µA
±5.0 µA
IOZ
ICC
3-state OFF-state current
quiescent supply current
80
µA
Tamb = −40 °C to +125 °C
VIH HIGH-level input voltage
VCC = 2.0 V
1.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
VCC = 4.5 V
3.15
-
VCC = 6.0 V
4.2
-
VIL
LOW-level input voltage
HIGH-level output voltage
VCC = 2.0 V
-
-
-
0.5
1.35
1.8
VCC = 4.5 V
VCC = 6.0 V
VOH
VI = VIH or VIL
IO = −20 µA; VCC = 2.0 V
IO = −20 µA; VCC = 4.5 V
IO = −20 µA; VCC = 6.0 V
IO = −6.0 mA; VCC = 4.5 V
IO = −7.8 mA; VCC = 6.0 V
VI = VIH or VIL
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
VOL
LOW-level output voltage
IO = 20 µA; VCC = 2.0 V
IO = 20 µA; VCC = 4.5 V
IO = 20 µA; VCC = 6.0 V
IO = 6.0 mA; VCC = 4.5 V
IO = 7.8 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
VI = VIH or VIL; VCC = 6.0 V; VO = VCC or GND
VI = VCC or GND; IO = 0 A; VCC = 6.0 V
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
V
V
V
V
V
ILI
input leakage current
±1.0 µA
±10.0 µA
IOZ
ICC
3-state OFF-state current
quiescent supply current
160
µA
9397 750 13814
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
8 of 18
74HC564
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
11. Dynamic characteristics
Table 8:
Dynamic characteristics
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 9.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 25 °C
tPHL, tPLH propagation delay CP to Qn
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 5.0 V; CL = 15 pF
see Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 8
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 8
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 5.0 V; CL = 15 pF
-
-
-
-
50
18
14
15
165
33
28
-
ns
ns
ns
ns
tPZH, tPZL 3-state output enable time OE to Qn
tPHZ, tPLZ 3-state output disable time OE to Qn
tTHL, tTLH output transition time
-
-
-
44
16
13
140
28
ns
ns
ns
24
-
-
-
50
18
14
135
27
ns
ns
ns
23
-
-
-
14
5
60
12
10
ns
ns
ns
4
tW
CP clock pulse width HIGH or LOW
set-up time Dn to CP
80
16
14
14
5
-
-
-
ns
ns
ns
4
tsu
60
12
10
6
2
2
-
-
-
ns
ns
ns
th
hold time Dn to CP
5
5
5
0
0
0
-
-
-
ns
ns
ns
fmax
maximum clock frequency
6.0
30
35
-
38
-
-
-
-
-
MHz
MHz
MHz
MHz
pF
115
137
127
27
[1]
CPD
power dissipation capacitance per flip-flop VI = GND to VCC
-
9397 750 13814
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
9 of 18
74HC564
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
Table 8:
Dynamic characteristics …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 9.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Tamb = −40 °C to +85 °C
tPHL, tPLH propagation delay CP to Qn
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 8
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 8
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
-
-
-
-
-
-
205
41
ns
ns
ns
35
tPZH, tPZL 3-state output enable time OE to Qn
tPHZ, tPLZ 3-state output disable time OE to Qn
tTHL, tTLH output transition time
-
-
-
-
-
-
175
35
ns
ns
ns
30
-
-
-
-
-
-
170
34
ns
ns
ns
29
-
-
-
-
-
-
75
15
13
ns
ns
ns
tW
CP clock pulse width HIGH or LOW
set-up time Dn to CP
100
20
-
-
-
-
-
-
ns
ns
ns
17
tsu
75
15
13
-
-
-
-
-
-
ns
ns
ns
th
hold time Dn to CP
5
5
5
-
-
-
-
-
-
ns
ns
ns
fmax
maximum clock frequency
4.8
24
28
-
-
-
-
-
-
MHz
MHz
MHz
9397 750 13814
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
10 of 18
74HC564
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
Table 8:
Dynamic characteristics …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 9.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Tamb = −40 °C to +125 °C
tPHL, tPLH propagation delay CP to Qn
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 8
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 8
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
-
-
-
-
-
-
250
50
ns
ns
ns
43
tPZH, tPZL 3-state output enable time OE to Qn
tPHZ, tPLZ 3-state output disable time OE to Qn
tTHL, tTLH output transition time
-
-
-
-
-
-
210
42
ns
ns
ns
36
-
-
-
-
-
-
205
41
ns
ns
ns
35
-
-
-
-
-
-
90
18
15
ns
ns
ns
tW
CP clock pulse width HIGH or LOW
set-up time Dn to CP
120
24
-
-
-
-
-
-
ns
ns
ns
20
tsu
90
18
15
-
-
-
-
-
-
ns
ns
ns
th
hold time Dn to CP
5
5
5
-
-
-
-
-
-
ns
ns
ns
fmax
maximum clock frequency
4.0
20
24
-
-
-
-
-
-
MHz
MHz
MHz
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
9397 750 13814
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
11 of 18
74HC564
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
12. Waveforms
1/f
max
CP input
V
M
t
W
t
t
PLH
PHL
Qn output
V
M
t
t
THL
TLH
001aab938
VM = 0.5 × VI.
Fig 6. Waveforms showing the clock (CP) to output (Qn) propagation delays, the clock
pulse width, the output transition times and the maximum clock frequency
t
t
f
r
90 %
OE input
V
M
10 %
t
t
PLZ
PHZ
PZL
output
LOW to OFF
OFF to LOW
V
M
10 %
90 %
t
t
PZH
output
HIGH to OFF
OFF to HIGH
V
M
outputs
enabled
outputs
disabled
outputs
enabled
001aab940
VM = 0.5 × VI.
Fig 7. Waveforms showing the 3-state enable and disable times
9397 750 13814
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
12 of 18
74HC564
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
V
M
CP input
t
t
su
su
t
t
h
h
V
M
Dn input
Qn input
V
M
001aab939
The shaded areas indicate when the input is permitted to change for predictable output
performance.
VM = 0.5 × VI.
Fig 8. Waveforms showing the data set-up and hold times for the data input (Dn)
S
1
V
CC
open
GND
V
CC
R
L =
1000 Ω
V
V
O
I
PULSE
GENERATOR
D.U.T.
C
R
T
L
mna232
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse
generator.
Fig 9. Load circuitry for switching times
Table 9:
Supply
VCC
Test data
Input
VI
Load
CL
S1
tr = tf
6 ns
6 ns
6 ns
6 ns
RL
tPZL, tPLZ tPZH, tPHZ tPHL, tPLH
2.0 V
VCC
50 pF
50 pF
50 pF
15 pF
1 kΩ
1 kΩ
1 kΩ
1 kΩ
VCC
VCC
VCC
VCC
GND
GND
GND
GND
open
open
open
open
4.5 V
VCC
6.0 V
VCC
5.0 V
VCC
9397 750 13814
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
13 of 18
74HC564
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
13. Package outline
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
M
H
20
11
pin 1 index
E
1
10
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
Z
A
A
A
(1)
(1)
1
2
UNIT
mm
b
b
c
D
E
e
e
1
L
M
M
H
w
1
E
max.
min.
max.
max.
1.73
1.30
0.53
0.38
0.36
0.23
26.92
26.54
6.40
6.22
3.60
3.05
8.25
7.80
10.0
8.3
4.2
0.51
3.2
2.54
0.1
7.62
0.3
0.254
0.01
2
0.068
0.051
0.021
0.015
0.014
0.009
1.060
1.045
0.25
0.24
0.14
0.12
0.32
0.31
0.39
0.33
inches
0.17
0.02
0.13
0.078
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-13
SOT146-1
MS-001
SC-603
Fig 10. Package outline SOT146-1 (DIP20)
9397 750 13814
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
14 of 18
74HC564
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
y
H
E
v
M
A
Z
20
11
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
10
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
mm
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
2.65
0.1
0.25
0.01
1.27
0.05
1.4
0.25
0.01
0.25
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.51
0.014 0.009 0.49
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT163-1
075E04
MS-013
Fig 11. Package outline SOT163-1 (SO20)
9397 750 13814
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
15 of 18
74HC564
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
14. Revision history
Table 10: Revision history
Document ID
Release
date
Data sheet status
Change notice Doc. number
Supersedes
74HC564_3
20041111 Product data sheet
-
9397 750 13814 74HC_HCT564_CNV_2
Modifications:
• The format of this data sheet has been redesigned to comply with the current presentation
and information standard of Philips Semiconductors.
• Removed type number 74HCT564.
• Inserted family specification.
74HC_HCT564_CNV_2 19970905 Product specification
-
-
-
74HC_HCT564_1
-
74HC_HCT564_1
19901201 Product specification
-
9397 750 13814
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
16 of 18
74HC564
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
15. Data sheet status
Level Data sheet status[1] Product status[2] [3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
[2]
Please consult the most recently issued data sheet before initiating or completing a design.
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
16. Definitions
17. Disclaimers
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
18. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
9397 750 13814
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
17 of 18
74HC564
Philips Semiconductors
Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
19. Contents
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
7
7.1
8
Functional description . . . . . . . . . . . . . . . . . . . 5
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6
Recommended operating conditions. . . . . . . . 6
Static characteristics. . . . . . . . . . . . . . . . . . . . . 7
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 16
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 17
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Contact information . . . . . . . . . . . . . . . . . . . . 17
9
10
11
12
13
14
15
16
17
18
© Koninklijke Philips Electronics N.V. 2004
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights.
Date of release: 11 November 2004
Document number: 9397 750 13814
Published in The Netherlands
相关型号：
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