74HC123NB [NXP]
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| 型号： | 74HC123NB |
| 厂家： | 
NXP |
| 描述： | 暂无描述 振荡器 |
| 文件： | 总24页 (文件大小：148K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74HC123; 74HCT123
Dual retriggerable monostable multivibrator with reset
Rev. 05 — 13 July 2009
Product data sheet
1. General description
The 74HC123; 74HCT123 are high-speed Si-gate CMOS devices and are pin compatible
with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC123; 74HCT123 are dual retriggerable monostable multivibrators with output
pulse width control by three methods:
1. The basic pulse is programmed by selection of an external resistor (REXT) and
capacitor (CEXT).
2. Once triggered, the basic output pulse width may be extended by retriggering the
gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By
repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made
as long as desired. Alternatively an output delay can be terminated at any time by a
LOW-going edge on input nRD, which also inhibits the triggering.
3. An internal connection from nRD to the input gates makes it possible to trigger the
circuit by a HIGH-going signal at input nRD as shown in the function table.
Schmitt-trigger action in the nA and nB inputs, makes the circuit highly tolerant to slower
input rise and fall times.
The 74HC123; 74HCT123 are identical to the 74HC423; 74HCT423 but can be triggered
via the reset input.
2. Features
I DC triggered from active HIGH or active LOW inputs
I Retriggerable for very long pulses up to 100 % duty factor
I Direct reset terminates output pulse
I Schmitt-trigger action on all inputs except for the reset input
I ESD protection:
N HBM JESD22-A114E exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
I Specified from −40 °C to +85 °C and from −40 °C to +125 °C
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
Description
Version
74HC123N
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
DIP16
plastic dual in-line package; 16 leads (300 mil)
SOT38-4
74HCT123N
74HC123D
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
SOT338-1
SOT403-1
SOT763-1
74HCT123D
74HC123DB
74HCT123DB
74HC123PW
74HCT123PW
74HC123BQ
SSOP16
TSSOP16
plastic shrink small outline package; 16 leads;
body width 5.3 mm
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
DHVQFN16 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 16 terminals;
body 2.5 × 3.5 × 0.85 mm
4. Functional diagram
14
1CEXT
15
1REXT/CEXT
S
13
1Q
1Q
Q
Q
1
1A
T
4
2
3
1B
RD
1RD
6
7
2CEXT
2REXT/CEXT
S
5
2Q
2Q
Q
Q
9
2A
T
12
10
11
2B
RD
2RD
001aaa610
Fig 1. Functional diagram
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
2 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
14
CX
15
13
RCX
1
&
2
1CEXT 14
2CEXT
4
6
3
R
1REXT/CEXT 15
2REXT/CEXT
7
6
S
CX
1Q 13
7
5
Q
Q
RCX
2Q
5
1
9
1A
2A
9
T
&
10
1Q
4
2
1B
12
2Q 12
mna515
RD
10 2B
11
R
3
1RD
11
2RD
mna516
Fig 2. Logic symbol
Fig 3. IEC logic symbol
nREXT/CEXT
V
CC
nQ
nQ
nRD
R
R
CL
CL
V
CC
V
CC
R
CL
CL
CL
nA
nB
R
mna518
Fig 4. Logic diagram
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
3 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
5. Pinning information
5.1 Pinning
74HC123
terminal 1
index area
74HC123
74HCT123
2
3
4
5
6
7
15
14
13
12
11
10
1B
1RD
1REXT/CEXT
1CEXT
1Q
1A
1
2
3
4
5
6
7
8
16 V
CC
1Q
1B
1RD
15 1REXT/CEXT
14 1CEXT
13 1Q
2Q
2Q
1Q
(1)
CC
2CEXT
2REXT/CEXT
2RD
2B
V
2Q
12 2Q
2CEXT
2REXT/CEXT
GND
11 2RD
10 2B
001aaf046
9
2A
Transparent top view
001aaa698
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
supply pin or input.
Fig 5. Pin configuration for DIP16, SO16, SSOP16
and TSSOP16
Fig 6. Pin configuration for DHVQFN16
5.2 Pin description
Table 2.
Symbol
1A
Pin description
Pin
1
Description
negative-edge triggered input 1
positive-edge triggered input 1
direct reset LOW and positive-edge triggered input 1
active LOW output 1
1B
2
1RD
1Q
3
4
2Q
5
active HIGH output 2
2CEXT
6
external capacitor connection 2
external resistor and capacitor connection 2
ground (0 V)
2REXT/CEXT
7
GND
8
2A
9
negative-edge triggered input 2
positive-edge triggered input 2
direct reset LOW and positive-edge triggered input 2
active LOW output 2
2B
10
11
12
13
14
15
16
2RD
2Q
1Q
active HIGH output 1
1CEXT
1REXT/CEXT
VCC
external capacitor connection 1
external resistor and capacitor connection 1
supply voltage
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
4 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
6. Functional description
Table 3.
Function table[1]
Input
nRD
L
Output
nA
X
nB
X
nQ
nQ
H
L
X
H
X
X
L[2]
L[2]
H[2]
H[2]
X
L
H
L
↑
H
↓
H
H
↑
L
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; ↑ = LOW-to-HIGH transition; ↓ = HIGH-to-LOW transition;
= one HIGH level output pulse; = one LOW level output pulse.
[2] If the monostable was triggered before this condition was established, the pulse will continue as programmed.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
IIK
Parameter
Conditions
Min
Max
+7
Unit
V
supply voltage
−0.5
input clamping current
output clamping current
output current
VI < −0.5 V or VI > VCC + 0.5 V
VO < −0.5 V or VO > VCC + 0.5 V
-
-
-
±20
±20
±25
mA
mA
mA
IOK
IO
except for pins nREXT/CEXT;
VO = −0.5 V to (VCC + 0.5 V)
ICC
supply current
-
50
mA
mA
°C
IGND
Tstg
Ptot
ground current
-
−50
+150
storage temperature
total power dissipation
DIP16 package
−65
[1]
[2]
[3]
[3]
[4]
-
-
-
-
-
750
500
500
500
500
mW
mW
mW
mW
mW
SO16 package
SSOP16 package
TSSOP16 package
DHVQFN16 package
[1] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 °C.
[2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C.
[3] For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 °C.
[4] For DHVQFN16 package: Ptot derates linearly with 4.5 mW/K above 60 °C.
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
5 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Symbol Parameter
Conditions
74HC123
74HCT123
Unit
Min
2.0
0
Typ
Max
6.0
Min
4.5
0
Typ
Max
5.5
VCC
VI
supply voltage
input voltage
output voltage
5.0
5.0
V
V
V
-
-
VCC
VCC
-
-
VCC
VCC
VO
0
0
∆t/∆V
input transition rise and
fall rate
nRD input
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
-
-
625
139
83
-
-
-
ns/V
-
-
1.67
-
-
-
1.67
-
139 ns/V
ns/V
+125 °C
-
Tamb
ambient temperature
−40
+25
+125
−40
+25
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 °C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
74HC123
VIH
HIGH-level
input voltage
VCC = 2.0 V
1.5
1.2
2.4
3.2
0.8
-
-
1.5
-
-
1.5
-
-
V
V
V
V
V
V
VCC = 4.5 V
3.15
3.15
3.15
VCC = 6.0 V
4.2
-
4.2
-
4.2
-
VIL
LOW-level
input voltage
VCC = 2.0 V
-
-
-
0.5
-
-
-
0.5
1.35
1.8
-
-
-
0.5
1.35
1.8
VCC = 4.5 V
2.1 1.35
VCC = 6.0 V
2.8
1.8
VOH
HIGH-level
VI = VIH or VIL
output voltage
IO = −20 µA; VCC = 2.0 V
IO = −20 µA; VCC = 4.5 V
IO = −20 µA; VCC = 6.0 V
IO = −4 mA; VCC = 4.5 V
IO = −5.2 mA; VCC = 6.0 V
VI = VIH or VIL
1.9
4.4
5.9
2.0
4.5
6.0
-
-
-
-
-
1.9
4.4
-
-
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
5.9
3.98 4.32
5.48 5.81
3.84
5.34
VOL
LOW-level
output voltage
IO = 20 µA; VCC = 2.0 V
IO = 20 µA; VCC = 4.5 V
IO = 20 µA; VCC = 6.0 V
IO = 4 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
-
-
-
-
-
-
0
0
0
0.1
0.1
0.1
-
-
-
-
-
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
±1.0
V
V
0.1
V
0.15 0.26
0.16 0.26
0.33
0.33
±1.0
V
V
II
input leakage VI = VCC or GND; VCC = 6.0 V
current
-
±0.1
µA
ICC
supply current VI = VCC or GND; IO = 0 A;
-
-
8.0
-
80
-
160
µA
VCC = 6.0 V
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
6 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
Table 6.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 °C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
CI
input
-
3.5
-
-
-
-
-
pF
capacitance
74HCT123
VIH
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0
-
1.6
1.2
-
2.0
-
-
2.0
-
-
V
V
VIL
LOW-level
0.8
0.8
0.8
input voltage
VOH
HIGH-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = −20 µA
4.4
4.5
-
-
4.4
-
-
4.4
3.7
-
-
V
V
IO = −4 mA
3.98 4.32
3.84
VOL
LOW-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 µA
-
-
-
0
0.1
-
-
-
0.1
-
-
-
0.1
0.4
V
IO = 4.0 mA
0.15 0.26
0.33
±1.0
V
II
input leakage VI = VCC or GND; VCC = 5.5 V
current
-
±0.1
±1.0
µA
ICC
∆ICC
supply current VI = VCC or GND; IO = 0 A;
-
-
8.0
-
80
-
160
µA
V
CC = 5.5 V
per input pin; IO = 0 A;
supply current VI = VCC − 2.1 V;
other inputs at VCC or GND;
CC = 4.5 V to 5.5 V
additional
V
pins nA, nB
pin nRD
-
-
-
35
50
125
180
-
-
-
-
160
225
-
-
-
-
170
245
-
µA
µA
pF
CI
input
3.5
capacitance
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
7 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
10. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 12.
Symbol Parameter
Conditions
25 °C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
74HC123
[1]
tpd
propagation
delay
nRD, nA, nB to nQ or nQ;
C
R
EXT = 0 pF;
EXT = 5 kΩ;
see Figure 9
VCC = 2.0 V
-
-
-
-
83
30
26
24
255
51
-
-
-
-
-
320
64
-
-
-
-
-
385
77
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5 V; CL = 15 pF
VCC = 6.0 V
43
54
65
nRD (reset) to nQ or nQ;
C
R
EXT = 0 pF;
EXT = 5 kΩ;
see Figure 9
VCC = 2.0 V
-
-
-
-
66
24
20
19
215
43
-
-
-
-
-
270
54
-
-
-
-
-
325
65
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5 V; CL = 15 pF
VCC = 6.0 V
37
46
55
[1]
tt
output
see Figure 9
transition time
VCC = 2.0 V
-
-
-
19
7
75
15
13
-
-
-
95
19
16
-
-
-
110
22
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
6
19
tW
pulse width
nA LOW; see Figure 10
VCC = 2.0 V
100
20
8
3
2
-
-
-
125
25
-
-
-
150
30
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
17
21
26
nB HIGH; see Figure 10
VCC = 2.0 V
100
20
17
6
-
-
-
125
25
-
-
-
150
30
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
17
5
21
26
nRD LOW; see Figure 11
VCC = 2.0 V
100
20
14
5
-
-
-
125
25
-
-
-
150
30
-
-
-
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
17
4
21
26
[2]
nQ HIGH and nQ LOW;
VCC = 5.0 V;
see Figure 10 and 11
CEXT = 100 nF;
-
-
450
75
-
-
-
-
-
-
-
-
-
-
µs
R
EXT = 10 kΩ
CEXT = 0 pF;
EXT = 5 kΩ
ns
R
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
8 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
Table 7.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 12.
Symbol Parameter
Conditions
25 °C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
[3][4]
trtrig
retrigger time nA, nB; CEXT = 0 pF;
EXT = 5 kΩ; VCC = 5.0 V;
-
110
-
-
-
-
-
ns
R
see Figure 10
REXT
externaltiming see Figure 7
resistor
VCC = 2.0 V
10
2
-
-
-
1000
1000
-
-
-
-
-
-
-
-
-
-
-
-
-
kΩ
kΩ
pF
VCC = 5.0 V
[4]
[5]
CEXT
CPD
externaltiming VCC = 5.0 V; see Figure 7
capacitor
-
power
dissipation
capacitance
per monostable;
VI = GND to VCC
-
54
-
-
-
-
-
pF
74HCT123
tPHL HIGH to LOW nRD, nA, nB to nQ or nQ;
propagation
delay
CEXT = 0 pF; REXT =
5 kΩ; see Figure 9
VCC = 4.5 V
-
-
30
26
51
-
-
-
64
-
-
-
77
-
ns
ns
VCC = 5 V; CL = 15 pF
nRD (reset) to nQ or nQ;
C
R
EXT = 0 pF;
EXT = 5 kΩ;
see Figure 9
VCC = 4.5 V
-
-
27
23
46
-
-
-
58
-
-
-
69
-
ns
ns
VCC = 5 V; CL = 15 pF
tPLH
LOW to HIGH nRD, nA, nB to nQ or nQ;
propagation
delay
C
R
EXT = 0 pF;
EXT = 5 kΩ;
see Figure 9
VCC = 4.5 V
-
-
28
26
51
-
-
-
64
-
-
-
77
-
ns
ns
VCC = 5 V; CL = 15 pF
nRD (reset) to nQ or nQ;
C
EXT = 0 pF; REXT =
5 kΩ; see Figure 9
VCC = 4.5 V
-
-
-
23
23
7
46
-
-
-
-
58
-
-
-
-
69
-
ns
ns
ns
VCC = 5 V; CL = 15 pF
[1]
tt
output
VCC = 4.5 V; see Figure 9
15
19
22
transition time
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
9 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
Table 7.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 12.
Symbol Parameter
Conditions
25 °C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
tW
pulse width
VCC = 4.5 V
nA LOW; see Figure 10
nB HIGH; see Figure 10
nRD LOW; see Figure 11
nQ HIGH and nQ LOW;
20
20
20
3
5
7
-
-
-
25
25
25
-
-
-
30
30
30
-
-
-
ns
ns
ns
[2]
VCC = 5.0 V;
see Figure 10 and 11
CEXT = 100 nF;
-
-
-
450
75
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
µs
ns
ns
R
EXT = 10 kΩ
CEXT = 0 pF;
EXT = 5 kΩ
retrigger time nA, nB; CEXT = 0 pF;
EXT = 5 kΩ; VCC = 5.0 V;
R
[3][4]
trtrig
110
R
see Figure 10
REXT
CEXT
CPD
externaltiming VCC = 5.0 V; see Figure 7
resistor
2
-
-
-
1000
-
-
-
-
-
-
-
-
-
-
-
-
kΩ
pF
pF
[4]
[5]
externaltiming VCC = 5.0 V; see Figure 7
capacitor
-
-
power
dissipation
capacitance
per monostable;
VI = GND to VCC
-
56
[1] tpd is the same as tPHL and tPLH; tt is the same as tTHL and tTLH
[2] For other REXT and CEXT combinations see Figure 7. If CEXT > 10 nF, the next formula is valid.
tW = K × REXT × CEXT, where:
tW = typical output pulse width in ns;
REXT = external resistor in kΩ;
CEXT = external capacitor in pF;
K = constant = 0.45 for VCC = 5.0 V and 0.55 for VCC = 2.0 V.
The inherent test jig and pin capacitance at pins 15 and 7 (nREXT/CEXT) is approximately 7 pF.
[3] The time to retrigger the monostable multivibrator depends on the values of REXT and CEXT. The output pulse width will only be
extended when the time between the active-going edges of the trigger input pulses meets the minimum retrigger time. If CEXT >10 pF,
the next formula (at VCC = 5.0 V) for the setup time of a retrigger pulse is valid:
trtrig = 30 + 0.19 × REXT × CEXT0.9 + 13 × REXT1.05, where:
trtrig = retrigger time in ns;
CEXT = external capacitor in pF; REXT = external resistor in kΩ.
The inherent test jig and pin capacitance at pins 15 and 7 (nREXT/CEXT) is 7 pF.
[4] When the device is powered-up, initiate the device via a reset pulse, when CEXT < 50 pF.
[5] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + ∑(CL × VCC2 × fo) + 0.75 × CEXT × VCC2 × fo + D × 16 × VCC where:
fi = input frequency in MHz;
fo = output frequency in MHz;
D = duty factor in %;
CL = output load capacitance in pF;
VCC = supply voltage in V;
CEXT = timing capacitance in pF;
∑(CL × VCC2 × fo) sum of outputs.
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
10 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
001aaa611
001aaa612
6
10
0.8
t
W
'K' factor
0.6
(ns)
(1)
(2)
5
4
3
2
10
(3)
(4)
10
10
10
0.4
0.2
0
10
2
3
4
1
10
10
10
10
(pF)
0
2
4
6
8
C
EXT
V
(V)
CC
VCC = 5.0 V; Tamb = 25 °C.
CEXT = 10 nF; REXT = 10 kΩ to 100 kΩ.
Tamb = 25 °C.
(1) REXT = 100 kΩ
(2) REXT = 50 kΩ
(3) REXT = 10 kΩ
(4) REXT = 2 kΩ
Fig 7. Typical output pulse width as a function of the
external capacitor value
Fig 8. 74HC123 typical ‘K’ factor as function of VCC
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
11 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
11. Waveforms
V
I
V
nB input
GND
M
t
W
V
I
V
M
nA input
GND
t
W
V
I
V
M
nRD input
GND
t
t
t
PLH
PLH
W
V
OH
V
Y
nQ output
V
M
V
X
V
OL
t
t
t
PLH
THL
PHL
t
(reset)
W
t
W
V
OH
V
Y
nQ output
V
M
V
X
V
OL
t
t
t
t
t
PHL
PHL
PLH
PHL
001aaa771
TLH
(reset)
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 9. Propagation delays from inputs (nA, nB, nRD) to outputs (nQ, nQ) and output transition times
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
12 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
nB input
nA input
t
W
t
t
rtrig
W
nQ output
t
t
W
W
t
mna521
W
nRD = HIGH
Fig 10. Output pulse control using retrigger pulse
nB input
nRD input
t
W
nQ output
t
t
W
W
mna522
nA = LOW
Fig 11. Output pulse control using reset input nRD
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
13 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
V
CC
CC
V
V
O
I
R
L
S1
G
open
DUT
R
T
C
L
001aad983
Test data is given in Table 8.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 12. Test circuit for measuring switching times
Table 8.
Type
Test data
Input
VI
Load
S1 position
tPHL, tPLH
open
tr, tf
6 ns
6 ns
CL
RL
74HC123
VCC
3 V
15 pF, 50 pF
15 pF, 50 pF
1 kΩ
1 kΩ
74HCT123
open
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
14 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
12. Application information
12.1 Timing component connections
The basic output pulse width is essentially determined by the values of the external timing
components REXT and CEXT
.
C
EXT
R
EXT
(1)
V
CC
GND
8
nCEXT nREXT/CEXT
14 (6) 15 (7)
13 (5)
123
nQ
nQ
1 (9)
nA
nB
2 (10)
4 (12)
3 (11)
nRD
001aaa854
(1) For minimum noise generation it is recommended to ground pins 6 (2CEXT) and 14 (1CEXT)
externally to pin 8 (GND).
Fig 13. Timing component connections
12.2 Power-up considerations
When the monostable is powered-up it may produce an output pulse, with a pulse width
defined by the values of REXT and CEXT. This output pulse can be eliminated using the
circuit shown in Figure 14.
C
EXT
R
EXT
V
CC
GND
8
nCEXT
14 (6)
nREXT/CEXT
15 (7)
13 (5)
123
nQ
1 (9)
nA
nB
2 (10)
4 (12)
nQ
3 (11)
nRD
V
RESET
CC
001aaa613
Fig 14. Power-up output pulse elimination circuit
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
15 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
12.3 Power-down considerations
A large capacitor CEXT may cause problems when powering-down the monostable due to
the energy stored in this capacitor. When a system containing this device is
powered-down or a rapid decrease of VCC to zero occurs, the monostable may sustain
damage, due to the capacitor discharging through the input protection diodes. To avoid
this possibility, use a damping diode (DEXT) preferably a germanium or Schottky type
diode able to withstand large current surges and connect as shown in Figure 15.
D
EXT
C
EXT
R
EXT
V
CC
GND
8
nCEXT
14 (6)
nREXT/CEXT
15 (7)
13 (5)
123
nQ
1 (9)
nA
nB
2 (10)
4 (12)
nQ
3 (11)
001aaa614
nRD
Fig 15. Power-down protection circuit
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
16 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
13. Package outline
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-4
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
b
2
16
9
M
H
pin 1 index
E
1
8
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
A
A
2
(1)
(1)
Z
1
w
UNIT
mm
b
b
b
c
D
E
e
e
L
M
M
H
1
2
1
E
max.
min.
max.
max.
1.73
1.30
0.53
0.38
1.25
0.85
0.36
0.23
19.50
18.55
6.48
6.20
3.60
3.05
8.25
7.80
10.0
8.3
4.2
0.51
3.2
2.54
0.1
7.62
0.3
0.254
0.01
0.76
0.068 0.021 0.049 0.014
0.051 0.015 0.033 0.009
0.77
0.73
0.26
0.24
0.14
0.12
0.32
0.31
0.39
0.33
inches
0.17
0.02
0.13
0.03
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
95-01-14
03-02-13
SOT38-4
Fig 16. Package outline SOT38-4 (DIP16)
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
17 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.01
0.25
0.1
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.39
0.014 0.0075 0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig 17. Package outline SOT109-1 (SO16)
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
18 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
8
1
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.00
0.55
mm
2
0.25
0.65
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT338-1
MO-150
Fig 18. Package outline SOT338-1 (SSOP16)
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
19 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT403-1
MO-153
Fig 19. Package outline SOT403-1 (TSSOP16)
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
20 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
16 terminals; body 2.5 x 3.5 x 0.85 mm
SOT763-1
B
A
D
A
A
1
E
c
detail X
terminal 1
index area
C
terminal 1
index area
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
7
L
1
8
9
E
h
e
16
15
10
D
h
X
0
2.5
scale
5 mm
DIMENSIONS (mm are the original dimensions)
(1)
A
(1)
(1)
UNIT
A
b
c
E
e
e
1
y
D
D
E
L
v
w
y
1
1
h
h
max.
0.05 0.30
0.00 0.18
3.6
3.4
2.15
1.85
2.6
2.4
1.15
0.85
0.5
0.3
mm
0.05
0.1
1
0.2
0.5
2.5
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-10-17
03-01-27
SOT763-1
- - -
MO-241
- - -
Fig 20. Package outline SOT763-1 (DHVQFN16)
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
21 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
14. Abbreviations
Table 9.
Acronym
CMOS
DUT
Abbreviations
Abbreviation
Complementary Metal Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
LSTTL
MM
Low-power Schottky Transistor-Transistor Logic
Machine Model
15. Revision history
Table 10. Revision history
Document ID
74HC_HCT123_5
Modifications:
Release date
20090713
Data sheet status
Change notice
Supersedes
Product data sheet
-
74HC_HCT123_4
• The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
• Section 3 “Ordering information” and Section 13 “Package outline”, package version
SOT38-1 changed to SOT38-4
74HC_HCT123_4
20060616
20040511
19980708
Product data sheet
Product specification
Product specification
-
-
-
74HC_HCT123_3
74HC_HCT123_3
74HC_HCT123_CNV_2
-
74HC_HCT123_CNV_2
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
22 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
16.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74HC_HCT123_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 13 July 2009
23 of 24
74HC123; 74HCT123
NXP Semiconductors
Dual retriggerable monostable multivibrator with reset
18. Contents
1
2
3
4
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5
5.1
5.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
6
Functional description . . . . . . . . . . . . . . . . . . . 5
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended operating conditions. . . . . . . . 6
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
Dynamic characteristics . . . . . . . . . . . . . . . . . . 8
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7
8
9
10
11
12
Application information. . . . . . . . . . . . . . . . . . 15
Timing component connections . . . . . . . . . . . 15
Power-up considerations . . . . . . . . . . . . . . . . 15
Power-down considerations . . . . . . . . . . . . . . 16
12.1
12.2
12.3
13
14
15
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 22
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 22
16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 23
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 23
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 23
16.1
16.2
16.3
16.4
17
18
Contact information. . . . . . . . . . . . . . . . . . . . . 23
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 13 July 2009
Document identifier: 74HC_HCT123_5
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