74AUP1G74DC [NXP]
Low-power D-type flip-flop with set and reset; positive-edge trigger; 低功耗D类IP- FL佛罗里达州运与置位和复位;正边沿触发
| 型号： | 74AUP1G74DC |
| 厂家： | 
NXP |
| 描述： | Low-power D-type flip-flop with set and reset; positive-edge trigger |
| 文件： | 总23页 (文件大小：113K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74AUP1G74
Low-power D-type flip-flop with set and reset; positive-edge
trigger
Rev. 01 — 25 August 2006
Product data sheet
1. General description
The 74AUP1G74 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using IOFF
.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
The 74AUP1G74 provides the single positive-edge triggered D-type flip-flop with
individual data (D) input, clock (CP) input, set (SD) and reset (RD) inputs and
complementary Q and Q outputs. The set and reset are asynchronous active LOW inputs
and operate independently of the clock input. Information on the data input is transferred
to the Q output on the LOW-to-HIGH transition of the clock pulse. The D input must be
stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation.
2. Features
■ Wide supply voltage range from 0.8 V to 3.6 V
■ High noise immunity
■ Complies with JEDEC standards:
◆ JESD8-12 (0.8 V to 1.3 V)
◆ JESD8-11 (0.9 V to 1.65 V)
◆ JESD8-7 (1.2 V to 1.95 V)
◆ JESD8-5 (1.8 V to 2.7 V)
◆ JESD8-B (2.7 V to 3.6 V)
■ ESD protection:
◆ HBM JESD22-A114-D Class 3A exceeds 5000 V
◆ MM JESD22-A115-A exceeds 200 V
◆ CDM JESD22-C101-C exceeds 1000 V
■ Low static power consumption; ICC = 0.9 µA (maximum)
■ Latch-up performance exceeds 100 mA per JESD 78 Class II
■ Inputs accept voltages up to 3.6 V
■ Low noise overshoot and undershoot < 10 % of VCC
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
■ IOFF circuitry provides partial Power-down mode operation
■ Multiple package options
■ Specified from −40 °C to +85 °C and −40 °C to +125 °C
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
Description
Version
74AUP1G74DC
74AUP1G74GT
74AUP1G74GM
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
VSSOP8
XSON8
XQFN8
plastic very thin shrink small outline package; 8 leads; SOT765-1
body width 2.3 mm
plastic extremely thin small outline package; no leads; SOT833-1
8 terminals; body 1 × 1.95 × 0.5 mm
plastic extremely thin quad flat package; no leads; 8
SOT902-1
terminals; body 1.6 × 1.6 × 0.5 mm
4. Marking
Table 2.
Marking
Type number
Marking code
74AUP1G74DC
74AUP1G74GT
74AUP1G74GM
p74
p74
p74
5. Functional diagram
7
SD
SD
Q
Q
5
3
2
1
D
D
Q
Q
CP
CP
7
S
FF
5
3
1
2
6
C1
RD
1D
R
RD
6
mnb139
mnb140
Fig 1. Logic symbol
Fig 2. IEC logic symbol
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
2 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
Q
C
C
C
C
C
D
Q
C
RD
SD
CP
001aae087
C
C
Fig 3. Logic diagram
6. Pinning information
6.1 Pinning
74AUP1G74
1
2
3
4
8
7
6
5
CP
D
V
CC
SD
RD
Q
Q
GND
001aae322
Fig 4. Pin configuration SOT765-1 (VSSOP8)
74AUP1G74
terminal 1
index area
74AUP1G74
SD
1
CP
D
1
2
3
4
8
7
6
5
V
CC
7
6
5
CP
D
SD
RD
Q
RD
Q
2
3
Q
Q
GND
001aae324
001aae323
Transparent top view
Transparent top view
Fig 5. Pin configuration SOT833-1 (XSON8)
Fig 6. Pin configuration SOT902-1 (XQFN8)
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
3 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
6.2 Pin description
Table 3.
Symbol
Pin description
Pin
Description
SOT765-1 and SOT833-1
SOT902-1
CP
D
1
2
3
4
5
6
7
8
7
6
5
4
3
2
1
8
clock input (LOW-to-HIGH, edge triggered)
data input
Q
complement flip-flop output
ground (0 V)
GND
Q
true flip-flop output
RD
SD
VCC
asynchronous reset-direct (active LOW)
asynchronous set-direct (active LOW)
supply voltage
7. Functional description
Table 4.
Asynchronous operation[1]
Input
SD
L
Output
RD
H
CP
X
D
X
X
X
Q
H
L
Q
L
H
L
X
H
H
L
L
X
H
Table 5.
Input
SD
Synchronous operation[1]
Output
RD
H
CP
D
L
Qn+1
L
Qn+1
H
H
↑
↑
H
H
H
H
L
[1] H = HIGH voltage level;
L = LOW voltage level;
↑ = LOW-to-HIGH CP transition;
X = don’t care.
8. Limiting values
Table 6.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
IIK
Parameter
Conditions
Min
Max
+4.6
−50
+4.6
−50
+4.6
±20
+50
Unit
V
supply voltage
input clamping current
input voltage
−0.5
VI < 0 V
-
mA
V
[1]
[1]
VI
−0.5
IOK
output clamping current
output voltage
VO < 0 V
-
mA
V
VO
Active mode and Power-down mode
VO = 0 V to VCC
−0.5
IO
output current
-
-
mA
mA
ICC
supply current
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
4 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
Table 6.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
IGND
Parameter
Conditions
Min
Max
−50
Unit
mA
°C
ground current
-
Tstg
storage temperature
total power dissipation
−65
+150
250
[2]
Ptot
Tamb = −40 °C to +125 °C
-
mW
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For VSSOP8 packages: above 110 °C the value of Ptot derates linearly with 8.0 mW/K.
For XSON8 and XQFN8 packages: above 45 °C the value of Ptot derates linearly with 2.4 mW/K.
9. Recommended operating conditions
Table 7.
Symbol
VCC
Recommended operating conditions
Parameter
Conditions
Min
0.8
0
Max
3.6
Unit
V
supply voltage
input voltage
output voltage
VI
3.6
V
VO
Active mode
0
VCC
3.6
V
Power-down mode; VCC = 0 V
0
V
Tamb
ambient temperature
−40
0
+125
200
°C
ns/V
∆t/∆V
input transition rise and fall rate VCC = 0.8 V to 3.6 V
10. Static characteristics
Table 8.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 25 °C
VIH
HIGH-level input voltage
VCC = 0.8 V
0.70 × VCC
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
VCC = 0.9 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 0.8 V
0.65 × VCC
-
1.6
-
2.0
-
VIL
LOW-level input voltage
-
-
-
-
0.30 × VCC
0.35 × VCC
0.7
VCC = 0.9 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
0.9
VOH
HIGH-level output voltage VI = VIH or VIL
IO = −20 µA; VCC = 0.8 V to 3.6 V
V
CC − 0.1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
IO = −1.1 mA; VCC = 1.1 V
IO = −1.7 mA; VCC = 1.4 V
IO = −1.9 mA; VCC = 1.65 V
IO = −2.3 mA; VCC = 2.3 V
IO = −3.1 mA; VCC = 2.3 V
IO = −2.7 mA; VCC = 3.0 V
IO = −4.0 mA; VCC = 3.0 V
0.75 × VCC
1.11
1.32
2.05
1.9
2.72
2.6
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
5 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
Table 8.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Max
Unit
VOL
LOW-level output voltage
VI = VIH or VIL
IO = 20 µA; VCC = 0.8 V to 3.6 V
IO = 1.1 mA; VCC = 1.1 V
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
IO = 2.3 mA; VCC = 2.3 V
IO = 3.1 mA; VCC = 2.3 V
IO = 2.7 mA; VCC = 3.0 V
IO = 4.0 mA; VCC = 3.0 V
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
V
0.3 × VCC
0.31
0.31
0.31
0.44
0.31
0.44
±0.1
±0.2
±0.2
V
V
V
V
V
V
V
II
input leakage current
µA
µA
µA
IOFF
∆IOFF
power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V
additional power-off
leakage current
VI or VO = 0 V to 3.6 V;
CC = 0 V to 0.2 V
V
ICC
supply current
VI = GND or VCC; IO = 0 A;
CC = 0.8 V to 3.6 V
-
-
-
-
0.5
40
µA
µA
V
[1]
∆ICC
additional supply current
VI = VCC − 0.6 V; IO = 0 A;
CC = 3.3 V; per pin
V
CI
input capacitance
output capacitance
VCC = 0 V to 3.6 V; VI = GND or VCC
VO = GND; VCC = 0 V
-
-
0.6
1.3
-
-
pF
pF
CO
Tamb = −40 °C to +85 °C
VIH HIGH-level input voltage
VCC = 0.8 V
0.70 × VCC
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
VCC = 0.9 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 0.8 V
0.65 × VCC
-
1.6
-
2.0
-
VIL
LOW-level input voltage
-
-
-
-
0.30 × VCC
0.35 × VCC
0.7
VCC = 0.9 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
0.9
VOH
HIGH-level output voltage VI = VIH or VIL
IO = −20 µA; VCC = 0.8 V to 3.6 V
V
CC − 0.1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
IO = −1.1 mA; VCC = 1.1 V
IO = −1.7 mA; VCC = 1.4 V
IO = −1.9 mA; VCC = 1.65 V
IO = −2.3 mA; VCC = 2.3 V
IO = −3.1 mA; VCC = 2.3 V
IO = −2.7 mA; VCC = 3.0 V
IO = −4.0 mA; VCC = 3.0 V
0.7 × VCC
1.03
1.30
1.97
1.85
2.67
2.55
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
6 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
Table 8.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Max
Unit
VOL
LOW-level output voltage
VI = VIH or VIL
IO = 20 µA; VCC = 0.8 V to 3.6 V
IO = 1.1 mA; VCC = 1.1 V
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
IO = 2.3 mA; VCC = 2.3 V
IO = 3.1 mA; VCC = 2.3 V
IO = 2.7 mA; VCC = 3.0 V
IO = 4.0 mA; VCC = 3.0 V
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1
V
0.3 × VCC
0.37
0.35
0.33
0.45
0.33
0.45
±0.5
±0.5
±0.6
V
V
V
V
V
V
V
II
input leakage current
µA
µA
µA
IOFF
∆IOFF
power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V
additional power-off
leakage current
VI or VO = 0 V to 3.6 V;
CC = 0 V to 0.2 V
V
ICC
supply current
VI = GND or VCC; IO = 0 A;
CC = 0.8 V to 3.6 V
-
-
-
-
0.9
50
µA
µA
V
[1]
∆ICC
additional supply current
VI = VCC − 0.6 V; IO = 0 A;
CC = 3.3 V; per pin
V
Tamb = −40 °C to +125 °C
VIH HIGH-level input voltage
VCC = 0.8 V
0.75 × VCC
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
VCC = 0.9 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 0.8 V
0.70 × VCC
-
1.6
-
2.0
-
VIL
LOW-level input voltage
-
-
-
-
0.25 × VCC
0.30 × VCC
0.7
VCC = 0.9 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
0.9
VOH
HIGH-level output voltage VI = VIH or VIL
IO = −20 µA; VCC = 0.8 V to 3.6 V
V
CC − 0.11 -
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
IO = −1.1 mA; VCC = 1.1 V
IO = −1.7 mA; VCC = 1.4 V
IO = −1.9 mA; VCC = 1.65 V
IO = −2.3 mA; VCC = 2.3 V
IO = −3.1 mA; VCC = 2.3 V
IO = −2.7 mA; VCC = 3.0 V
IO = −4.0 mA; VCC = 3.0 V
0.6 × VCC
0.93
1.17
1.77
1.67
2.40
2.30
-
-
-
-
-
-
-
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
7 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
Table 8.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ
Max
Unit
VOL
LOW-level output voltage
VI = VIH or VIL
IO = 20 µA; VCC = 0.8 V to 3.6 V
IO = 1.1 mA; VCC = 1.1 V
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
IO = 2.3 mA; VCC = 2.3 V
IO = 3.1 mA; VCC = 2.3 V
IO = 2.7 mA; VCC = 3.0 V
IO = 4.0 mA; VCC = 3.0 V
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.11
V
0.33 × VCC
0.41
V
V
0.39
V
0.36
V
0.50
V
0.36
V
0.50
V
II
input leakage current
±0.75
±0.75
±0.75
µA
µA
µA
IOFF
∆IOFF
power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V
additional power-off
leakage current
VI or VO = 0 V to 3.6 V;
CC = 0 V to 0.2 V
V
ICC
supply current
VI = GND or VCC; IO = 0 A;
CC = 0.8 V to 3.6 V
-
-
-
-
1.4
75
µA
µA
V
[1]
∆ICC
additional supply current
VI = VCC − 0.6 V; IO = 0 A;
CC = 3.3 V; per pin
V
[1] One input at VCC − 0.6 V, other input at VCC or GND.
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
8 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
11. Dynamic characteristics
Table 9.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter
Conditions
25 °C
−40 °C to +125 °C
Unit
Min Typ[1] Max Min
Max
Min
Max
(85 °C)
(125 °C)
CL = 5 pF
[2]
[2]
[2]
tpd
propagation
delay
CP to Q, Q; see Figure 7
VCC = 0.8 V
-
25.4
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
SD to Q, Q; see Figure 8
VCC = 0.8 V
2.9
2.4
1.9
1.7
1.5
6.7 14.0 2.6
14.2
8.3
6.5
4.3
3.3
2.6
2.3
1.7
1.4
1.2
14.2
8.6
6.8
4.6
3.5
4.5
3.5
2.6
2.2
7.6
5.7
3.7
3.0
2.3
1.7
1.4
1.2
-
19.6
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
RD to Q, Q; see Figure 8
VCC = 0.8 V
2.7
2.4
2.0
1.9
1.8
5.6 11.0 2.5
11.4
6.9
5.6
3.8
3.5
2.5
2.2
1.7
1.7
1.5
11.5
7.3
5.9
4.1
3.7
4.0
3.3
2.7
2.5
6.3
4.9
3.6
3.1
2.2
1.7
1.7
1.5
-
19.2
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
CP; see Figure 8
2.6
2.3
1.9
1.9
1.8
5.5 11.0 2.5
11.3
6.8
5.6
4.0
3.8
2.5
2.2
1.8
1.7
1.5
11.4
7.2
5.9
4.3
4.0
3.9
3.2
2.6
2.4
6.3
5.0
3.6
3.2
2.2
1.8
1.7
1.5
fmax
maximum
frequency
VCC = 0.8 V
-
-
-
-
-
-
53
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MHz
MHz
MHz
MHz
MHz
MHz
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
203
347
435
550
619
170
310
400
490
550
170
300
390
480
510
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
9 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
Table 9.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter
Conditions
25 °C
−40 °C to +125 °C
Unit
Min Typ[1] Max Min
Max
Min
Max
(85 °C)
(125 °C)
CL = 10 pF
[2]
[2]
[2]
tpd
propagation
delay
CP to Q, Q; see Figure 7
VCC = 0.8 V
-
28.9
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
SD to Q, Q; see Figure 8
VCC = 0.8 V
3.1
2.7
2.5
2.0
1.8
7.5 15.8 2.9
16.1
9.4
7.2
4.9
4.0
2.9
2.4
2.2
1.8
1.6
16.1
9.8
7.6
5.3
4.3
5.1
4.1
3.2
2.8
8.7
6.5
4.3
3.7
2.4
2.2
1.8
1.6
-
23.2
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
RD to Q, Q; see Figure 8
VCC = 0.8 V
2.9
2.7
2.6
2.3
2.2
6.5 12.9 2.8
13.3
7.9
6.3
4.6
4.0
2.8
2.3
2.3
2.0
1.9
13.5
8.3
6.6
4.9
4.2
4.6
3.9
3.2
3.0
7.5
5.6
4.2
3.7
2.3
2.3
2.0
1.9
-
22.7
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
CP; see Figure 8
2.8
2.6
2.5
2.2
2.0
6.4 12.8 2.7
13.2
8.1
6.3
4.6
4.6
2.7
2.3
2.3
2.0
1.9
13.4
8.4
6.7
5.0
4.8
4.5
3.3
3.2
2.9
7.5
5.8
4.2
3.9
2.3
2.3
2.0
1.9
fmax
maximum
frequency
VCC = 0.8 V
-
-
-
-
-
-
52
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MHz
MHz
MHz
MHz
MHz
MHz
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
192
324
421
486
550
150
280
310
370
410
150
230
250
360
360
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
10 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
Table 9.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter
Conditions
25 °C
−40 °C to +125 °C
Unit
Min Typ[1] Max Min
Max
Min
Max
(85 °C)
(125 °C)
CL = 15 pF
[2]
[2]
[2]
tpd
propagation
delay
CP to Q, Q; see Figure 7
VCC = 0.8 V
-
23.4
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
SD to Q, Q; see Figure 8
VCC = 0.8 V
3.5
3.2
2.7
2.4
2.2
8.3 17.6 3.3
17.8
10.5
8.1
3.3
2.8
2.5
2.2
2.0
18.0
11.1
8.6
5.6
4.6
3.6
3.2
9.5
7.2
5.0
4.1
2.8
2.5
2.2
2.0
5.6
6.0
4.6
4.9
-
26.7
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
RD to Q, Q; see Figure 8
VCC = 0.8 V
3.3
3.2
2.8
2.8
2.5
7.3 14.7 3.1
15.2
9.0
7.1
5.3
4.7
3.1
2.9
2.5
2.2
2.4
15.4
9.5
7.5
5.6
4.9
5.2
4.3
3.7
3.5
8.3
6.4
4.8
4.3
2.9
2.5
2.2
2.4
-
26.1
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
CP; see Figure 8
3.2
3.1
2.7
2.6
2.4
7.2 14.5 3.1
15.0
9.2
7.3
5.4
5.2
3.1
2.7
2.6
2.4
2.3
15.2
9.7
7.7
5.8
5.4
5.1
4.3
3.6
3.4
8.4
6.5
4.9
4.4
2.7
2.6
2.4
2.3
fmax
maximum
frequency
VCC = 0.8 V
-
-
-
-
-
-
50
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MHz
MHz
MHz
MHz
MHz
MHz
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
181
301
407
422
481
120
190
240
300
320
120
160
190
270
300
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
11 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
Table 9.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter
Conditions
25 °C
−40 °C to +125 °C
Unit
Min Typ[1] Max Min
Max
Min
Max
(85 °C)
(125 °C)
CL = 30 pF
[2]
[2]
[2]
tpd
propagation
delay
CP to Q, Q; see Figure 7
VCC = 0.8 V
-
42.7
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
SD to Q, Q; see Figure 8
VCC = 0.8 V
4.2 10.6 22.5 4.0
23.0
12.0
9.2
4.0
3.7
3.4
3.0
2.8
23.3
14.0
11.0
7.5
3.7
3.5
3.3
3.0
7.2 12.0 3.7
5.8
4.7
4.3
9.2
6.3
5.3
3.4
3.0
2.8
7.5
5.3
6.7
-
37.0
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
RD to Q, Q; see Figure 8
VCC = 0.8 V
4.0
3.8
3.7
3.7
3.4
9.5 19.8 3.8
6.7 10.9 3.7
20.8
12.0
9.3
3.8
3.7
3.5
3.2
3.1
21.1
12.7
9.9
5.6
4.8
4.6
8.4
6.1
5.6
3.5
3.2
3.1
6.7
7.1
6.4
6.7
-
36.4
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
CP; see Figure 8
3.9
3.6
3.5
3.5
3.3
9.4 19.5 3.8
6.6 10.9 3.7
20.2
12.0
9.5
3.8
3.7
3.5
3.2
3.1
20.5
12.6
10.1
7.4
5.5
4.7
4.4
8.5
6.3
5.7
3.5
3.2
3.1
6.9
6.7
7.0
fmax
maximum
frequency
VCC = 0.8 V
-
-
-
-
-
-
28
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MHz
MHz
MHz
MHz
MHz
MHz
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
128
206
262
269
309
70
70
120
150
190
200
110
120
170
190
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
12 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
Table 9.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter
Conditions
25 °C
−40 °C to +125 °C
Unit
Min Typ[1] Max Min
Max
Min
Max
(85 °C)
(125 °C)
CL = 5 pF, 10 pF, 15 pF and 30 pF
tsu
set-up time
D to CP HIGH;
see Figure 7
VCC = 0.8 V
-
-
-
-
-
-
3.4
0.6
0.3
0.4
0.2
0.3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
1.1
0.9
0.8
0.6
0.5
1.1
0.9
0.8
0.6
0.5
D to CP LOW;
see Figure 7
VCC = 0.8 V
-
-
-
-
-
-
3.0
0.5
0.3
0.4
0.5
0.6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
D to CP; see Figure 7
VCC = 0.8 V
1.3
1.1
1.0
0.9
0.9
1.3
1.1
1.0
0.9
0.9
th
hold time
-
-
-
-
-
-
−1.9
−0.3
−0.2
−0.2
−0.2
−0.2
-
-
-
-
-
-
-
0.2
0
-
-
-
-
-
-
-
0.2
0
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
RD; see Figure 8
0
0
0
0
0
0
trec
recovery time
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
SD; see Figure 8
-
-
-
-
-
−0.5
−0.2
−0.2
−0.1
−0.1
-
-
-
-
-
−0.3
−0.2
−0.1
0.1
-
-
-
-
-
−0.3
−0.2
−0.1
0.1
-
-
-
-
-
ns
ns
ns
ns
ns
0.1
0.1
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
-
-
-
-
-
−0.5
−0.4
−0.3
−0.2
−0.1
-
-
-
-
-
0
0
-
-
-
-
-
0
0
-
-
-
-
-
ns
ns
ns
ns
ns
0
0
0.2
0.2
0.2
0.2
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
13 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
Table 9.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter
Conditions
25 °C
−40 °C to +125 °C
Unit
Min Typ[1] Max Min
Max
Min
Max
(85 °C)
(125 °C)
tW
pulse width
CP HIGH or LOW;
see Figure 7
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
-
-
-
-
-
1.7
1.1
0.7
0.6
0.5
-
-
-
-
-
2.6
1.5
1.6
1.7
1.9
-
-
-
-
-
2.6
1.5
1.6
1.7
1.9
-
-
-
-
-
ns
ns
ns
ns
ns
SD or RD LOW;
see Figure 8
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
-
-
-
-
-
1.9
1.1
0.8
0.5
0.4
-
-
-
-
-
2.9
1.5
1.1
0.7
0.5
-
-
-
-
-
3.1
1.7
1.3
0.9
0.7
-
-
-
-
-
ns
ns
ns
ns
ns
[3]
CPD
power
f = 1 MHz;
dissipation
capacitance
VI = GND to VCC
VCC = 0.8 V
-
-
-
-
-
-
2.8
2.9
3.0
3.0
3.5
3.9
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
pF
pF
pF
pF
pF
pF
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
[1] All typical values are measured at nominal VCC
.
[2] tpd is the same as tPLH and tPHL
.
[3] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
14 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
12. Waveforms
t
W
V
I
CP input
V
M
GND
1/f
max
V
I
V
D input
M
GND
t
t
h
h
t
t
su
su
t
t
PLH
PHL
V
OH
V
V
Q output
Q output
M
M
V
OL
V
OH
V
OL
t
t
PLH
PHL
001aae365
Measurement points are given in Table 10.
Logic levels: VOL and VOH are typical output voltage drop that occur with the output load.
Fig 7. The clock input (CP) to output (Q, Q) propagation delays, the clock pulse width, The D to CP set-up and
hold times and the maximum clock pulse frequency
Table 10. Measurement points
Supply voltage
VCC
Output
VM
Input
VM
VI
tr = tf
0.8 V to 3.6 V
0.5 × VCC
0.5 × VCC
VCC
≤ 3.0 ns
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
15 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
V
I
CP input
SD input
V
M
t
GND
rec
rec
V
I
V
M
t
GND
t
t
W
W
V
I
V
RD input
M
GND
t
t
PHL
PLH
V
OH
V
Q output
Q output
M
V
OL
V
OH
V
M
V
OL
t
t
PLH
PHL
001aae366
Measurement points are given in Table 11.
Logic levels: VOL and VOH are typical output voltage drop that occur with the output load.
Fig 8. The set (SD) and reset (RD) input to output (Q, Q) propagation delays, the set and reset pulse widths and
the RD to CP recovery time
Table 11. Measurement points
Supply voltage
VCC
Output
VM
Input
VM
VI
tr = tf
0.8 V to 3.6 V
0.5 × VCC
0.5 × VCC
VCC
≤ 3.0 ns
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
16 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
V
V
EXT
CC
5 kΩ
V
V
O
I
PULSE
GENERATOR
DUT
R
C
R
L
T
L
001aac521
Test data is given in Table 12.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times..
Fig 9. Load circuitry for switching times
Table 12. Test data
Supply voltage
VCC
Load
CL
VEXT
[1]
RL
tPLH, tPHL
open
tPZH, tPHZ
tPZL, tPLZ
0.8 V to 3.6 V
5 pF, 10 pF, 15 pF and 30 pF 5 kΩ or 1 MΩ
GND
2 × VCC
[1] For measuring enable and disable times RL = 5 kΩ, for measuring propagation delays, setup and hold times and pulse width RL = 1 MΩ .
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
17 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
13. Package outline
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm
SOT765-1
D
E
A
X
c
y
H
v
M
A
E
Z
5
8
Q
A
2
A
A
1
(A )
3
pin 1 index
θ
L
p
L
detail X
1
4
e
w
M
b
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
A
A
A
b
c
D
E
e
H
L
L
p
Q
UNIT
v
w
y
Z
θ
1
2
3
p
E
max.
0.15
0.00
0.85
0.60
0.27
0.17
0.23
0.08
2.1
1.9
2.4
2.2
3.2
3.0
0.40
0.15
0.21
0.19
0.4
0.1
8°
0°
mm
1
0.5
0.12
0.4
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-06-07
SOT765-1
MO-187
Fig 10. Package outline SOT765-1 (VSSOP8)
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
18 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm
SOT833-1
b
1
2
3
4
4×
(2)
L
L
1
e
8
7
6
5
e
1
e
1
e
1
8×
(2)
A
A
1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
A
1
UNIT
b
D
E
e
e
L
L
1
1
max max
0.25
0.17
2.0
1.9
1.05
0.95
0.35 0.40
0.27 0.32
mm
0.5 0.04
0.6
0.5
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
- - -
04-07-22
04-11-09
SOT833-1
- - -
MO-252
Fig 11. Package outline SOT833-1 (XSON8)
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
19 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
XQFN8: plastic extremely thin quad flat package; no leads; 8 terminals; body 1.6 x 1.6 x 0.5 mm
SOT902-1
D
B
A
terminal 1
index area
E
A
A
1
detail X
e
L
1
e
C
y
C
1
y
L
M
M
v
C
C
A
B
4
w
5
6
7
3
2
metal area
not for soldering
e
1
b
e
1
1
terminal 1
index area
8
X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
UNIT
A
1
b
D
E
e
e
1
L
L
v
w
y
y
1
1
max
0.05 0.25 1.65 1.65
0.00 0.15 1.55 1.55
0.35 0.15
0.25 0.05
mm
0.5
0.55
0.5
0.1
0.05 0.05 0.05
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
MO-255
JEITA
05-11-16
05-11-25
SOT902-1
- - -
- - -
Fig 12. Package outline SOT902-1 (XQFN8)
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
20 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
14. Abbreviations
Table 13. Abbreviations
Acronym
CDM
CMOS
DUT
Description
Charged Device Model
Complementary Metal Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
HBM
MM
Machine Model
TTL
Transistor-Transistor Logic
15. Revision history
Table 14. Revision history
Document ID
Release date
20060825
Data sheet status
Change notice
Supersedes
74AUP1G74_1
Product data sheet
-
-
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
21 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.semiconductors.philips.com.
malfunction of a Philips Semiconductors product can reasonably be expected
16.2 Definitions
to result in personal injury, death or severe property or environmental
damage. Philips Semiconductors accepts no liability for inclusion and/or use
of Philips Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Philips Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Philips Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Philips Semiconductors
sales office. In case of any inconsistency or conflict with the short data sheet,
the full data sheet shall prevail.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — Philips Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.semiconductors.philips.com/profile/terms, including those
pertaining to warranty, intellectual property rights infringement and limitation
of liability, unless explicitly otherwise agreed to in writing by Philips
16.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, Philips Semiconductors does not give any representations
or warranties, expressed or implied, as to the accuracy or completeness of
such information and shall have no liability for the consequences of use of
such information.
Semiconductors. In case of any inconsistency or conflict between information
in this document and such terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — Philips Semiconductors reserves the right to
make changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Suitability for use — Philips Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
17. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
74AUP1G74_1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 25 August 2006
22 of 23
74AUP1G74
Philips Semiconductors
Low-power D-type flip-flop with set and reset; positive-edge trigger
18. Contents
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 21
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 21
8
9
10
11
12
13
14
15
16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 22
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 22
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
16.1
16.2
16.3
16.4
17
18
Contact information. . . . . . . . . . . . . . . . . . . . . 22
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© Koninklijke Philips Electronics N.V. 2006.
All rights reserved.
For more information, please visit: http://www.semiconductors.philips.com.
For sales office addresses, email to: sales.addresses@www.semiconductors.philips.com.
Date of release: 25 August 2006
Document identifier: 74AUP1G74_1
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