74AHCT2G32_技术文档

74AHC2G32; 74AHCT2G32

Dual 2-input OR gate

Rev. 01 — 23 February 2004

Product data sheet

1. General description

The 74AHC2G/AHCT2G32 is a high-speed Si-gate CMOS device. This device provides

two 2-input OR gates.

2. Features

■ Symmetrical output impedance

■ High noise immunity

■ ESD protection:

◆ HBM EIA/JESD22-A114-A exceeds 2000 V

◆ MM EIA/JESD22-A115-A exceeds 200 V

◆ CDM EIA/JESD22-C101 exceeds 1000 V.

■ Low power dissipation

■ Balanced propagation delays

■ SOT505-2 and SOT765-1 package

■ Speciﬁed from −40 °C to +85 °C and −40 °C to +125 °C.

3. Quick reference data

Table 1:

Quick reference data

GND = 0 V; T_amb= 25 °C; t_r= t_f≤ 3.0 ns.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Type 74AHC2G

t_PHL, t_PLH

propagation delay C_L= 15 pF;

-

3.2

5.5

ns

nA and nB to nY

V_CC= 5 V

C_I

input capacitance

-

1.5

16

10

-

pF

[1] [2]

C_PD

power dissipation C_L= 50 pF;

capacitance f_i= 1 MHz

Type 74AHCT2G

t_PHL, t_PLH

propagation delay C_L= 15 pF;

-

3.3

6.9

ns

nA and nB to nY

V_CC= 5 V

C_I

input capacitance

-

1.5

17

10

-

pF

[1] [2]

C_PD

power dissipation C_L= 50 pF;

capacitance f_i= 1 MHz

[1] C_PDis used to determine the dynamic power dissipation (P_Din µW).

P_D= C_PD× V_CC²× f_i× N + Σ(C_L× V_CC²× f_o) where:

f_i= input frequency in MHz;

f_o= output frequency in MHz;

74AHC2G32; 74AHCT2G32

Philips Semiconductors

Dual 2-input OR gate

C_L= output load capacitance in pF;

V_CC= supply voltage in Volts;

N = total load switching outputs;

Σ(C_L× V_CC²× f_o) = sum of the outputs.

[2] The condition is V_I= GND to V_CC

.

4. Ordering information

Table 2:

Ordering information

Type number

Package

Temperature range Name

Description

Version

74AHC2G32DP

74AHCT2G32DP

74AHC2G32DC

74AHCT2G32DC

−40 °C to +125 °C

TSSOP8

plastic thin shrink small outline package; 8 leads;

body width 3 mm; lead length 0.5 mm

SOT505-2

TSSOP8

VSSOP8

plastic thin shrink small outline package; 8 leads;

body width 3 mm; lead length 0.5 mm

SOT505-2

SOT765-1

plastic very shrink small outline package; 8 leads;

body width 2.3 mm

plastic very shrink small outline package; 8 leads;

body width 2.3 mm

5. Marking

Table 3:

Marking

Type number

74AHC2G32DP

74AHCT2G32DP

74AHC2G32DC

74AHCT2G32DC

Marking code

A32

C32

A32

C32

6. Functional diagram

1

≥ 1

7

3

2

1

2

1A

1B

1Y

2Y

7

5

6

2A

2B

≥ 1

3

6

mna734

mna733

Fig 1. Functional diagram.

Fig 2. IEC logic symbol.

9397 750 12532

Product data sheet

Rev. 01 — 23 February 2004

2 of 16

74AHC2G32; 74AHCT2G32

Philips Semiconductors

Dual 2-input OR gate

B

A

Y

mna166

Fig 3. Logic diagram (logic driver).

7. Pinning information

7.1 Pinning

V

1A

1B

1

2

3

4

8

7

6

5

CC

1Y

2B

2A

32

2Y

GND

mna732

Fig 4. Pin conﬁguration.

7.2 Pin description

Table 4:

Pin description

1

Symbol

1A

Description

data input

2

1B

data input

3

2Y

data output

ground (0 V)

data input

4

GND

2A

5

6

2B

data input

7

1Y

data output

supply voltage

8

V_CC

9397 750 12532

Product data sheet

Rev. 01 — 23 February 2004

3 of 16

74AHC2G32; 74AHCT2G32

Philips Semiconductors

Dual 2-input OR gate

8. Functional description

8.1 Function table

Table 5:

Function table^[1]

Input

nA

L

Output

nB

nY

L

H

L

H

[1] H = HIGH voltage level;

L = LOW voltage level.

9. Limiting values

Table 6:

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to

GND (ground = 0 V).

Symbol

V_CC

V_I

Parameter

Conditions

Min

−0.5

-

Max

+7.0

−20

Unit

V

supply voltage

input voltage

V

I_IK

input diode current V_I< −0.5 V

mA

[1]

I_OK

output diode

current

V_O< −0.5 V or V_O> V_CC+ 0.5 V

-

±20

I_O

output source or

sink current

V_O> −0.5 V or V_O< V_CC+ 0.5 V

-

±25

±75

+150

250

mA

°C

I_CC, I_GND

T_stg

V_CCor GND

current

-

storage

temperature

−65

P_tot

power dissipation

T_amb= −40 °C to +125 °C

-

mW

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

10. Recommended operating conditions

Table 7:

Symbol

Recommended operating operations

Parameter

Conditions

Min

Typ

Max

Unit

Type 74AHC2G

V_CC

V_I

supply voltage

2.0

0

5.0

5.5

V

input voltage

-

5.5

V

V_O

output voltage

0

-

V_CC

+125

V

T_amb

operating ambient

temperature

see Section 11 and Section 12

per device

−40

+25

°C

9397 750 12532

Product data sheet

Rev. 01 — 23 February 2004

4 of 16

74AHC2G32; 74AHCT2G32

Philips Semiconductors

Dual 2-input OR gate

Table 7:

Symbol

t_r, t_f

Recommended operating operations …continued

Parameter

Conditions

Min

Typ

Max

100

20

Unit

ns/V

input rise and fall

times

V_CC= 3.3 V ± 0.3 V

V_CC= 5 V ± 0.5 V

-

Type 74AHCT2G

V_CC

V_I

supply voltage

4.5

0

5.0

5.5

V

input voltage

-

5.5

V

V_O

output voltage

0

-

V_CC

+125

V

T_amb

operating ambient

temperature

see Section 11 and Section 12

per device

−40

+25

°C

t_r, t_f

input rise and fall

times

V_CC= 5 V ± 0.5 V

-

20

ns/V

11. Static characteristics

Table 8:

Static characteristics type 74AHC2G32

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol

T_amb= 25 °C

V_IH

Parameter

Conditions

Min

Typ

Max

Unit

HIGH-level input

voltage

V_CC= 2.0 V

1.5

-

V

V_CC= 3.0 V

2.1

-

V_CC= 5.5 V

3.85

-

V_IL

LOW-level input

voltage

V_CC= 2.0 V

-

0.5

0.9

1.65

V_CC= 3.0 V

V_CC= 5.5 V

V_OH

HIGH-level output

voltage

V_I= V_IHor V_IL

I_O= −50 µA; V_CC= 2.0 V

I_O= −50 µA; V_CC= 3.0 V

I_O= −50 µA; V_CC= 4.5 V

I_O= −4.0 mA; V_CC= 3.0 V

I_O= −8.0 mA; V_CC= 4.5 V

V_I= V_IHor V_IL

1.9

2.0

3.0

4.5

-

V

2.9

4.4

2.58

3.94

-

V_OL

LOW-level output

voltage

I_O= 50 µA; V_CC= 2.0 V

I_O= 50 µA; V_CC= 3.0 V

I_O= 50 µA; V_CC= 4.5 V

I_O= 4.0 mA; V_CC= 3.0 V

I_O= 8.0 mA; V_CC= 4.5 V

-

0

-

0.1

V

0.1

V

0.1

V

0.36

0.1

V

-

V

I_LI

input leakage current V_I= V_CCor GND; V_CC= 5.5 V

-

µA

I_CC

quiescent supply

current

V_I= V_CCor GND; I_O= 0 A;

_CC= 5.5 V

-

1.0

V

C_I

input capacitance

-

1.5

10

pF

9397 750 12532

Product data sheet

Rev. 01 — 23 February 2004

5 of 16

74AHC2G32; 74AHCT2G32

Philips Semiconductors

Dual 2-input OR gate

Table 8:

Static characteristics type 74AHC2G32 …continued

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol

T_amb= −40 °C to +85 °C

V_IHHIGH-level input

Parameter

Conditions

Min

Typ

Max

Unit

V_CC= 2.0 V

1.5

-

V

voltage

V_CC= 3.0 V

2.1

-

V_CC= 5.5 V

3.85

-

V_IL

LOW-level input

voltage

V_CC= 2.0 V

-

0.5

0.9

1.65

V_CC= 3.0 V

V_CC= 5.5 V

V_OH

HIGH-level output

voltage

V_I= V_IHor V_IL

I_O= −50 µA; V_CC= 2.0 V

I_O= −50 µA; V_CC= 3.0 V

I_O= −50 µA; V_CC= 4.5 V

I_O= −4.0 mA; V_CC= 3.0 V

I_O= −8.0 mA; V_CC= 4.5 V

V_I= V_IHor V_IL

1.9

2.9

4.4

2.48

3.8

-

V

V_OL

LOW-level output

voltage

I_O= 50 µA; V_CC= 2.0 V

I_O= 50 µA; V_CC= 3.0 V

I_O= 50 µA; V_CC= 4.5 V

I_O= 4.0 mA; V_CC= 3.0 V

I_O= 8.0 mA; V_CC= 4.5 V

-

0.1

0.44

1.0

10

V

I_LI

input leakage current V_I= V_CCor GND; V_CC= 5.5 V

µA

I_CC

quiescent supply

current

V_I= V_CCor GND; I_O= 0 A;

_CC= 5.5 V

V

C_I

input capacitance

-

10

pF

T_amb= −40 °C to +125 °C

V_IH

HIGH-level input

voltage

V_CC= 2.0 V

1.5

-

V

V_CC= 3.0 V

2.1

-

V_CC= 5.5 V

3.85

-

V_IL

LOW-level input

voltage

V_CC= 2.0 V

-

0.5

0.9

1.65

V_CC= 3.0 V

V_CC= 5.5 V

V_OH

HIGH-level output

voltage

V_I= V_IHor V_IL

I_O= −50 µA; V_CC= 2.0 V

I_O= −50 µA; V_CC= 3.0 V

I_O= −50 µA; V_CC= 4.5 V

I_O= −4.0 mA; V_CC= 3.0 V

I_O= −8.0 mA; V_CC= 4.5 V

1.9

-

V

2.9

4.4

2.40

3.70

9397 750 12532

Product data sheet

Rev. 01 — 23 February 2004

6 of 16

74AHC2G32; 74AHCT2G32

Philips Semiconductors

Dual 2-input OR gate

Table 8:

Static characteristics type 74AHC2G32 …continued

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

V_OL

LOW-level output

voltage

V_I= V_IHor V_IL

I_O= 50 µA; V_CC= 2.0 V

I_O= 50 µA; V_CC= 3.0 V

I_O= 50 µA; V_CC= 4.5 V

I_O= 4.0 mA; V_CC= 3.0 V

I_O= 8.0 mA; V_CC= 4.5 V

-

0.1

0.55

2.0

40

V

I_LI

input leakage current V_I= V_CCor GND; V_CC= 5.5 V

µA

I_CC

quiescent supply

current

V_I= V_CCor GND; I_O= 0 A;

_CC= 5.5 V

V

C_I

input capacitance

-

10

pF

Table 9:

Static characteristics type 74AHCT2G32

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol

T_amb= 25 °C

V_IH

Parameter

Conditions

Min

Typ

Max

Unit

HIGH-level input

voltage

V_CC= 4.5 V to 5.5 V

2.0

-

V

V_IL

LOW-level input

voltage

0.8

V_OH

HIGH-level output

voltage

V_I= V_IHor V_IL

I_O= −50 µA; V_CC= 4.5 V

I_O= −8.0 mA; V_CC= 4.5 V

V_I= V_IHor V_IL

4.4

4.5

-

V

3.94

V_OL

LOW-level output

voltage

I_O= 50 µA; V_CC= 4.5 V

I_O= 8.0 mA; V_CC= 4.5 V

-

0

-

0.1

0.36

0.1

1.0

V

I_LI

input leakage current V_I= V_IHor V_IL; V_CC= 5.5 V

-

µA

I_CC

quiescent supply

current

V_I= V_CCor GND; I_O= 0 A;

_CC= 5.5 V

-

V

∆I_CC

additional quiescent

supply current per

input pin

V_I= 3.4 V; other inputs at

-

1.35

10

mA

pF

V_CCor GND; I_O= 0 A;

_CC= 5.5 V

V

C_I

input capacitance

1.5

T_amb= −40 °C to +85 °C

V_IH

HIGH-level input

voltage

V_CC= 4.5 V to 5.5 V

2.0

-

V

V_IL

LOW-level input

voltage

0.8

V_OH

HIGH-level output

voltage

V_I= V_IHor V_IL

I_O= −50 µA; V_CC= 4.5 V

I_O= −8.0 mA; V_CC= 4.5 V

4.4

3.8

-

V

9397 750 12532

Product data sheet

Rev. 01 — 23 February 2004

7 of 16

74AHC2G32; 74AHCT2G32

Philips Semiconductors

Dual 2-input OR gate

Table 9:

Static characteristics type 74AHCT2G32 …continued

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

V_OL

LOW-level output

voltage

V_I= V_IHor V_IL

I_O= 50 µA; V_CC= 4.5 V

I_O= 8.0 mA; V_CC= 4.5 V

-

0.1

0.44

1.0

10

V

I_LI

input leakage current V_I= V_IHor V_IL; V_CC= 5.5 V

µA

I_CC

quiescent supply

current

V_I= V_CCor GND; I_O= 0 A;

_CC= 5.5 V

V

∆I_CC

additional quiescent

supply current per

input pin

V_I= 3.4 V; other inputs at

-

1.5

10

mA

pF

V_CCor GND; I_O= 0 A;

_CC= 5.5 V

V

C_I

input capacitance

T_amb= −40 °C to +125 °C

V_IH

HIGH-level input

voltage

V_CC= 4.5 V to 5.5 V

2.0

-

V

V_IL

LOW-level input

voltage

0.8

V_OH

HIGH-level output

voltage

V_I= V_IHor V_IL

I_O= −50 µA; V_CC= 4.5 V

I_O= −8.0 mA; V_CC= 4.5 V

V_I= V_IHor V_IL

4.4

-

V

3.70

V_OL

LOW-level output

voltage

I_O= 50 µA; V_CC= 4.5 V

I_O= 8.0 mA; V_CC= 4.5 V

-

0.1

0.55

2.0

40

V

I_LI

input leakage current V_I= V_IHor V_IL; V_CC= 5.5 V

µA

I_CC

quiescent supply

current

V_I= V_CCor GND; I_O= 0 A;

_CC= 5.5 V

V

∆I_CC

additional quiescent

supply current per

input pin

V_I= 3.4 V; other inputs at

-

1.5

10

mA

pF

V_CCor GND; I_O= 0 A;

_CC= 5.5 V

V

C_I

input capacitance

9397 750 12532

Product data sheet

Rev. 01 — 23 February 2004

8 of 16

74AHC2G32; 74AHCT2G32

Philips Semiconductors

Dual 2-input OR gate

12. Dynamic characteristics

Table 10: Dynamic characteristics type 74AHC2G32

At recommended operating conditions; voltages are referenced to GND (ground = 0 V); t_r= t_f≤ 3.0 ns; see Figure 6.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

T_amb= 25 °C

t_PHL, t_PLHpropagation delay

nA and nB to nY

see Figure 5

[1]

[2]

V_CC= 3.0 V to 3.6 V; C_L= 15 pF

V_CC= 4.5 V to 5.5 V; C_L= 15 pF

V_CC= 3.0 V to 3.6 V; C_L= 50 pF

V_CC= 4.5 V to 5.5 V; C_L= 50 pF

C_L= 50 pF; f_i= 1 MHz

-

4.4

3.2

6.3

4.6

16

7.9

5.5

11.4

7.5

-

ns

pF

[3] [4]

C_PD

power dissipation

capacitance

T_amb= −40 °C to +85 °C

t_PHL, t_PLHpropagation delay

nA and nB to nY

see Figure 5

V_CC= 3.0 V to 3.6 V; C_L= 15 pF

V_CC= 4.5 V to 5.5 V; C_L= 15 pF

V_CC= 3.0 V to 3.6 V; C_L= 50 pF

V_CC= 4.5 V to 5.5 V; C_L= 50 pF

1.0

-

9.5

6.5

13.0

8.5

ns

T_amb= −40 °C to +125 °C

t_PHL, t_PLHpropagation delay

nA and nB to nY

see Figure 5

V_CC= 3.0 V to 3.6 V; C_L= 15 pF

V_CC= 4.5 V to 5.5 V; C_L= 15 pF

V_CC= 3.0 V to 3.6 V; C_L= 50 pF

V_CC= 4.5 V to 5.5 V; C_L= 50 pF

1.0

-

10.0

7.0

ns

14.5

9.5

[1] Typical values are measured at V_CC= 3.3 V.

[2] Typical values are measured at V_CC= 5.0 V.

[3] C_PDis used to determine the dynamic power dissipation (P_Din µW).

P_D= C_PD× V_CC²× f_i× N + Σ(C_L× V_CC²× f_o) where:

f_i= input frequency in MHz;

f_o= output frequency in MHz;

C_L= output load capacitance in pF;

V_CC= supply voltage in Volts;

N = total load switching outputs;

Σ(C_L× V_CC²× f_o) = sum of the outputs.

[4] The condition is V_I= GND to V_CC

.

9397 750 12532

Product data sheet

Rev. 01 — 23 February 2004

9 of 16

74AHC2G32; 74AHCT2G32

Philips Semiconductors

Dual 2-input OR gate

Table 11: Dynamic characteristics type 74AHCT2G32

At recommended operating conditions; voltages are referenced to GND (ground = 0 V); t_r= t_f≤ 3.0 ns; see Figure 6.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

T_amb= 25 °C

t_PHL, t_PLHpropagation delay

nA and nB to nY

see Figure 5

[1]

V_CC= 4.5 V to 5.5 V; C_L= 15 pF

V_CC= 4.5 V to 5.5 V; C_L= 50 pF

C_L= 50 pF; f_i= 1 MHz

-

3.3

4.8

17

6.9

7.9

-

ns

pF

[2] [3]

C_PD

power dissipation

capacitance

T_amb= −40 °C to +85 °C

t_PHL, t_PLHpropagation delay

nA and nB to nY

see Figure 5

V_CC= 4.5 V to 5.5 V; C_L= 15 pF

V_CC= 4.5 V to 5.5 V; C_L= 50 pF

1.0

-

8.0

9.0

ns

T_amb= −40 °C to +125 °C

t_PHL, t_PLHpropagation delay

nA and nB to nY

see Figure 5

V_CC= 4.5 V to 5.5 V; C_L= 15 pF

V_CC= 4.5 V to 5.5 V; C_L= 50 pF

1.0

-

9.0

ns

10.0

[1] Typical values are measured at V_CC= 5.0 V.

[2] C_PDis used to determine the dynamic power dissipation (P_Din µW).

P_D= C_PD× V_CC²× f_i× N + Σ(C_L× V_CC²× f_o) where:

f_i= input frequency in MHz;

f_o= output frequency in MHz;

C_L= output load capacitance in pF;

V_CC= supply voltage in Volts;

N = total load switching outputs;

Σ(C_L× V_CC²× f_o) = sum of the outputs.

[3] The condition is V_I= GND to V_CC

.

13. Waveforms

V

I

V

nA, nB input

GND

M

t

PLH

PHL

V

OH

nY output

V

M

V

OL

mna224

74AHC2G32: V_M= 0.5 x V_CC; V_I= GND to V_CC

.

74AHCT2G32: input V_M= 1.5 V and output V_M= 0.5 x V_CC; V_I= GND to 3.0 V.

Fig 5. The input (nA and nB) to output (nY) propagation delays.

9397 750 12532

Product data sheet

Rev. 01 — 23 February 2004

10 of 16

74AHC2G32; 74AHCT2G32

Philips Semiconductors

Dual 2-input OR gate

V

CC

V

O

I

PULSE

GENERATOR

D.U.T.

C

L

R

T

mna101

Deﬁnitions for test circuit:

C_L= Load capacitance including jig and probe capacitance (See Section 12 for the value).

R_T= Termination resistance should be equal to the output impedance Z_oof the pulse generator.

Fig 6. Load circuitry for switching times.

9397 750 12532

Product data sheet

Rev. 01 — 23 February 2004

11 of 16

74AHC2G32; 74AHCT2G32

Philips Semiconductors

Dual 2-input OR gate

14. Package outline

TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm

SOT505-2

D

E

A

X

c

H

v

M

y

A

E

Z

5

8

A

2

A

(A )

3

A

1

pin 1 index

θ

L

p

L

detail X

1

4

e

w

M

b

p

0

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions)

A

(1)

A

b

c

D

E

e

H

E

L

p

UNIT

v

w

y

Z

θ

1

2

3

p

max.

0.15

0.00

0.95

0.75

0.38

0.22

0.18

0.08

3.1

2.9

3.1

2.9

4.1

3.9

0.47

0.33

0.70

0.35

8°

0°

mm

1.1

0.65

0.25

0.5

0.2

0.13

0.1

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

02-01-16

SOT505-2

- - -

Fig 7. Package outline TSSOP8

9397 750 12532

Product data sheet

Rev. 01 — 23 February 2004

12 of 16

74AHC2G32; 74AHCT2G32

Philips Semiconductors

Dual 2-input OR gate

VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm

SOT765-1

D

E

A

X

c

y

H

v

M

A

E

Z

5

8

Q

A

2

A

1

(A )

3

pin 1 index

θ

L

p

L

detail X

1

4

e

w

M

b

p

0

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions)

A

(1)

(2)

(1)

A

b

c

D

E

e

H

L

p

Q

UNIT

v

w

y

Z

θ

1

2

3

p

E

max.

0.15

0.00

0.85

0.60

0.27

0.17

0.23

0.08

2.1

1.9

2.4

2.2

3.2

3.0

0.40

0.15

0.21

0.19

0.4

0.1

8°

0°

mm

1

0.5

0.12

0.4

0.2

0.13

0.1

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

02-06-07

SOT765-1

MO-187

Fig 8. Package outline VSSOP8

9397 750 12532

Product data sheet

Rev. 01 — 23 February 2004

13 of 16

74AHC2G32; 74AHCT2G32

Philips Semiconductors

Dual 2-input OR gate

15. Revision history

Table 12: Revision history

Document ID

Release date Data sheet status

Change notice Order number

9397 750 12532

Supersedes

74AHC_AHCT2G32_1 20040223

Product data

-

9397 750 12532

Product data sheet

Rev. 01 — 23 February 2004

14 of 16

74AHC2G32; 74AHCT2G32

Philips Semiconductors

Dual 2-input OR gate

16. Data sheet status

Level Data sheet status^[1]Product status^{[2] [3]}

Deﬁnition

I

Objective data

Development

This data sheet contains data from the objective speciﬁcation for product development. Philips

Semiconductors reserves the right to change the speciﬁcation in any manner without notice.

II

Preliminary data

Qualiﬁcation

This data sheet contains data from the preliminary speciﬁcation. Supplementary data will be published

at a later date. Philips Semiconductors reserves the right to change the speciﬁcation without notice, in

order to improve the design and supply the best possible product.

III

Product data

Production

This data sheet contains data from the product speciﬁcation. Philips Semiconductors reserves the

right to make changes at any time in order to improve the design, manufacturing and supply. Relevant

changes will be communicated via a Customer Product/Process Change Notiﬁcation (CPCN).

[1]

[2]

Please consult the most recently issued data sheet before initiating or completing a design.

The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at

URL http://www.semiconductors.philips.com.

[3]

For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

17. Deﬁnitions

18. Disclaimers

Short-form speciﬁcation — The data in a short-form speciﬁcation is

extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.

Life support — These products are not designed for use in life support

appliances, devices, or systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips Semiconductors

customers using or selling these products for use in such applications do so

at their own risk and agree to fully indemnify Philips Semiconductors for any

damages resulting from such application.

Limiting values deﬁnition — Limiting values given are in accordance with

the Absolute Maximum Rating System (IEC 60134). Stress above one or

more of the limiting values may cause permanent damage to the device.

These are stress ratings only and operation of the device at these or at any

other conditions above those given in the Characteristics sections of the

speciﬁcation is not implied. Exposure to limiting values for extended periods

may affect device reliability.

Right to make changes — Philips Semiconductors reserves the right to

make changes in the products - including circuits, standard cells, and/or

software - described or contained herein in order to improve design and/or

performance. When the product is in full production (status ‘Production’),

relevant changes will be communicated via a Customer Product/Process

Change Notiﬁcation (CPCN). Philips Semiconductors assumes no

responsibility or liability for the use of any of these products, conveys no

license or title under any patent, copyright, or mask work right to these

products, and makes no representations or warranties that these products are

free from patent, copyright, or mask work right infringement, unless otherwise

speciﬁed.

Application information — Applications that are described herein for any

of these products are for illustrative purposes only. Philips Semiconductors

make no representation or warranty that such applications will be suitable for

the speciﬁed use without further testing or modiﬁcation.

19. Contact information

For additional information, please visit http://www.semiconductors.philips.com

For sales ofﬁce addresses, send an email to: sales.addresses@www.semiconductors.philips.com

9397 750 12532

Product data sheet

Rev. 01 — 23 February 2004

15 of 16

74AHC2G32; 74AHCT2G32

Philips Semiconductors

Dual 2-input OR gate

20. Contents

1

2

3

4

5

6

General description . . . . . . . . . . . . . . . . . . . . . . 1

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Quick reference data . . . . . . . . . . . . . . . . . . . . . 1

Ordering information. . . . . . . . . . . . . . . . . . . . . 2

Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

7

7.1

7.2

Pinning information. . . . . . . . . . . . . . . . . . . . . . 3

Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

8

8.1

9

Functional description . . . . . . . . . . . . . . . . . . . 4

Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4

Recommended operating conditions. . . . . . . . 4

Static characteristics. . . . . . . . . . . . . . . . . . . . . 5

Dynamic characteristics . . . . . . . . . . . . . . . . . . 9

Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12

Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14

Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 15

Deﬁnitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Contact information . . . . . . . . . . . . . . . . . . . . 15

10

11

12

13

14

15

16

17

18

19

All rights are reserved. Reproduction in whole or in part is prohibited without the prior

written consent of the copyright owner. The information presented in this document does

not form part of any quotation or contract, is believed to be accurate and reliable and may

be changed without notice. No liability will be accepted by the publisher for any

consequence of its use. Publication thereof does not convey nor imply any license under

patent- or other industrial or intellectual property rights.

Date of release: 23 February 2004

Document order number: 9397 750 12532

Published in The Netherlands


型号：	74AHCT2G32
厂家：	NXP
描述：	Dual 2-input OR gate 双路2输入或门
文件：	总16页 (文件大小：83K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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